JP2006303464A - 配線基板および回路装置 - Google Patents
配線基板および回路装置 Download PDFInfo
- Publication number
- JP2006303464A JP2006303464A JP2006075339A JP2006075339A JP2006303464A JP 2006303464 A JP2006303464 A JP 2006303464A JP 2006075339 A JP2006075339 A JP 2006075339A JP 2006075339 A JP2006075339 A JP 2006075339A JP 2006303464 A JP2006303464 A JP 2006303464A
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- wiring board
- region
- dielectric layer
- film thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/024—Dielectric details, e.g. changing the dielectric material around a transmission line
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B15/00—Layered products comprising a layer of metal
- B32B15/04—Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material
- B32B15/08—Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0242—Structural details of individual signal conductors, e.g. related to the skin effect
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0191—Dielectric layers wherein the thickness of the dielectric plays an important role
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/035—Paste overlayer, i.e. conductive paste or solder paste over conductive layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0707—Shielding
- H05K2201/0715—Shielding provided by an outer layer of PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/098—Special shape of the cross-section of conductors, e.g. very thick plated conductors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24926—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including ceramic, glass, porcelain or quartz layer
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Structure Of Printed Boards (AREA)
- Waveguides (AREA)
Abstract
【解決手段】配線基板10は、電位が等しい第1の導体20および第2の導体30と、第1の導体20と第2の導体30との間に設けられた誘電体層40と、誘電体層40に埋設された第3の導体50とを備える。配線基板10では、第3の導体50と第1の導体20との間に位置する誘電体層40の第1領域42の膜厚haの方が、第3の導体50と第2の導体30との間に位置する誘電体層40の第2領域44の膜厚hbより大きい。さらに、第3の導体50の断面形状は台形状であり、第2の導体30の側の第3の導体50の両端部の角度θ1およびθ2は鈍角となっている。
【選択図】図1
Description
図1は、実施形態1の配線基板10の断面形状を示す。図1の断面は、配線基板10の伝送方向と直交する面である。配線基板10は、第1の導体20と、第2の導体30と、第1の導体20と第2の導体30との間に設けられた誘電体層40と、誘電体層40に埋設された第3の導体50と、誘電体層40に埋設された第1の導体20と第2の導体30とを電気的に接続するビア(図示していない)を備える。このように、配線基板10は、容量素子を有する。また、第1の導体20および第2の導体30の電位を接地にすることにより、配線基板10は、トリプレート線路を有する。
図1に示した配線基板10の形成方法について以下に説明する。
図5は、実施形態2に係る配線基板200の構造を示す断面図である。本実施形態に係る配線基板200は容量素子である。配線基板200は、第1の導体220と、第2の導体230と、第1の導体220と第2の導体230との間に設けられた誘電体層240と、誘電体層240に埋設された第3の導体250と、第1の導体220と第2の導体230とを電気的に接続するビア260とを備える。
図6は、実施形態3に係る回路装置300の構造を示す断面図である。回路装置300は、配線基板10と回路素子310とを有する。本実施形態の配線基板10は、接地配線330と誘電体層40との間に接着層320が設けられていることを除けば、実施形態1の配線基板10と同様な構成を有する。
Claims (6)
- 第1の導体と、
前記第1の導体と異なる配線層に設けられ、前記第1の導体と電位が等しい第2の導体と、
前記第1の導体と前記第2の導体との間に設けられた誘電体層と、
前記誘電体層に埋設された第3の導体とを、
備え、
前記第3の導体と前記第1の導体との間に位置する前記誘電体層の第1領域の膜厚と、前記第3の導体と前記第2の導体との間に位置する前記誘電体層の第2領域の膜厚に差があり、
前記第3の導体の信号の伝送方向と直交する断面において、前記誘電体層の前記第1領域および前記第2領域のうち、より薄い側に面する前記第3の導体の両端部の角度が鈍角であることを特徴とする配線基板。 - 前記第1領域および前記第2領域のうち、膜厚が薄い方の領域の比誘電率が、他方の領域の比誘電率より高いことを特徴とする請求項1に記載の配線基板。
- 前記第3の導体の伝送方向と直交する断面における前記第3の導体の形状が台形状であり、
前記誘電体層の前記第1領域および前記第2領域のうち、より薄い側と前記第3の導体の前記台形状の短辺側とが面することを特徴とする請求項1または2に記載の配線基板。 - 前記第1の導体と、前記第2の導体の電位が接地されていることを特徴とする請求項1乃至3のいずれか1項に記載の配線基板。
- 請求項4に記載の配線基板と、接地配線を有する回路素子と、を含む回路装置であって、
前記第1の導体および前記第2の導体のうち、一方の導体が、前記接地配線からなることを特徴とする回路装置。 - 前記一方の導体が、前記接地配線と前記誘電体層とを接着する導電性の接着層をさらに含むことを特徴とする請求項5に記載の回路装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006075339A JP4243284B2 (ja) | 2005-03-24 | 2006-03-17 | 配線基板および回路装置 |
US11/388,705 US7450397B2 (en) | 2005-03-24 | 2006-03-24 | Wiring board and circuit apparatus |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005087095 | 2005-03-24 | ||
JP2006075339A JP4243284B2 (ja) | 2005-03-24 | 2006-03-17 | 配線基板および回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006303464A true JP2006303464A (ja) | 2006-11-02 |
JP4243284B2 JP4243284B2 (ja) | 2009-03-25 |
Family
ID=37035552
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006075339A Expired - Fee Related JP4243284B2 (ja) | 2005-03-24 | 2006-03-17 | 配線基板および回路装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7450397B2 (ja) |
JP (1) | JP4243284B2 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008503038A (ja) * | 2004-06-18 | 2008-01-31 | ペミアス ゲーエムベーハー | ガス拡散電極、膜電極アセンブリー及びその製造方法 |
JP2009016521A (ja) * | 2007-07-04 | 2009-01-22 | Nippon Mektron Ltd | マイクロストリップライン構造およびその製造方法 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5187858B2 (ja) * | 2009-01-22 | 2013-04-24 | 日本碍子株式会社 | 積層型インダクタ |
JP2015041729A (ja) * | 2013-08-23 | 2015-03-02 | イビデン株式会社 | プリント配線板 |
US20190174632A1 (en) * | 2017-12-05 | 2019-06-06 | Canon Components, Inc. | Flexible printed circuit and electronic device |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5559480A (en) * | 1983-08-22 | 1996-09-24 | The United States Of America As Represented By The Secretary Of The Navy | Stripline-to-waveguide transition |
JPS63160363A (ja) | 1986-12-24 | 1988-07-04 | Mitsubishi Electric Corp | 多層配線構造を有する半導体装置 |
JPH10242599A (ja) | 1997-02-27 | 1998-09-11 | Toshiba Corp | 配線基板 |
JPH10290105A (ja) | 1997-04-14 | 1998-10-27 | Toshiba Corp | 高周波用配線ボード |
US6483406B1 (en) * | 1998-07-31 | 2002-11-19 | Kyocera Corporation | High-frequency module using slot coupling |
JP2000183232A (ja) | 1998-12-11 | 2000-06-30 | Mitsubishi Electric Corp | マイクロ波パッケージ |
JP2002076644A (ja) | 2000-08-28 | 2002-03-15 | Matsushita Electric Works Ltd | 多層プリント配線板 |
JP4834937B2 (ja) | 2001-08-22 | 2011-12-14 | 凸版印刷株式会社 | 高周波回路用多層配線板 |
JP2005229041A (ja) * | 2004-02-16 | 2005-08-25 | Alps Electric Co Ltd | 高周波配線構造および高周波配線構造の製造方法 |
-
2006
- 2006-03-17 JP JP2006075339A patent/JP4243284B2/ja not_active Expired - Fee Related
- 2006-03-24 US US11/388,705 patent/US7450397B2/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008503038A (ja) * | 2004-06-18 | 2008-01-31 | ペミアス ゲーエムベーハー | ガス拡散電極、膜電極アセンブリー及びその製造方法 |
JP2009016521A (ja) * | 2007-07-04 | 2009-01-22 | Nippon Mektron Ltd | マイクロストリップライン構造およびその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
JP4243284B2 (ja) | 2009-03-25 |
US7450397B2 (en) | 2008-11-11 |
US20060216484A1 (en) | 2006-09-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4912992B2 (ja) | キャパシタ内蔵基板及びその製造方法 | |
US9474167B2 (en) | Multilayered substrate | |
KR100768411B1 (ko) | 고주파 코일 장치 및 그 제조 방법 | |
JP4675818B2 (ja) | パッケージ基板 | |
US11742273B2 (en) | Through electrode substrate and semiconductor device | |
US20080003846A1 (en) | Circuit board unit | |
JP2009054876A (ja) | プリント配線板 | |
JP4243284B2 (ja) | 配線基板および回路装置 | |
JP5699937B2 (ja) | ノイズ抑制テープ | |
CN110506454B (zh) | 基板间连接构造 | |
JP4660738B2 (ja) | プリント配線板及び電子機器 | |
JP2004032232A (ja) | 伝送線路フィルター | |
JP2008166357A (ja) | プリント配線基板 | |
JP2004153607A (ja) | チップ状アンテナ素子及びアンテナ実装プリント配線基板 | |
WO2016149269A1 (en) | Comprehensive layout strategy for flip chipping integrated circuits | |
JP2007081267A (ja) | 半導体装置およびその製造方法 | |
JP2006197440A (ja) | アンテナ回路導体、及び非接触icタグ | |
JP2003218535A (ja) | 電気配線板 | |
JP2000077796A (ja) | フレキシブル両面プリント回路板および接続方法およびコンデンサ形成方法およびコンデンサを備えたフレキシブル両面プリント回路板 | |
US12136591B2 (en) | Through electrode substrate and semiconductor device | |
US7122909B2 (en) | Wiring board, stacked wiring board and method of manufacturing the same, semiconductor device and method of manufacturing the same, circuit board, and electronic instrument | |
JP4333659B2 (ja) | フレキシブル配線基板 | |
JP2005310895A (ja) | 多層配線板 | |
JP4922417B2 (ja) | 電子機器および回路基板 | |
JP2006040995A (ja) | 配線板及び半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20060621 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20070928 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20071002 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20071203 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20080124 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20081202 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20081226 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120109 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120109 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130109 Year of fee payment: 4 |
|
LAPS | Cancellation because of no payment of annual fees |