JP2006254671A - Three-phase voltage type inverter system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a three-phase voltage type inverter system by which a phase current is securely detected even in a high-modulation state including overmodulation. <P>SOLUTION: When a modulation percentage is a predetermined threshold or more, a control circuit 4 performs PWM modulation so that it may forcedly generate a zero voltage vector having a time duration of nearly 1μsec or more at every 60 degrees in an electrical angle, by which even in the high-modulation state including the overmodulation in which a generation period of the zero voltage vector decreases, the zero voltage vector is securely generated, and the phase current is detected by shunt resistors 10, 11 connected in series to switching elements 2x, 2y of lower stages of a U phase arm and a V phase arm, within its generation period, whereby an amplitude of a current and a current phase used for motor control are detected. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a three-phase voltage inverter device, and more particularly to a three-phase voltage inverter device configured to detect a phase current by a shunt resistor connected in series to a two-phase arm in a three-phase arm. .

Conventionally, in a three-phase voltage type inverter device, a three-phase arm is constituted by each arm composed of upper and lower switching elements connected between DC buses of an inverter circuit, and an upper or lower two-phase arm in the three-phase arm. A shunt resistor is connected in series to each other and a phase current is detected by detecting the voltage of each shunt resistor during the zero voltage vector generation period (for example, Patent Document 1). reference.).
Japanese Patent No. 3245727

  However, in the conventional technique described in Patent Document 1, the zero voltage vector generation period is reduced at the time of high modulation including overmodulation, so that there is a problem that the phase current may not be detected in the entire period. is there.

  The present invention has been made in view of the above-described problems, and a problem to be solved is to provide a three-phase voltage type inverter device capable of reliably detecting a phase current even in a high modulation state including overmodulation. To do.

  Hereinafter, each means suitable for solving the above-described problems will be described with additional effects and the like as necessary.

1. An inverter circuit in which a three-phase arm is constituted by each of the upper and lower switching elements connected between the DC buses, and a shunt resistor is connected in series to the upper or lower two-phase arm in the three-phase arm; In a three-phase voltage type inverter device comprising phase current detection means for detecting a phase current by each shunt resistor, and PWM means for controlling switching of each switching element constituting the three-phase arm by PWM modulation,
The three-phase voltage type inverter apparatus, wherein the PWM means performs PWM modulation so that a time width in which a zero voltage vector is generated within a predetermined period is equal to or longer than a predetermined time.

  In the configuration in which the phase current is detected by the shunt resistor connected in series to the upper or lower two-phase arm in the three-phase arm of the inverter circuit, the phase current detection means outputs the voltage of the shunt resistor during the zero voltage vector generation period. Although it is necessary to detect, the zero voltage vector generation period decreases as the modulation rate increases. According to the means 1, the PWM means performs the PWM modulation so that the time width in which the zero voltage vector is generated within the predetermined period becomes equal to or longer than the predetermined time. Therefore, even in the high modulation state including overmodulation, the zero voltage vector is During the generation period, the phase current detection means can detect the phase current by each shunt resistor, and the current amplitude and current phase used for motor control can be detected. For example, when the modulation rate is equal to or higher than a predetermined threshold, the PWM unit may be configured to forcibly generate a zero voltage vector having a predetermined time width or more every predetermined period. In this way, the time width during which the zero voltage vector is generated within the predetermined period can be surely set to the predetermined time or more.

  2. The three-phase voltage type inverter device according to means 1, wherein the predetermined period is set to approximately 60 degrees in electrical angle.

  According to the means 2, since the time width in which the zero voltage vector is generated approximately every 60 degrees in electrical angle is equal to or longer than a predetermined time, the phase current detection means detects the phase current at least approximately 60 degrees in electrical angle. It can be carried out.

  3. 3. The three-phase voltage type inverter device according to means 1 or 2, wherein a time width in which the zero voltage vector is generated is set to approximately 1 μsec or more.

  At the time of switching, ringing occurs in the pulse current due to stray inductance and wiring resistance of the inverter circuit. According to the means 3, the time width for generating the zero voltage vector is set to about 1 μsec or longer, which is longer than the ringing time. The phase current detection means can detect an accurate phase current.

  4). The three-phase voltage type according to any one of the means 1 to 3, wherein the PWM means performs two-phase modulation in which one of the three phases continuously stops switching for about 120 degrees in electrical angle. Inverter device.

  According to the means 4, the PWM means performs two-phase modulation in which one of the three phases continuously stops switching for about 120 degrees in terms of electrical angle. It can be made longer than when modulation is performed.

  5. The three-phase voltage type inverter apparatus according to claim 1, wherein the PWM means performs three-phase modulation or modulation in which a third harmonic is superimposed on the three-phase modulation.

  According to the means 5, since the PWM means performs the modulation in which the third harmonic is superimposed on the three-phase modulation or the three-phase modulation, the applied voltage at the time of over-modulation becomes symmetrical, and the phase current distortion can be reduced. .

  6). 3. The three-phase voltage type inverter device according to claim 1, wherein the PWM means performs two-phase modulation in which one of the three phases continuously stops switching for about 60 degrees in electrical angle.

  According to the means 6, since the PWM means performs two-phase modulation in which one of the three phases continuously stops switching for about 60 degrees with an electrical angle, the applied voltage at the time of overmodulation becomes symmetrical, Current distortion can be reduced.

7). A three-phase arm is constituted by each of the upper and lower switching elements connected between the DC buses, and a first shunt resistor is connected in series to the upper or lower two-phase arm in the three-phase arm. In a three-phase voltage type inverter device comprising: an inverter circuit in which a second shunt resistor is connected in series to the DC bus; and PWM means for switching-controlling each switching element constituting the three-phase arm by PWM modulation.
When the modulation factor by the PWM means is less than a predetermined threshold value, a phase current is detected by each first shunt resistor, and when the modulation factor is equal to or greater than the predetermined threshold value, the first A three-phase voltage type inverter device comprising phase current detecting means for detecting a phase current by a second shunt resistor.

  In the configuration in which the phase current is detected by the shunt resistor connected in series to the upper or lower two-phase arm in the three-phase arm of the inverter circuit, the phase current detecting means has the first shunt resistor during the zero voltage vector generation period. However, as the modulation rate increases, the zero voltage vector generation period decreases. According to the means 7, when the modulation rate by the PWM means is less than the predetermined threshold value, the phase current is detected by each first shunt resistor, and when the modulation rate is equal to or higher than the predetermined threshold value, The phase current detection means detects the phase current with a second shunt resistor connected in series with the DC bus, so it can detect the phase current even in a high modulation state including overmodulation, and can be used for motor control. The detected current amplitude and current phase can be detected.

  According to the three-phase voltage type inverter device of the present invention, it is possible to detect phase current even in a high modulation state including overmodulation, thereby enabling detection of current amplitude and current phase used for motor control. .

  Hereinafter, embodiments of a three-phase voltage type inverter device embodying the present invention will be described with reference to the drawings.

  First, an overall configuration of a three-phase voltage type inverter device (hereinafter referred to as an inverter device) 1 according to the first embodiment will be described with reference to the circuit diagram of FIG.

  The inverter device 1 includes an inverter circuit 2 that supplies driving power to each of the U-phase, V-phase, and W-phase of a three-phase AC motor (hereinafter referred to as a motor) M, and power to the motor M via the inverter circuit 2. Is constituted mainly by a DC power supply 3 for supplying power and a control circuit 4 for controlling the inverter circuit 2. The control circuit 4 constitutes phase current detection means and PWM means of the present invention.

  The inverter circuit 2 includes a U-phase upper switching element 2u, a U-phase lower switching element 2x, a V-phase upper switching element 2v, a V-phase lower switching element 2y, and a W-phase upper switching between the DC buses 2a and 2b. This is a three-phase inverter circuit having a well-known configuration in which six switching elements including an element 2w and a W-phase lower switching element 2z are bridge-connected. Further, the U-phase lower switching element 2x and the V-phase lower switching element 2y are connected in series with shunt resistors 10 and 11 for current detection, respectively, and the voltage at one end thereof is A / D converted by the control circuit 4. Is input to a device (ADC) 4a. A shunt resistor 12 is provided on the DC bus 2b as an overcurrent safety measure.

  The control circuit 4 is mainly composed of a microcomputer, and performs PWM control on the switching elements 2u, 2v, 2w, 2x, 2y, and 2z of the inverter circuit 2. The control circuit 4 includes an ADC 4a, and detects a phase current based on a voltage input to the ADC 4 from one end side of the shunt resistors 10 and 11.

Next, a method of generating a switching signal to each switching element by PWM modulation will be described using a space vector method. 2A is a diagram showing the basic voltage vector, FIG. 2B is a diagram showing the correspondence between the voltage vector and the switching element of the inverter circuit, and FIG. 2C is a diagram showing a shunt resistor on the lower arm. It is a figure which shows the flow of an electric current at the time of the phase current detection of the connected inverter circuit. In the space vector method, a command voltage vector is expressed by eight basic voltage vectors, and is converted into time to determine on / off of six switching elements. The basic voltage vectors are 2 ³ = 8 kinds of voltage vectors determined by a combination of on / off of six switching elements in the voltage type inverter. Further, as shown in FIG. 2A, the eight types of basic voltage vectors V0 to V7 have no magnitude with the six types of voltage vectors V1 to V6 that are different in phase by 60 degrees and have the same magnitude. It consists of two types of zero voltage vectors V0 and V7. Here, the eight types of vectors (Sa, Sb, Sc) correspond to eight switching modes, and as shown in FIG. 2B, the switching elements 2u, 2v, 2w of the upper arm of each phase are turned on. Sa, Sb, Sc are represented as “1”, and conversely, “0” is represented when the switching elements 2x, 2y, 2z of the lower arm are on. In this embodiment, a three-phase PWM voltage is generated by combining eight basic voltage vectors in any combination. Further, as shown in FIG. 2C, the U-phase is caused by the shunt resistor 10 during the generation period of the zero voltage vector V0 (0, 0, 0) in which all the switching elements 2x, 2y, 2z of the lower arm are turned on. The phase current Iu of the V-phase can be detected by the shunt resistor 11. The phase current Iw of the W phase is calculated from Iu and Iv because the relationship of Iu + Iv + Iw = 0 holds because the U phase, V phase, and W phase are bridge-connected.

  The control circuit 4 of the present embodiment performs PWM modulation by a two-phase modulation method in which one phase of three phases continuously stops switching for about 120 degrees with an electrical angle, and in particular, the modulation rate is a predetermined threshold value. In the case of T1 or more, PWM modulation for generating a zero voltage vector V0 having a time width of about 1 μsec or more by forcibly turning on all the switching elements 2x, 2y, 2z of the lower arm every 60 degrees in electrical angle. Is what you do. FIG. 3 is a graph showing the two-phase modulation of the first embodiment. The predetermined threshold value T1 is set to a modulation rate at which the zero voltage vector V0 generated within a period of 60 degrees in electrical angle is less than 1 μsec, for example.

  Here, in the present embodiment, the time of the zero voltage vector V0 that is forcibly generated when the modulation rate is equal to or greater than the predetermined threshold value T1 is set to approximately 1 μsec or more for the following reason. As shown in FIG. 4A, the inverter circuit 2 constitutes an RLC series resonance circuit including wiring resistance, stray inductance, and an electrostatic component of a switching element. For this reason, as shown in FIG. 4B, ringing occurs in the pulse current during switching. Therefore, in order to obtain an accurate current value, it is necessary to detect the current in a region where the current is stable by performing modulation with a pulse width longer than the ringing time. Since the ringing time is normally designed to be less than 1 μsec, an accurate phase current without the influence of ringing can be detected by setting the generation period of the zero voltage vector V0 to be approximately 1 μsec or more.

  Next, an example in which this embodiment is implemented and Comparative Examples 1 and 2 will be compared and described. First, Comparative Example 1 will be described. Comparative Example 1 is a case where PWM modulation is performed by a normal two-phase modulation method over the entire period of the electrical angle position, and FIG. 5 is a graph showing a generation period of a zero voltage vector at each electrical angle position of Comparative Example 1. It is. As the modulation rate increases to 25%, 50%,..., The zero voltage vector generation period becomes shorter. When the modulation factor is 25 to 75%, the zero voltage vector generation period is 1 μsec or more in the entire period of the electrical angle position of 0 to 360 degrees, so that the phase current can be detected in the entire period of the electrical angle position. At a modulation rate of 100%, the zero voltage vector generation period is 1 μsec or more near each of electrical angle positions of 0 °, 60 °, 120 °,... 360 °, and phase current is detected every 60 ° in electrical angle. Is possible. However, at a modulation rate of 125%, the zero voltage vector generation period is less than 1 μsec in the entire electrical angle position of 0 to 360 degrees, so that it is impossible to detect the phase current at all electrical angle positions.

  In the embodiment, the modulation factor threshold T1 is set to 105% in advance, and PWM modulation is performed by a two-phase modulation method in which one phase in three phases continuously stops switching for about 120 degrees at an electrical angle. In addition, when the modulation rate is equal to or greater than the threshold value T1 (= 105%), approximately 10 μsec is obtained by forcibly turning on all the switching elements 2x, 2y, 2z of the lower arm every 60 degrees in electrical angle. PWM modulation for generating a zero voltage vector V0 is performed. The PWM carrier is 15 kHz. FIG. 6 is a graph showing the generation period of the zero voltage vector at each electrical angle position in the example. Since the zero voltage vector generation period at the modulation rates of 25%, 50%, 75%, and 100% is the same as that of the first comparative example, the description thereof is omitted. At a modulation rate of 125%, the zero voltage vector generation period is approximately 10 μsec near each of the electrical angle positions 0 degrees, 60 degrees, 120 degrees,... 360 degrees, and the phase current is detected every 60 degrees electrical angle position. It is possible. This is because the modulation factor is equal to or greater than the threshold value T1 (125% ≧ 105%), and the control circuit 4 generates a zero voltage vector V0 of approximately 10 μsec every 60 degrees in electrical angle.

  Comparative Example 2 is a case where PWM modulation by the three-phase modulation method is performed, and FIG. 7 is a graph showing three-phase modulation in Comparative Example 2. FIG. 8 is a graph showing the generation period of the zero voltage vector of Comparative Example 2. By comparing FIG. 6 with FIG. 8, the zero voltage vector generation period continuously generated in each example at each modulation rate is longer than that in the comparative example 2, and the two-phase modulation method is adopted in the example. It can be seen that the period during which the phase current can be detected is longer. Further, since the frequency of occurrence of the peak value in the zero voltage vector generation period is every 60 degrees in the electrical angle in the embodiment, it is every 120 degrees in the comparative example 2, and therefore the frequency of the embodiment is higher. It can be seen that the phase current can be detected.

  As is clear from the above detailed description, according to the present embodiment, the control circuit 4 as the PWM means performs PWM modulation so that the time width in which the zero voltage vector is generated within a predetermined period is equal to or longer than the predetermined time. Therefore, even in a high modulation state including overmodulation in which the zero voltage vector generation period is reduced, the zero voltage vector is reliably generated, and the control circuit 4 as the phase current detection means within the generation period has the two-phase arm (U The phase current can be detected by the shunt resistors 10 and 11 connected in series to the phase arm and the V-phase arm, whereby the current amplitude and current phase used for motor control can be detected.

  Further, since the time width in which the zero voltage vector is generated approximately every 60 degrees in electrical angle is equal to or longer than the predetermined time, the phase current can be detected at least approximately 60 degrees in electrical angle.

  In addition, since the time width in which the zero voltage vector is generated is set to approximately 1 μsec or longer, which is longer than the ringing time, an accurate phase current can be detected.

  In addition, since the PWM means performs two-phase modulation in which one of the three phases continues and stops switching for about 120 degrees in electrical angle, the three-phase modulation is performed for the continuously generated zero voltage vector generation period. Can be longer.

  Next, a second embodiment of the present invention will be described. In the first embodiment described above, when the modulation rate exceeds a predetermined threshold value, the zero voltage vector V0 having a time width equal to or longer than a predetermined time is forcibly generated to detect the phase current within the period. However, in the present embodiment, when the modulation rate is less than a predetermined threshold value, the phase current is detected by each shunt resistor connected to the two-phase arm (hereinafter referred to as a two-shunt method). ), When the modulation factor is equal to or higher than a predetermined threshold value, the phase current is detected by a shunt resistor connected to the DC bus (hereinafter referred to as a one-shunt method). In addition, the same code | symbol is attached | subjected about the same member as 1st embodiment, and detailed description about them is abbreviate | omitted.

  FIG. 9 is a circuit diagram showing the overall configuration of the inverter device 1 ′ of the second embodiment. As shown in FIG. 9, in the inverter device 1 ′, the voltage at one end of the shunt resistors 10 and 11 connected in series to the switching elements 2x and 2y of the two-phase lower arm is used as a control circuit for detecting the phase current. In addition to being input to the four ADCs 4a, the voltage at one end of the shunt resistor 12 connected on the DC bus 2b is also input to the ADC 4a for detecting the phase current. The shunt resistors 10 and 11 constitute the first shunt resistor of the present invention, and the shunt resistor 12 constitutes the second shunt resistor.

  Hereinafter, the principle of phase current detection by the single shunt method in the shunt resistor 12 will be described. The detection of the phase current by the two-shunt method in the shunt resistors 10 and 11 is the same as described in the first embodiment, and thus the description thereof is omitted.

  The table of FIG. 10 represents the relationship between the basic voltage vectors V1 to V6, the switching pattern of each switching element corresponding to each basic voltage vector, and the type of phase current detected by the detected value of the DC bus current. . In the table of FIG. 10, the zero voltage vectors V0 and V7 are excluded. In the one shunt method, the shunt voltage is detected during the voltage vector generation period that is not the zero voltage vector, and the zero voltage vector V0 or V7 is This is because the phase current is not detected because no current flows through the shunt resistor 12.

  In the table of FIG. 10, each column of the U-phase arm, the V-phase arm, and the W-phase arm indicates the U, V, and W phases that are turned on when the basic voltage vectors V1 to V6 shown at the left end of the table are generated. The “High” indicates that the switching element of the upper arm is turned on, and “Low” indicates that the switching element of the lower arm is turned on. The column of the detected phase current (Idc) indicates the type of phase current equal to the detected value Idc of the DC bus current when each of the basic voltage vectors V1 to V6 shown at the left end is generated, and Iu, Iv, and Iw are The phase currents flowing from the inverter circuit 2 to the U phase, V phase, and W phase of the motor M are respectively represented as -Iu, -Iv, and -Iw from the U phase, V phase, and W phase of the motor M to the inverter circuit 2, respectively. It represents the flowing phase current.

  For example, when the basic voltage vector V2 is generated, as shown in FIG. 11, the switching element 2u of the U-phase upper arm, the switching element 2v of the V-phase upper arm, and the switching element 2z of the W-phase lower arm are turned on. The DC bus current Idc flowing through the shunt resistor 10 instantaneously is equal to the W-phase current -Iw.

  Next, it will be described that the phase current can be detected at any modulation rate according to the present embodiment. FIG. 12 is a graph showing the relationship between the modulation rate and the voltage vector generation period in which the phase current can be detected for the two-shunt method and the one-shunt method. As is clear from FIG. 12, in the two-shunt method, the voltage vector generation period in which the phase current can be detected becomes shorter as the modulation rate becomes higher, and is 0 μsec at the modulation rate of 125%. On the other hand, the voltage vector generation period of the one shunt method becomes longer as the modulation rate becomes higher. In the modulation rate of 25% to 75%, the voltage vector generation period is longer in the 2-shunt method, and in the modulation rate of 100% and 125%, the voltage vector generation period is longer in the one-shunt method. In the present embodiment, the modulation factor threshold value T2 is set to a value between 75% and 100% (for example, 90%), and when the modulation factor is less than the threshold value T2, the phase current is determined by the two-shunt method. When the modulation factor is equal to or greater than the threshold value T2, the phase current is detected by the single shunt method, so that the phase current can be detected at any modulation factor. In the graph of FIG. 12, a plot of the voltage vector generation period in which the phase current detection is performed in the present embodiment is surrounded by circles.

  As is clear from the above detailed description, according to the present embodiment, when the modulation rate is less than the predetermined threshold value T2, the phase current is reduced by the shunt resistors 10 and 11 connected in series to the two-phase arm. If the modulation factor is equal to or greater than the predetermined threshold value T2, the phase current is detected by the shunt resistor 12 connected in series to the DC bus 2b, so that the phase current detection can be performed even in a high modulation state including overmodulation. This makes it possible to detect the current amplitude and phase used for motor control.

  In addition, this invention is not limited to each embodiment mentioned above, A various change is possible in the range which does not deviate from the main point of this invention.

  For example, the predetermined threshold values T1 and T2, the cycle for generating the zero voltage vector, and the time width of the zero voltage vector shown in the above embodiments are merely examples, and the inverter to which the present invention is applied It is set as appropriate depending on circuit specifications, driving conditions, and the like. The two-phase arm to which the shunt resistors 10 and 11 are connected is not limited to the combination of the U phase and the V phase described above, and any two-phase arm in the three phases of the U phase, the V phase, and the W phase can be used. Just choose.

  In the first embodiment, the PWM modulation is performed by the two-phase modulation method. However, the PWM modulation may be performed by the three-phase modulation method, and the third harmonic is superimposed on the three-phase modulation. It is good also as a structure which modulates. FIG. 13 is a graph showing a modulation method in the first modified example in which the third harmonic is superimposed on the three-phase modulation. FIG. 14A is a graph showing changes in the line voltage in the first modified example, and FIG. 14B is a graph showing changes in the U-phase phase current. Vuv represents the U-phase to V-phase line voltage, Vvw represents the V-phase to W-phase line voltage, and Vwu represents the W-phase to U-phase line voltage. FIG. 15A is a graph showing changes in line voltage in Comparative Example 3 in which two-phase modulation is performed, and FIG. 15B is a graph showing changes in U-phase phase current. As shown in FIG. 15A, in Comparative Example 3, the voltage waveform is distorted at the portion where the polarity of the line voltage changes from positive to negative, but in this modification example, as shown in FIG. Thus, it can be seen that the voltage waveform is symmetrical. In Comparative Example 3, as shown in FIG. 15B, phase current distortion occurs near the electrical angle position of 180 degrees. In this modification, as shown in FIG. It can be seen that the distortion is reduced. Therefore, according to this modification, the motor M can be rotated more smoothly.

  Moreover, in said 1st embodiment, you may make it perform the two-phase modulation | alteration which stops the phase for about 60 degree | times for one phase in three phases continuously by an electrical angle. FIG. 16 is a graph showing two-phase modulation in the second modification in which one phase among the three phases is continuously switched at an electrical angle for a period of about 60 degrees. FIG. 17A is a graph showing changes in the line voltage in the second modified example, and FIG. 17B is a graph showing changes in the U-phase phase current. In this modification, it can be seen that the voltage waveform is symmetrical as shown in FIG. Moreover, in this modification, as shown in FIG.17 (b), it turns out that the distortion of a phase current has decreased. Therefore, according to this modification, the motor M can be rotated more smoothly.

  In the first embodiment, the shunt resistors 10 and 11 are connected to the lower arm. However, as in the third modification shown in FIG. 18, the switching elements 2 u and 2 v of the upper arm are connected to each other. The current detection shunt resistors 10 and 11 may be connected in series. In this modification, during the generation period of the zero voltage vector V7 (1, 1, 1) in which all the switching elements 2u, 2v, 2w of the upper arm are turned on, the two shunt resistors 10, 11 connected to the upper arm. Thus, the phase current can be detected.

  The present invention is applicable to a three-phase voltage type inverter device having an inverter circuit using a switching element used for power control of a motor.

It is a circuit diagram which shows the electrical circuit structure of the three-phase voltage type | mold inverter apparatus of 1st embodiment of this invention. (A) is a figure which shows a basic voltage vector, (b) is a figure which shows a response | compatibility with a voltage vector and the switching element of an inverter circuit, (c) is a phase in the inverter circuit which connected shunt resistance to the lower arm. It is a figure which shows the flow of the electric current at the time of electric current detection. It is a graph which shows the two-phase modulation in 1st embodiment. (A) is a figure which shows that the inverter circuit comprises the RLC series resonance circuit, (b) is a figure which shows generation | occurrence | production of the ringing in a pulse current. 6 is a graph showing a generation period of a zero voltage vector in Comparative Example 1. It is a graph which shows the generation | occurrence | production period of the zero voltage vector in an Example. 10 is a graph showing three-phase modulation in Comparative Example 2. 10 is a graph showing a generation period of a zero voltage vector in Comparative Example 2. It is a circuit diagram which shows the electrical circuit structure of the three-phase voltage type | mold inverter apparatus of 2nd embodiment. It is a table | surface which shows the relationship between a basic voltage vector, a switching pattern, and a detection phase current. It is a figure explaining the principle by which phase current -Iw is detected by detection of DC bus current at the time of basic voltage vector V2 generation. It is a graph showing the relationship between the modulation rate and the voltage vector generation period in which phase current detection is possible for the two-shunt method and the one-shunt method. It is a graph which shows the modulation | alteration which superimposed the 3rd harmonic on the three phase modulation in a 1st modification. (A) is a graph which shows the change of the line voltage in a 1st modification, (b) is a graph which shows the phase current change of U phase. (A) is a graph which shows the change of the line voltage in the comparative example 3, (b) is a graph which shows the phase current change of U phase. It is a graph which shows the two-phase modulation | alteration which one phase in the three phases in a 2nd modification stops a period for about 60 degree | times with an electrical angle continuously. (A) is a graph which shows the change of the line voltage in a 2nd modification, (b) is a graph which shows the phase current change of U phase. It is a figure which shows the flow of the electric current at the time of phase current detection in the inverter circuit which connected shunt resistance to the upper stage arm of the 3rd modification.

Explanation of symbols

1 Three-phase voltage type inverter device (first embodiment)
1 'Three-phase voltage type inverter device (second embodiment)
2 Inverter circuit 2u, 2v, 2w Switching element (upper arm)
2x, 2y, 2z switching element (lower arm)
4 Control circuit (phase current detection means, PWM means)
4a A / D converter 10 Shunt resistor (first shunt resistor)
11 Shunt resistance (first shunt resistance)
12 Shunt resistance (second shunt resistance)

Claims (7)

An inverter circuit in which a three-phase arm is constituted by each of the upper and lower switching elements connected between the DC buses, and a shunt resistor is connected in series to the upper or lower two-phase arm in the three-phase arm; In a three-phase voltage type inverter device comprising phase current detection means for detecting a phase current by each shunt resistor, and PWM means for controlling switching of each switching element constituting the three-phase arm by PWM modulation,
The three-phase voltage type inverter apparatus, wherein the PWM means performs PWM modulation so that a time width in which a zero voltage vector is generated within a predetermined period is equal to or longer than a predetermined time.   The three-phase voltage type inverter device according to claim 1, wherein the predetermined period is approximately 60 degrees in electrical angle.   3. The three-phase voltage type inverter device according to claim 1, wherein a time width in which the zero voltage vector is generated is set to approximately 1 μsec or more.   The three-phase voltage according to any one of claims 1 to 3, wherein the PWM means performs two-phase modulation in which one of the three phases continuously stops switching for about 120 degrees in electrical angle. Type inverter device.   The three-phase voltage type inverter device according to claim 1, wherein the PWM means performs three-phase modulation or modulation in which a third-order harmonic is superimposed on the three-phase modulation.   2. The three-phase voltage type inverter device according to claim 1, wherein the PWM means performs two-phase modulation in which one of the three phases continuously stops switching for about 60 degrees in electrical angle. A three-phase arm is constituted by each of the upper and lower switching elements connected between the DC buses, and a first shunt resistor is connected in series to the upper or lower two-phase arm in the three-phase arm. In a three-phase voltage type inverter device comprising: an inverter circuit in which a second shunt resistor is connected in series to the DC bus; and PWM means for switching-controlling each switching element constituting the three-phase arm by PWM modulation.
When the modulation factor by the PWM means is less than a predetermined threshold value, a phase current is detected by each of the first shunt resistors, and when the modulation factor is not less than the predetermined threshold value, the first A three-phase voltage type inverter device comprising phase current detecting means for detecting a phase current by a second shunt resistor.

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