JP2006202974A - Electronic device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic device having a plurality of reliable bump electrodes, where working conditions, such as temperature and pressure, related to the formation of an electrode are not limited by each peculiar condition of an electronic device or the like provided on a device substrate. <P>SOLUTION: The device substrate 4 on the surface of which the electronic device or the like 5 and a pad electrode 6 are provided is prepared. Then, a via-hole 3 is formed on a first support substrate 1 made of glass or the like instead of on a device substrate 4, and the first support substrate 1 is adhered onto the surface of the device substrate 4 so that the bottom section of the via-hole 3 overlaps with the surface of the pad electrode 6. A bump electrode 10 is formed in the via-hole 3 via a barrier metal layer 8. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an electronic device including a plurality of bump electrodes.

  In recent years, WCSP (Wafer Level Chip Size Package) has attracted attention as a new packaging technology. WCSP refers to a small package having an outer dimension substantially the same as the outer dimension of a semiconductor chip. As an example, a BGA (Ball Grid Array) type electronic device will be described below.

  Conventionally, a BGA type electronic device having a through electrode is known as a kind of WCSP. This BGA type electronic device has a through electrode that penetrates through a semiconductor substrate and is connected to a pad electrode on the surface thereof. A plurality of ball-shaped conductive terminals made of a metal member such as solder are arranged on the back surface of the electronic device, and these conductive terminals are connected to the through electrode through a wiring layer.

  When incorporating this BGA type electronic device into an electronic device, each conductive terminal is crimped to a wiring pattern on the printed circuit board to electrically connect the semiconductor chip and the external circuit mounted on the printed circuit board. Connected.

  Such BGA type electronic devices are provided with a larger number of conductive terminals than other CSP type semiconductor devices such as SOP (Small Outline Package) and QFP (Quad Flat Package) having lead pins protruding from the side. It has the advantage that it can be reduced in size. This BGA type electronic device has an application as an image sensor chip of a digital camera mounted on, for example, a mobile phone.

  FIG. 5 is a cross-sectional view of a through electrode portion of a conventional BGA type electronic device. On the surface of the device substrate 100 made of silicon (Si) or the like, a semiconductor device such as a charge coupled device (CCD) is provided, and a pad electrode 101 is formed via an interlayer insulating film 102. A support substrate 103 such as a glass substrate is bonded to the surface of the device substrate 100 via a resin layer 104 made of an epoxy resin or the like.

A via hole 105 that penetrates the device substrate 100 and reaches the pad electrode 101 is formed. An insulating film 106 made of a silicon oxide film (SiO ₂ film) or a silicon nitride film (SiN film) is formed on the side wall of the via hole 105 and the back surface of the device substrate 100.

  Further, a barrier layer 107 and a through electrode 108 connected to the pad electrode 101 are formed in the via hole 105. A wiring layer 109 continuously connected to the through electrode 108 extends on the surface of the device substrate 100. A protective layer 110 made of a solder resist is formed so as to cover the through electrode 108, the wiring layer 109, and the insulating film 106 on the back surface of the device substrate 100. An opening is formed in the protective layer 110 on the wiring layer 109, and a ball-shaped conductive terminal 111 connected to the wiring layer 109 through the opening is formed.

As described above, in the conventional BGA type semiconductor device, the through electrode 108 is formed on the device substrate 100, and the conductive terminal 111 for electrical connection with an external circuit is formed on the back surface of the device substrate 100.
JP 2003-309221 A JP-A-10-92702 JP 2001-351892 A

  However, in the above-described BGA type electronic apparatus, due to the unique circumstances of each of the electronic devices provided on the device substrate 100, there are working conditions such as temperature conditions and atmospheric pressure conditions in the process of forming the through electrodes 108 on the device substrate 100. There may be restrictions. Further, in the process of forming the through electrode 108, there is a problem that the electronic device on the surface of the device substrate 100 is deteriorated and the yield of the electronic device is lowered.

  In addition, there are problems with the connection strength of the ball-shaped conductive terminals 111 connected to the wiring layer 109, and problems with temperature cycles and drop strength when mounted on a semiconductor device or printed circuit board via the conductive terminals 111. It was.

  Therefore, conventionally, an underfill is provided in a gap between the wiring layer 109 and the conductive terminal 111, a buffer layer is provided under the conductive terminal, or a long metal post is formed under the conductive terminal (bump electrode) (stress distribution). ) Etc. Therefore, the process was complicated.

  The present invention has been made in view of the above problems, and its main features are as follows. That is, the electronic device of the present invention includes a pad electrode formed on a device substrate, a first support substrate bonded to the surface of the device substrate, and a surface of the pad electrode from the surface of the first support substrate. And a bump electrode formed in the via hole and electrically connected to the pad electrode.

  The electronic device manufacturing method according to the present invention has the following features. That is, the method for manufacturing an electronic device according to the present invention includes a step of forming a via hole reaching the back surface from the front surface of the first support substrate, and the via hole so as to overlap the pad electrode formed on the surface of the device substrate. A step of bonding the first support substrate; and a step of forming a bump electrode electrically connected to the pad electrode in the via hole.

  Furthermore, the method for manufacturing an electronic device according to the present invention includes a step of bonding a first support substrate to a surface of a device substrate, a step of forming a via hole reaching the back surface from the surface of the first support substrate, Forming a bump electrode electrically connected to the pad electrode formed on the surface of the device substrate in the via hole. Therefore, a via hole may be formed in the first support substrate 1 after the first support substrate is bonded to the device substrate.

  According to the electronic device and the manufacturing method thereof according to the present invention, the electrodes are formed not on the device substrate side but on the support substrate side. Therefore, depending on the specific circumstances of each electronic device provided on the device substrate, the electrode formation step Therefore, the working conditions are not limited, and it is suitable for fine processing of electronic devices. In addition, since a process for forming a through electrode on a device substrate is not required as in the prior art, manufacturing costs can be reduced, deterioration of electronic devices on the surface of the device substrate can be prevented, and the yield of electronic devices can be increased. it can.

  Further, in the electronic device and the manufacturing method thereof according to the present invention, since the bump electrode is directly embedded in the via hole provided in the predetermined region (bump electrode formation region) of the support substrate, wiring is unnecessary and the process is simplified. There is an advantage that can be made. Further, since the bump electrode is embedded in the via hole provided in the support substrate, the configuration and process are simple and the connection strength between the bump electrode and the pad electrode is improved.

  Next, embodiments of the present invention will be described with reference to the drawings. First, the structure of the electronic device according to the present invention will be described with reference to FIG.

  FIG. 4B is a top view (for one chip) related to the first support substrate 1 of the electronic device of the present invention, and FIG. 4C is a top view related to the device substrate 4 of the electronic device of the present invention. 1 chip). FIG. 4A is a cross-sectional view of the electronic device taken along line XX in FIGS. 4B and 4C.

  On the surface of the device substrate 4 made of a semiconductor such as silicon (Si), a semiconductor device such as a CCD or a device (MEMS device) using a micro electro mechanical system is provided. . Hereinafter, these devices are abbreviated as “electronic devices 5”.

  Further, a pad electrode 6 made of aluminum (Al) or copper (Cu) is formed on the surface of the device substrate 4. Further, the electronic device 5 and the pad electrode 6 are electrically connected using a wiring (not shown). These wirings are formed with a thickness of 1 μm, for example. Note that the device substrate 4 may be made of an insulator such as glass, ceramic, or quartz.

Further, a passivation film 20 for protecting the wiring (not shown) is formed so as to cover a part of the pad electrode 6 and the device substrate 4. Here, the passivation film 20 is preferably made of a silicon oxide film (SiO ₂ film) or a silicon nitride film (SiN film), but is not limited thereto.

  The first support substrate 1 is bonded to the surface of the device substrate 4 via a resin layer (not shown) made of, for example, an epoxy resin. Similarly, the second support substrate 7 is bonded to the back surface of the device substrate 4 via a resin layer (not shown). By providing this second support substrate 7, it is possible to maintain strength measures during process operations, particularly strength when evacuated. In the electronic device according to the present embodiment, the second support substrate 7 is provided. However, the configuration is not limited to this, and the second support substrate 7 may not be provided.

In addition, the first support substrate 1 and the second support substrate 7 are preferably made of an insulator such as glass, ceramic, or quartz, but may be made of a semiconductor such as silicon.
Here, a cavity 2 is formed in a space between the back surface of the first support substrate 1 and the surface of the device substrate 4, and an electronic device 5 or the like is sealed in the cavity 2. Here, the height of the cavity 2 is about several μm to several tens of μm, but is not limited thereto.

The cavity 2 seals the electronic device 5 or the like in a vacuum state or a state filled with an inert gas (for example, N ₂ ). Thereby, since the sealed electronic device 5 or the like is not exposed to the atmosphere, corrosion and deterioration due to oxidation or the like can be prevented. Therefore, the lifetime and reliability of the electronic device 5 etc. formed on the device substrate 4 can be improved. The electronic device according to the present embodiment has a configuration in which the cavity 2 is provided. However, the configuration is not limited thereto, and a configuration in which the cavity 2 is not provided may be used.

  The first support substrate 1 is formed with a via hole 3 that penetrates the first support substrate 1 and reaches the pad electrode 6. Here, the via hole 3 is formed in a tapered shape that becomes thinner as the cross section becomes deeper from the surface. Thereby, when the bump electrode 10 is formed as will be described later, there is an advantage that the barrier metal layer 8 for plating can be formed by a sputtering method. The via hole 3 is preferably tapered, but may be processed into a straight shape.

  A barrier metal layer 8 made of, for example, Cu (copper), nickel (Ni), gold (Au), titanium tungsten (TiW), or the like is formed on the sidewall of the via hole 3. A bump electrode 10 made of solder, gold (Au), or the like is formed in the via hole 3. The bump electrode 10 is electrically connected to the pad electrode 6 through the barrier metal layer 8 at the bottom of the via hole 3. It is connected. In this way, wiring from the pad electrode 6 on the device substrate 4 to the bump electrode 10 formed on the surface of the first support substrate 1 is possible.

  In the electronic device according to the present invention, the first support substrate 1 and the device substrate 4 may be made of the same substrate material. According to such a configuration, it is possible to prevent the contact between the bump electrode 10 according to the first support substrate 1 and the pad electrode 6 according to the device substrate 4 from being deteriorated due to a temperature cycle (difference in expansion coefficient), and It is possible to prevent the air density in the cavity 2 from being lowered by the temperature cycle.

Next, a method for manufacturing the electronic device will be described with reference to FIGS.
First, as shown in FIG. 1A, a first support substrate 1 made of glass, ceramic or the like is prepared. Here, the first support substrate is preferably made of an insulator such as glass, ceramic, or quartz, but may be made of a semiconductor such as silicon.

  Next, as shown in FIG. 1B, the cavity 2 is processed into, for example, a concave shape on the back surface of the first support substrate by a method such as etching or laser beam irradiation. Here, the height of the cavity 2 is about several μm to several tens of μm, but is not limited thereto.

  Next, as shown in FIG. 1C, a via hole 3 reaching the back surface from the front surface of the first support substrate 1 is formed by a method such as etching or laser beam irradiation. The via hole 3 may be formed after the first support substrate 1 and the device substrate 4 are bonded. The via hole 3 is preferably tapered, but may be processed into a straight shape.

  If the first support substrate 1 is made of a semiconductor such as silicon, the first support substrate 1 and the bump electrode 10 to be formed later are insulated after the via hole 3 is formed. An insulating film such as a silicon oxide film or a nitride film is formed on the surface of one support substrate 1. Therefore, when the first support substrate 1 is made of an insulator such as glass, the manufacturing process can be reduced because the step of forming the insulating film is not required.

  Next, as shown in FIG. 2A, a device substrate 4 having electronic devices 5 formed on the substrate surface is prepared. Further, on the surface of the device substrate 4, a pad electrode 6 that is an external connection electrode electrically connected to the electronic device 5 or the like using a wiring (not shown) is formed.

Further, a passivation film 20 for protecting the wiring is formed so as to cover a part of the pad electrode 6 and the device substrate 4. Here, the pad electrode 6 is made of, for example, aluminum (Al) or copper (Cu), and preferably has a film thickness of about 1 μm. The passivation film 20 is preferably made of a silicon oxide film (SiO ₂ film) or a silicon nitride film (SiN film).

  A second support substrate 7 is formed on the back surface of the device substrate 4 as necessary. The second support substrate 7 is bonded to the back surface of the device substrate 4 through a resin layer (not shown) made of epoxy resin or the like. By providing the second support substrate 7, it is possible to maintain strength measures at the time of subsequent process work, particularly strength when evacuated.

  Next, a resin layer (not shown) made of, for example, an epoxy resin is applied to the surface of the device substrate 4. Then, as shown in FIG. 2B, the first support substrate 1 in which the via hole 3 has already been formed on the surface of the device substrate 4 through this resin layer is connected to the bottom of the via hole 3 and the surface of the pad electrode 6. Adhere so that they overlap.

When the electronic device 5 or the like is sealed in a vacuum state or filled with an inert gas (for example, N ₂ ), the device substrate 4 and the first support substrate 1 are bonded via a resin layer. It is preferable to adhere by a room-temperature bonding method instead of. In this case, the adhesion through the resin layer is not suitable for vacuum sealing or gas sealing because there are many problems such as gas coming out of the resin, adhesion strength, resin cracking, and reliability degradation with respect to temperature cycle. Because.

  Note that the room temperature bonding method is a method in which the surfaces to be bonded surfaces of the objects to be bonded are cleaned by irradiating energy waves (plasma, ion beam, electron beam, radical beam, laser, etc.) and the objects to be bonded are bonded at room temperature. This is a technology (see Japanese Patent Application Laid-Open Nos. 10-92702 and 2001-351892). In addition, although it is normal temperature here, in order to improve joining strength, it can also carry out under a heating.

  As described above, after the first support substrate 1 and the device substrate 4 are bonded, the via hole 3 may be formed in the first support substrate 1 by a method such as etching or laser beam irradiation.

  Next, as shown in FIG. 2C, a barrier metal layer 8 is formed on the side wall in the via hole 3. Since this barrier metal layer 8 is located below the bump electrode 10 in a later step, it is also called UBM (Under Bump Metal). When the bump electrode 10 made of gold is formed, the barrier metal layer 8 is an Au layer / TiW layer formed by sequentially sputtering, for example, titanium tungsten alloy (TiW) and gold (Au).

  Although not shown, the upper Au layer has a thickness of 100 nm to 200 nm, and the lower TiW layer has a thickness of about 200 nm, but is not limited thereto. The barrier metal layer 8 is a Cu layer / TiW layer formed by sequentially sputtering, for example, titanium tungsten alloy (TiW) and copper (Cu) when the bump electrode 10 made of solder is formed. is there. A nickel (Ni) layer may be the lower layer. In this case, a nickel (Ni) layer can be formed by electrolytic plating.

  Next, as shown in FIG. 3A, the surface of the first support substrate 1 is covered to form a resist layer 9 made of a resist material such as a solder resist. Here, by performing exposure / development processing using a predetermined mask, an opening is formed at a position corresponding to the via hole 3 in the resist layer 9, that is, a position corresponding to the bump electrode formation region.

  Then, by electrolytic plating, solder or gold is plated on a predetermined region of the barrier metal layer 8 exposed at the opening, and the surface of the first support substrate 1 is formed as shown in FIG. A bump electrode 10 is formed. When the bump electrode 10 made of solder is formed, the solder is screen printed on a predetermined region of the barrier metal layer 8 exposed at the opening by screen printing, and the solder is reflowed by heat treatment. Thus, the bump electrode 10 can be formed.

Although not shown, unnecessary portions of the barrier metal layer 8 are removed by chemical treatment using the bump electrodes 10 as a mask, if necessary. Here, when the barrier metal layer 8 is composed of an Au layer / TiW layer, aqua regia is used to etch the upper Au layer, and hydrogen peroxide (H ₂ O) is used to etch the lower TiW layer. ₂ ) is used. With this treatment, the barrier metal layer 8 remains only under the bump electrode 10.

  In this way, wiring from the pad electrode 6 on the device substrate 4 to the bump electrode 10 formed on the surface of the first support substrate 1 is possible. Then, along a predetermined dicing line of the device substrate 4, it is cut by a dicing blade, a laser beam or the like, and divided into individual chips.

  In the above-described embodiment, the formation of the bump electrode 10 made of solder or gold (Au) has been described as an example. However, the present invention is not limited to this, and the formation of the bump electrode using other materials is not limited thereto. Is also widely applicable.

It is sectional drawing explaining the electronic device of this invention, and its manufacturing method. It is sectional drawing explaining the electronic device of this invention, and its manufacturing method. It is sectional drawing explaining the electronic device of this invention, and its manufacturing method. It is sectional drawing explaining the electronic device of this invention, and its manufacturing method. It is sectional drawing explaining the electronic device which concerns on a prior art example.

Explanation of symbols

1 First support substrate 2 Cavity 3 Via hole
4 Device substrate 5 Electronic device etc. 6 Pad electrode 7 Second support substrate 8 Barrier metal layer 9 Resist layer 10 Bump electrode 20 Passivation film
DESCRIPTION OF SYMBOLS 100 Device substrate 101 Pad electrode 102 Interlayer insulating film 103 Support substrate 104 Resin layer 105 Via hole 106 Insulating film 107 Barrier layer 108 Through electrode 109 Wiring layer 110 Protective layer 111 Conductive terminal

Claims (16)

A pad electrode formed on the device substrate;
A first support substrate bonded to the surface of the device substrate;
A via hole reaching the surface of the pad electrode from the surface of the first support substrate;
An electronic device comprising: a bump electrode formed in the via hole and electrically connected to the pad electrode. The electronic device according to claim 1, wherein the bump electrode is made of solder or gold. The electronic device according to claim 1, wherein the via hole has a tapered cross section. The electronic apparatus according to claim 1, further comprising a cavity between the device substrate and the first support substrate. 5. The electronic device according to claim 1, wherein the first support substrate is made of a semiconductor substrate or an insulating substrate. 6. The electronic apparatus according to claim 1, wherein the device substrate and the first support substrate use the same substrate material. 7. The device according to claim 1, further comprising a second support substrate bonded to the back surface of the device substrate. 8. Electronic equipment. 8. The electronic device according to claim 7, wherein the second support substrate is made of a semiconductor substrate or an insulating substrate. 6. A semiconductor device or a MEMS device is formed on the device substrate, wherein the semiconductor device or the MEMS device is formed. 9. The electronic device according to any one of 8. The device substrate is made of a semiconductor substrate or an insulating substrate, wherein the device substrate is a semiconductor substrate or an insulating substrate. Item 10. The electronic device according to any one of Items 9. Forming a via hole reaching the back surface from the front surface of the first support substrate;
Bonding the first support substrate so that the via hole overlaps a pad electrode formed on the surface of the device substrate;
Forming a bump electrode electrically connected to the pad electrode in the via hole. Bonding a first support substrate to the surface of the device substrate;
Forming a via hole reaching the back surface from the front surface of the first support substrate;
Forming a bump electrode electrically connected to a pad electrode formed on the surface of the device substrate in the via hole. The method of manufacturing an electronic device according to claim 11, wherein the via hole is processed into a tapered shape. The method for manufacturing an electronic device according to claim 11, further comprising a step of forming a cavity on a back surface of the first support substrate. The method for manufacturing an electronic device according to claim 11, further comprising a step of bonding a second support substrate to a back surface of the device substrate. 16. The method according to claim 11, further comprising a step of dividing the device substrate into a plurality of chips after forming the bump electrodes. A method for manufacturing an electronic device.

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