JP2006120870A - 配線形成方法及び装置 - Google Patents

配線形成方法及び装置 Download PDF

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Publication number
JP2006120870A
JP2006120870A JP2004307354A JP2004307354A JP2006120870A JP 2006120870 A JP2006120870 A JP 2006120870A JP 2004307354 A JP2004307354 A JP 2004307354A JP 2004307354 A JP2004307354 A JP 2004307354A JP 2006120870 A JP2006120870 A JP 2006120870A
Authority
JP
Japan
Prior art keywords
wiring
film
conductive film
forming
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004307354A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006120870A5 (https=
Inventor
Akira Fukunaga
明 福永
Manabu Tsujimura
学 辻村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ebara Corp
Original Assignee
Ebara Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ebara Corp filed Critical Ebara Corp
Priority to JP2004307354A priority Critical patent/JP2006120870A/ja
Priority to US11/254,789 priority patent/US20060086618A1/en
Publication of JP2006120870A publication Critical patent/JP2006120870A/ja
Publication of JP2006120870A5 publication Critical patent/JP2006120870A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/043—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for electroplating
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D17/00—Constructional parts, or assemblies thereof, of cells for electrolytic coating
    • C25D17/001—Apparatus specially adapted for electrolytic coating of wafers, e.g. semiconductors or solar cells
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/12—Semiconductors
    • C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/46—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a liquid
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H10P52/20—Electromechanical polishing [EMP]; Electrochemical mechanical polishing [ECMP]
    • H10P52/203—Electromechanical polishing [EMP]; Electrochemical mechanical polishing [ECMP] of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/04—Planarisation of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/037—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics the barrier, adhesion or liner layers being on top of a main fill metal
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electroplating Methods And Accessories (AREA)
JP2004307354A 2004-10-21 2004-10-21 配線形成方法及び装置 Pending JP2006120870A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2004307354A JP2006120870A (ja) 2004-10-21 2004-10-21 配線形成方法及び装置
US11/254,789 US20060086618A1 (en) 2004-10-21 2005-10-21 Method and apparatus for forming interconnects

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004307354A JP2006120870A (ja) 2004-10-21 2004-10-21 配線形成方法及び装置

Publications (2)

Publication Number Publication Date
JP2006120870A true JP2006120870A (ja) 2006-05-11
JP2006120870A5 JP2006120870A5 (https=) 2007-07-19

Family

ID=36205204

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004307354A Pending JP2006120870A (ja) 2004-10-21 2004-10-21 配線形成方法及び装置

Country Status (2)

Country Link
US (1) US20060086618A1 (https=)
JP (1) JP2006120870A (https=)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009064803A (ja) * 2007-09-04 2009-03-26 Renesas Technology Corp 半導体装置
JP2010512002A (ja) * 2006-11-30 2010-04-15 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド 銀を含む配線を有する半導体構造及びその形成方法
JP2011523780A (ja) * 2008-05-21 2011-08-18 インターナショナル・ビジネス・マシーンズ・コーポレーション 導電性コンタクトの組み込みのための構造体及びプロセス
US8198730B2 (en) 2007-01-10 2012-06-12 Nec Corporation Semiconductor device and method of manufacturing the same
KR101458038B1 (ko) * 2006-11-30 2014-11-03 글로벌파운드리즈 인크. 은을 포함한 배선을 구비한 반도체 구조체와 그 형성 방법

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2381008A2 (en) * 2006-08-28 2011-10-26 Osaka University Catalyst-aided chemical processing method and apparatus
JP2008141088A (ja) * 2006-12-05 2008-06-19 Nec Electronics Corp 半導体装置の製造方法
US20130052368A1 (en) * 2010-03-19 2013-02-28 Sigma-Aldrich Co. Llc Methods for preparing thin films by atomic layer deposition using hydrazines
TW202138115A (zh) * 2019-12-24 2021-10-16 日商荏原製作所股份有限公司 基板處理裝置、基板處理方法及基板處理系統

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7135404B2 (en) * 2002-01-10 2006-11-14 Semitool, Inc. Method for applying metal features onto barrier layers using electrochemical deposition
EP1204139A4 (en) * 2000-04-27 2010-04-28 Ebara Corp ROTATING BRACKET AND ARRANGEMENT FOR MACHINING SEMICONDUCTOR SUBSTRATES
JP4644926B2 (ja) * 2000-10-13 2011-03-09 ソニー株式会社 半導体製造装置および半導体装置の製造方法
JP3664669B2 (ja) * 2001-06-27 2005-06-29 株式会社荏原製作所 電解めっき装置
US7223685B2 (en) * 2003-06-23 2007-05-29 Intel Corporation Damascene fabrication with electrochemical layer removal

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010512002A (ja) * 2006-11-30 2010-04-15 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド 銀を含む配線を有する半導体構造及びその形成方法
KR101458038B1 (ko) * 2006-11-30 2014-11-03 글로벌파운드리즈 인크. 은을 포함한 배선을 구비한 반도체 구조체와 그 형성 방법
US8198730B2 (en) 2007-01-10 2012-06-12 Nec Corporation Semiconductor device and method of manufacturing the same
JP2009064803A (ja) * 2007-09-04 2009-03-26 Renesas Technology Corp 半導体装置
JP2011523780A (ja) * 2008-05-21 2011-08-18 インターナショナル・ビジネス・マシーンズ・コーポレーション 導電性コンタクトの組み込みのための構造体及びプロセス

Also Published As

Publication number Publication date
US20060086618A1 (en) 2006-04-27

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