JP2006114822A - 半導体装置の製造方法 - Google Patents
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Abstract
【解決手段】半導体基板100の一方の主面側へ不純物ドーピングによる機能領域の形成とアルミニウム電極10を選択的に形成する工程、前記半導体基板を所定の厚さに減厚するために他方の主面側を研削する工程、前記他方側の研削後の主面に半田接続可能な金属電極膜5をPVD法により形成する工程とをこの順に少なくとも含む半導体装置の製造方法において、前記アルミニウム電極10を選択的に形成する工程の後の前記いずれかの工程の前に、半導体基板1の一方の主面側にのみ半田接続可能な金属メッキ6処理を行なう半導体装置の製造方法とする。
【選択図】 図1
Description
一方、パワー半導体装置は一般に許容電流値が信号用レベルのものに比べて相対的に多いので、当然ながら、発熱量も大きい。この発熱は主として半導体装置内部のシリコン基板(チップ)の中心に近い高抵抗層で生じる。半導体装置は通常、シリコン基板の所定の最大使用温度内で最大許容電流(定格電流)が決められるので、できるだけ半導体装置の放熱性を高めて単位電流あたりの温度上昇を小さくした構造とすることが好ましい。そのような高放熱性構造を備える半導体装置であるならば、単位電流あたりのシリコン基板や放熱板等を小さくすることができるので、コンパクト化やコストダウンの点からも有益である。
また、前記ニッケル・金メッキの裏面への被着を防ぐには、裏面側にあらかじめパラフィンなどのメッキマスク材を塗布すればよいと考えられるが、塗布および除去に手間がかかるだけでなく、裏面側の金属電極膜面を汚染して良好な半田接合能力を低下させる惧れがあって、必ずしも好ましいとは言えない。
図2は前述のポリイミド膜によるシリコン基板の表面側段差の大きさとシリコン基板(ウェハ)割れの発生率との関係をシリコン基板の研削後の厚さをパラメータとして示した関係図である。図2からわかるように、ポリイミド膜による段差が10μmの場合、シリコン基板(ウェハ)の厚さが200μm以下のように薄くすると、ウェハ割れの不良率(発生率)が25%以上と高くなる。
特許請求の範囲の請求項2記載の発明によれば、他方側の主面を研削する工程の前に、前記一方側の主面に所要の選択的メッキ用マスクを形成した後、半田接合可能な金属メッキ処理を行なう請求項1記載の半導体装置の製造方法とすることが好ましい。
実施例1と同様に、一方の主面側にMOSゲート構造を形成する。つづいて、ウェハの裏面側を研削して180μmの厚さに減厚する。このとき、表面側のポリイミド膜はまだ形成されておらず、研削しない側の面は保護シートなどを介して支持基板に接合されていてほぼ平坦であるため、研削に悪影響はない。
次に、一方の主面側の所望の個所に選択的にポリイミド膜を形成し、このポリイミド膜をメッキマスクとして無電解ニッケル・金メッキ処理を行なう。このニッケル・金メッキ膜はポリイミド膜でマスクされていないアルミニウム電極膜上に5μmの厚さで成膜される。
つづいて、前記裏面研削による裏面歪層を除去し、裏面をクリーンにした後、裏面側にコレクタ層をイオン注入およびアニール処理により形成し、この面にTi−Ni−Auからなる3層の金属膜は蒸着またはスパッタなどにより形成する。以降の工程は前記実施例1と同様である。
また、メッキ処理により、裏面電極と半導体基板(ウェハ)との間にメッキ層がわずかに残るが、絶縁基板の銅パターンと半導体基板だ接合されるのはTi−Ni−Auなどからなる3層の金属膜(約1μm厚)であり、この半田接合層にかかる応力は、3層の金属幕によって吸収・緩和され、この応力に起因する界面割れやカケといった問題は発生しない。
2 Ti
3 Ni
4 Au
5 裏面側金属電極膜
6 Ni−Auメッキ膜
7 半田
8 銅基板または絶縁基板
10 アルミニウム電極
11 ポリイミド膜
Claims (3)
- 半導体基板の一方側の主面へ不純物ドーピングによる機能領域の形成とアルミニウム電極膜を選択的に形成する工程、前記半導体基板を所定の厚さに減厚するために他方側の主面を研削する工程、前記他方側の研削後の主面に半田接合可能な金属電極をPVD法により形成する工程とをこの順に少なくとも含む半導体装置の製造方法において、前記アルミニウム電極膜を選択的に形成する工程の後の前記いずれかの工程の前に、半導体基板の一方側の主面にのみ半田接合可能な金属メッキ処理を行なうことを特徴とする半導体装置の製造方法。
- 他方側の主面を研削する工程の前に、前記一方側の主面に所要の選択的メッキ用マスクを形成した後、半田接合可能な金属メッキ処理を行なうことを特徴とする請求項1記載の半導体装置の製造方法。
- 他方側の主面に半田接合可能な金属電極をPVD法により形成する工程の前に、前記一方側の主面に所要の選択的メッキ用マスクを形成した後、半田接合可能な金属メッキ処理を行なうことを特徴とする請求項1記載の半導体装置の製造方法。
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008078240A (ja) * | 2006-09-19 | 2008-04-03 | Toyota Motor Corp | 半導体素子の配線接続方法および半導体装置 |
JP2013512520A (ja) * | 2009-12-01 | 2013-04-11 | ブル・エス・アー・エス | システムのいくつかの構成要素のメモリ間の直接データ転送を許可するそのシステム |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2008078240A (ja) * | 2006-09-19 | 2008-04-03 | Toyota Motor Corp | 半導体素子の配線接続方法および半導体装置 |
JP2013512520A (ja) * | 2009-12-01 | 2013-04-11 | ブル・エス・アー・エス | システムのいくつかの構成要素のメモリ間の直接データ転送を許可するそのシステム |
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