JP2006108207A - Semiconductor substrate, method of manufacturing the same, semiconductor device, and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To inexpensively form a semiconductor layer on a insulator while the thickness of the layer is made to be accurately controlled. <P>SOLUTION: A first semiconductor layer 2 is formed on a semiconductor substrate 1 through epitaxial growth, and a second semiconductor layer 3 is formed on the substrate 1 to cover the first semiconductor layer 2. In addition, an oxidation preventing film 5 is formed on the second semiconductor layer 3. Thereafter, the oxidation preventing film 5 on an element separating region is removed, and an opening 6 through which part of the end of the first semiconductor layer 2 is exposed is formed along the paired edges of the first semiconductor layer 2. Then the first semiconductor layer 2 is etched off by bringing an etching gas or etching liquid into contact with the layer 2 through the opening 6. In addition, a buried oxidized film 8a is formed in the cavity 7 between the semiconductor substrate 1 and the second semiconductor layer 3 and, at the same time, an element separating oxidized film 8b is formed around the second semiconductor layer 3 by thermally oxidizing the substrate 1 and second semiconductor layer 3 by using the oxidation preventing film 5 as a mask. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor substrate, a semiconductor device, a method for manufacturing a semiconductor substrate, and a method for manufacturing a semiconductor device, and is particularly suitable for application to a field effect transistor formed on an SOI (Silicon On Insulator) substrate.

  Field effect transistors formed on an SOI substrate are attracting attention because of their ease of element isolation, latch-up freeness, and low source / drain junction capacitance. In particular, since a fully depleted SOI transistor can operate at low power consumption and at high speed and can be easily driven at a low voltage, research for operating the SOI transistor in a fully depleted mode has been actively conducted. Here, as the SOI substrate, for example, a SIMOX (Separation by Implanted Oxgen) substrate or a bonded substrate is used.

Further, for example, in Patent Document 1, in order to form a silicon thin film with good crystallinity and uniformity on a large-area insulating film, an amorphous or polycrystalline silicon layer formed on the insulating film is irradiated with ultraviolet rays. By irradiating the beam in a pulse shape, a polycrystalline silicon film in which single crystal grains close to squares are arranged in a grid pattern is formed on an insulating film, and the surface of the polycrystalline silicon film is subjected to CMP (chemical mechanical film). A method of flattening by mechanical polishing) is disclosed.
JP-A-10-261799

  However, in order to manufacture a SIMOX substrate, high-concentration oxygen ions must be implanted into a silicon wafer. In order to manufacture a bonded substrate, it is necessary to polish the surface of the silicon wafer after bonding two silicon wafers. For this reason, the SOI transistor has a problem that the cost is increased as compared with a field effect transistor formed in a bulk semiconductor.

Also, in ion implantation and polishing, the variation in the thickness of the SOI layer is large, and it is difficult to stabilize the characteristics of the field effect transistor when the SOI layer is thinned in order to produce a fully depleted SOI transistor. There was a problem.
Further, in the method disclosed in Patent Document 1, since the single crystal grains are arranged in a grid pattern on the insulating film, a grain boundary is generated in the single crystal layer formed on the insulating film, and the single crystal Since planarization of the layer is performed by polishing, there is a problem that the controllability of the thickness of the single crystal layer is not good.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor substrate, a semiconductor device, a method for manufacturing a semiconductor substrate, and a semiconductor device capable of forming a semiconductor layer on an insulator at low cost while enabling the film thickness to be accurately controlled. It is to provide a manufacturing method.

In order to solve the above-described problem, according to a semiconductor substrate of one embodiment of the present invention, an oxide film formed on a semiconductor substrate and a surface embedded from the oxide film are embedded in the oxide film. And a semiconductor layer formed by epitaxial growth.
As a result, the semiconductor layer can be formed on the oxide film by thermal oxidation of the semiconductor layer, and element isolation can be achieved, and an SOI transistor is formed on the semiconductor layer while suppressing an increase in cost. It becomes possible.

  In addition, according to the semiconductor device of one embodiment of the present invention, the oxide film is formed on the semiconductor substrate, and the oxide film is embedded in the oxide film so that the surface is exposed from the oxide film, and is formed by epitaxial growth. A semiconductor layer; a gate electrode formed on the semiconductor layer; and a source / drain layer formed on the semiconductor layer and disposed on a side of the gate electrode.

Accordingly, an SOI transistor can be formed on a semiconductor layer without using an SOI substrate, and element isolation can be achieved, thereby reducing the power consumption and speed of the transistor while suppressing an increase in cost. Can be achieved.
In addition, according to the method for manufacturing a semiconductor substrate according to one aspect of the present invention, the step of forming the first semiconductor layer disposed on a part of the surface of the semiconductor substrate, and the first semiconductor layer being covered Forming a second semiconductor layer on the semiconductor substrate having a smaller selectivity at the time of etching than the first semiconductor layer, and an opening exposing a part of an end of the first semiconductor layer. Forming a layer under the second semiconductor layer by selectively etching the first semiconductor layer through the opening, and forming a cavity from which the first semiconductor layer has been removed; And a step of thermally oxidizing the second semiconductor layer and the semiconductor substrate through the opening to form a buried oxide film in the cavity.

  This makes it possible to remove the first semiconductor layer under the second semiconductor layer while allowing the second semiconductor layer to remain in an arch shape, and to support the second semiconductor layer on the semiconductor substrate by itself. This makes it possible to form a cavity under the second semiconductor layer. Further, by providing an opening in the second semiconductor layer to expose a part of the end of the first semiconductor layer, even when the second semiconductor layer is stacked on the first semiconductor layer, an etching gas or an etching solution Can be brought into contact with the first semiconductor layer, the first semiconductor layer can be removed while leaving the second semiconductor layer, and thermal oxidation of the second semiconductor layer causes the second semiconductor layer to be under the second semiconductor layer. It is possible to form a buried oxide film in the cavity. For this reason, it becomes possible to arrange | position a 2nd semiconductor layer on a buried oxide film, reducing generation | occurrence | production of the defect of a 2nd semiconductor layer, and without impairing the quality of a 2nd semiconductor layer, a 2nd semiconductor layer and a semiconductor It is possible to achieve insulation from the substrate.

  In addition, according to the method for manufacturing a semiconductor substrate according to one aspect of the present invention, the step of forming the first semiconductor layer disposed on a part of the surface of the semiconductor substrate, and the first semiconductor layer being covered Forming a second semiconductor layer on the semiconductor substrate having a smaller selectivity at the time of etching than the first semiconductor layer, and an oxide disposed on the first semiconductor layer and having a narrower width than the first semiconductor layer. Forming a prevention film on the second semiconductor layer; and forming an opening in the second semiconductor layer that is disposed on a side of the oxidation prevention film and exposes a part of an end of the first semiconductor layer. A step of selectively etching the first semiconductor layer through the opening to form a cavity from which the first semiconductor layer has been removed under the second semiconductor layer; and the antioxidant film And the second semiconductor layer and the half By performing the thermal oxidation of the body substrate, and forming a buried oxide layer in the cavity, characterized in that it comprises a step of forming an element isolation oxide film around the second semiconductor layer.

  As a result, it is possible to collectively perform thermal oxidation of the second semiconductor layer in the cavity and thermal oxidation of the semiconductor substrate around the second semiconductor layer. Therefore, it is possible to dispose the second semiconductor layer on the buried oxide film while reducing the occurrence of defects in the second semiconductor layer, and to perform element isolation of the second semiconductor layer. 2 It is possible to achieve insulation between the second semiconductor layer and the semiconductor substrate without impairing the quality of the semiconductor layer, and it is possible to suppress an increase in the number of processes.

  According to the method for manufacturing a semiconductor device of one embodiment of the present invention, the step of forming the first semiconductor layer disposed on a part of the surface of the semiconductor substrate and the first semiconductor layer are covered. Forming a second semiconductor layer on the semiconductor substrate having a smaller selectivity at the time of etching than the first semiconductor layer, and an opening exposing a part of an end of the first semiconductor layer. Forming a layer under the second semiconductor layer by selectively etching the first semiconductor layer through the opening, and forming a cavity from which the first semiconductor layer has been removed; Forming a buried oxide film in the cavity by thermally oxidizing the second semiconductor layer and the semiconductor substrate through the opening, and forming a gate on the second semiconductor layer through a gate insulating film. Forming an electrode; and Characterized in that it comprises a step of forming a source / drain layers disposed on both sides of the gate electrode on the second semiconductor layer.

  As a result, it is possible to dispose the second semiconductor layer on the buried oxide film while reducing the occurrence of defects in the second semiconductor layer, and without damaging the quality of the second semiconductor layer and the semiconductor. It is possible to achieve insulation from the substrate. As a result, an SOI transistor can be formed on the second semiconductor layer without using an SOI substrate, and the quality of the SOI transistor can be improved while suppressing an increase in cost.

  According to the method for manufacturing a semiconductor device of one embodiment of the present invention, the step of forming the first semiconductor layer disposed on a part of the surface of the semiconductor substrate and the first semiconductor layer are covered. Forming a second semiconductor layer on the semiconductor substrate having a smaller selectivity at the time of etching than the first semiconductor layer, and an oxide disposed on the first semiconductor layer and having a narrower width than the first semiconductor layer. Forming a prevention film on the second semiconductor layer; and forming an opening in the second semiconductor layer that is disposed on a side of the oxidation prevention film and exposes a part of an end of the first semiconductor layer. A step of selectively etching the first semiconductor layer through the opening to form a cavity from which the first semiconductor layer has been removed under the second semiconductor layer; and the antioxidant film And the second semiconductor layer and the half Performing a thermal oxidation of the body substrate to form a buried oxide film in the cavity and forming an element isolation oxide film around the second semiconductor layer; and a gate insulating film on the second semiconductor layer And a step of forming a source / drain layer respectively disposed on both sides of the gate electrode on the second semiconductor layer.

  Accordingly, it is possible to dispose the second semiconductor layer on the buried oxide film while reducing the occurrence of defects in the second semiconductor layer, and to form an element isolation oxide film around the second semiconductor layer. Can do. For this reason, it is possible to achieve insulation between the second semiconductor layer and the semiconductor substrate without impairing the quality of the second semiconductor layer, and it is possible to reduce the number of steps. As a result, it is possible to form an SOI transistor on a semiconductor layer without using an SOI substrate, and it is possible to achieve element isolation, thereby reducing the power consumption and speed of the transistor while suppressing an increase in cost. Can be achieved.

Hereinafter, a semiconductor device and a manufacturing method thereof according to embodiments of the present invention will be described with reference to the drawings.
1A to 8A are plan views showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIGS. 1B to 8B are FIGS. Sectional views cut along lines A1-A1 ′ to A8-A8 ′ in FIG. 8A, respectively, and FIGS. 1C to 8C are B1- in FIGS. 1A to 8A. It is sectional drawing cut | disconnected by the B1'-B8-B8 'line | wire, respectively.

  In FIG. 1, the first semiconductor layer 2 is formed on the semiconductor substrate 1 by performing epitaxial growth. The first semiconductor layer 2 can be made of a material having a higher selection ratio during etching than the semiconductor substrate 1. Examples of the material of the semiconductor substrate 1 and the first semiconductor layer 2 include Si, Ge, SiGe, A combination selected from SiC, SiSn, PbS, GaAs, InP, GaP, GaN, ZnSe, or the like can be used. In addition, the film thickness of the 1st semiconductor layer 2 can be about 100-200 nm, for example.

  Next, as shown in FIG. 2, the semiconductor substrate 1 around the first semiconductor layer 2 is exposed by patterning the first semiconductor layer 2 using a photolithography technique and an etching technique. Instead of patterning the first semiconductor layer 2, the first semiconductor layer 2 may be formed in a partial region on the semiconductor substrate 1 by performing selective epitaxial growth.

  Then, by performing epitaxial growth, the second semiconductor layer 3 is formed on the semiconductor substrate 1 so as to cover the first semiconductor layer 2. The second semiconductor layer 3 can be made of a material having a smaller selection ratio at the time of etching than the first semiconductor layer 2, and examples of the material of the second semiconductor layer 6 include Si, Ge, SiGe, SiC, SiSn, PbS, GaAs, InP, GaP, GaN, ZnSe, or the like can be used. In particular, when the semiconductor substrate 1 is Si and the first semiconductor layer 2 is SiGe, it is preferable to use Si as the second semiconductor layer 3. As a result, it is possible to achieve lattice matching between the first semiconductor layer 2 and the second semiconductor layer 3, while ensuring a selection ratio during etching between the first semiconductor layer 2 and the second semiconductor layer 3. can do. In addition, the film thickness of the 2nd semiconductor layer 3 can be about 100-200 nm, for example. Then, a sacrificial oxide film 4 is formed on the surface of the second semiconductor layer 3 by thermal oxidation of the second semiconductor layer 3. Note that the thickness of the sacrificial oxide film 4 can be, for example, about 10 nm. Then, an antioxidant film 5 is formed on the sacrificial oxide film 4 by a method such as CVD. For example, a silicon nitride film can be used as the antioxidant film 5.

  Next, as shown in FIG. 3, the sacrificial oxide film 4 on the second semiconductor layer 3 is partially covered with the antioxidant film 5 by patterning the antioxidant film 5 using a photolithography technique and an etching technique. Thus, the sacrificial oxide film 4 on the element isolation region is exposed. Here, when patterning the antioxidant film 5, the width of the antioxidant film 5 can be made narrower than the width of the second semiconductor layer 3. The pair of sides of the antioxidant film 5 are disposed inside the pair of sides of the second semiconductor layer 3, and the remaining pair of sides of the antioxidant film 5 is the remaining pair of the second semiconductor layer 3. It can be arranged on each side.

  Next, as shown in FIG. 4, the second semiconductor layer 3 and the sacrificial oxide film 4 are patterned using a photolithography technique and an etching technique, thereby exposing an end portion of the first semiconductor layer 2. The part 6 is formed along a pair of sides of the first semiconductor layer 2. When a part of the end portion of the first semiconductor layer 2 is exposed, the remaining part of the end portion of the first semiconductor layer 2 is left covered with the first semiconductor layer 2. Here, by making the width of the antioxidant film 5 smaller than the width of the second semiconductor layer 3, the opening 6 is formed in the second semiconductor layer 3 while leaving the antioxidant film 5 on the first semiconductor layer 2 as it is. Can be formed.

Moreover, it is preferable that the arrangement position of the opening 6 corresponds to the element isolation region of the second semiconductor layer 3. As a result, it is not necessary to arrange the opening 6 exposing the first semiconductor layer 2 in the active region of the second semiconductor layer 3, and the SOI transistor is formed in the second semiconductor layer 3 while suppressing an increase in chip size. It becomes possible.
Moreover, when exposing a part of edge part of the 1st semiconductor layer 2, you may make it stop etching on the surface of the 1st semiconductor layer 2, or overetch the 1st semiconductor layer 2, and the 1st semiconductor layer 2 A recess may be formed in 2. Alternatively, the surface of the semiconductor substrate 1 may be exposed through the first semiconductor layer 2 in the opening 6. Here, by stopping the etching of the first semiconductor layer 2 in the middle, the surface of the semiconductor substrate 1 in the opening 6 can be prevented from being exposed. For this reason, when the first semiconductor layer 2 is removed by etching, it is possible to reduce the time during which the semiconductor substrate 1 in the opening 6 is exposed to the etching solution or the etching gas. Etching can be suppressed.

Next, as shown in FIG. 5, the first semiconductor layer 2 is removed by etching by bringing an etching gas or an etchant into contact with the first semiconductor layer 2 through the opening 6, so that the semiconductor substrate 1 and the second semiconductor are removed. A cavity 7 is formed between the layer 2.
Here, an opening 6 exposing a part of the end of the first semiconductor layer 2 is formed in the second semiconductor layer 3, so that an etching gas or an etchant is applied to the first semiconductor layer 1 below the second semiconductor layer 3. And the cavity 7 can be formed between the semiconductor substrate 1 and the second semiconductor layer 3. Further, by leaving the remaining part of the end of the first semiconductor layer 2 covered with the second semiconductor layer 3, the second semiconductor layer 3 can be left in an arch shape, while the second semiconductor layer 3 is left. The first semiconductor layer 1 under the layer 3 can be removed, and the second semiconductor layer 3 can be supported on the semiconductor substrate 1 by itself, while the cavity 7 is formed under the second semiconductor layer 3. It becomes possible to form.

  In the case where the semiconductor substrate 1 and the second semiconductor layer 3 are Si and the first semiconductor layer 2 is SiGe, it is preferable to use hydrofluoric acid as an etchant for the first semiconductor layer 2. As a result, a Si / SiGe selection ratio of about 1:50 to 1000 can be obtained, and the first semiconductor layer 2 can be removed while suppressing overetching of the semiconductor substrate 1 and the second semiconductor layer 3. It becomes.

  Next, as shown in FIG. 6, the cavity 7 between the semiconductor substrate 1 and the second semiconductor layer 3 is obtained by performing thermal oxidation of the semiconductor substrate 1 and the second semiconductor layer 3 using the antioxidant film 5 as a mask. Then, a buried oxide film 8 a is formed, and an element isolation oxide film 8 b is formed around the second semiconductor layer 3. Note that high-temperature annealing may be performed after the buried oxide film 8a is formed. Thereby, the buried oxide film 8a can be reflowed, the stress of the buried oxide film 8a can be relieved, and the interface state can be reduced.

Next, as shown in FIG. 7, the surface of the second semiconductor layer 3 is exposed by removing the antioxidant film 5 and the sacrificial oxide film 4. Thereafter, SiO ₂ is deposited on the entire surface of the semiconductor substrate 1 by CVD to fill the recessed portion of the element isolation oxide film 8b, and the surface of the substrate is planarized by CMP to separate the surface of the second semiconductor layer 3 from the element isolation oxidation. You may make it insert the process of making the surface of the film | membrane 8b into the same height.

  Next, as shown in FIG. 8, the surface of the second semiconductor layer 3 is thermally oxidized to form a gate insulating film 21 on the surface of the second semiconductor layer 3. Then, a polycrystalline silicon layer is formed on the second semiconductor layer 3 on which the gate insulating film 21 is formed by a method such as CVD. Then, the gate electrode 22 is formed on the second semiconductor layer 3 by patterning the polycrystalline silicon layer using a photolithography technique and an etching technique.

  Next, by using the gate electrode 22 as a mask, impurities such as As, P, and B are ion-implanted into the second semiconductor layer 3, thereby forming LDDs composed of low-concentration impurity introduction layers respectively disposed on both sides of the gate electrode 22. Layers 23 a and 23 b are formed on the second semiconductor layer 3. Then, an insulating layer is formed on the second semiconductor layer 3 on which the LDD layers 23a and 23b are formed by a method such as CVD, and the insulating layer is etched back using anisotropic etching such as RIE. Sidewalls 24 are formed on the side walls of the electrodes 22. Then, impurities such as As, P, and B are ion-implanted into the second semiconductor layer 3 using the gate electrode 22 and the sidewall 24 as a mask, thereby introducing high-concentration impurities respectively arranged on the side of the sidewall 24. Source / drain layers 25 a and 25 b made of layers are formed on the second semiconductor layer 3.

  This makes it possible to dispose the second semiconductor layer 3 on the buried oxide film 8a while reducing the occurrence of defects in the second semiconductor layer 3, and to isolate the element isolation oxide film around the second semiconductor layer 3. 8b can be formed collectively. For this reason, it is possible to achieve insulation between the second semiconductor layer 3 and the semiconductor substrate 1 without impairing the quality of the second semiconductor layer 3, and it is possible to reduce the number of steps. As a result, it is possible to form an SOI transistor on the second semiconductor layer 3 without using an SOI substrate, and it is possible to achieve element isolation, while suppressing an increase in cost and reducing the power consumption of the transistor. And higher speed can be achieved.

The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Semiconductor substrate, 2 1st semiconductor layer, 2nd semiconductor layer, 4 Sacrificial oxide film, 5 Antioxidation film, 6 Opening part, 7 Cavity part, 8a Embedded oxide film, 8b Element isolation oxide film, 21 Gate insulating film, 22 Gate electrode, 23a, 23b LDD layer, 24 Side wall spacer, 25a, 25b Source / drain layer

Claims (6)

An oxide film formed on a semiconductor substrate;
A semiconductor substrate comprising: a semiconductor layer embedded in the oxide film so that a surface is exposed from the oxide film and formed by epitaxial growth. An oxide film formed on a semiconductor substrate;
A semiconductor layer embedded in the oxide film so that the surface is exposed from the oxide film, and formed by epitaxial growth;
A gate electrode formed on the semiconductor layer;
A semiconductor device comprising: a source / drain layer formed on the semiconductor layer and disposed on a side of the gate electrode. Forming a first semiconductor layer disposed on a part of the surface of the semiconductor substrate;
Forming a second semiconductor layer on the semiconductor substrate, the first semiconductor layer being covered so that the selection ratio during etching is smaller than that of the first semiconductor layer;
Forming an opening in the second semiconductor layer to expose a part of an end of the first semiconductor layer;
Forming a cavity from which the first semiconductor layer has been removed by selectively etching the first semiconductor layer through the opening under the second semiconductor layer;
Forming a buried oxide film in the cavity by performing thermal oxidation of the second semiconductor layer and the semiconductor substrate through the opening. Forming a first semiconductor layer disposed on a part of the surface of the semiconductor substrate;
Forming a second semiconductor layer on the semiconductor substrate, the first semiconductor layer being covered so that the selection ratio during etching is smaller than that of the first semiconductor layer;
Forming an antioxidant film disposed on the first semiconductor layer and having a narrower width than the first semiconductor layer on the second semiconductor layer;
Forming an opening in the second semiconductor layer that is disposed on a side of the antioxidant film and exposes a part of an end of the first semiconductor layer;
Forming a cavity from which the first semiconductor layer has been removed by selectively etching the first semiconductor layer through the opening under the second semiconductor layer;
By performing thermal oxidation of the second semiconductor layer and the semiconductor substrate using the antioxidant film as a mask, a buried oxide film is formed in the cavity, and an element isolation oxide film is formed around the second semiconductor layer And a process for manufacturing the semiconductor substrate. Forming a first semiconductor layer disposed on a part of the surface of the semiconductor substrate;
Forming a second semiconductor layer on the semiconductor substrate, the first semiconductor layer being covered so that the selection ratio during etching is smaller than that of the first semiconductor layer;
Forming an opening in the second semiconductor layer to expose a part of an end of the first semiconductor layer;
Forming a cavity from which the first semiconductor layer has been removed by selectively etching the first semiconductor layer through the opening under the second semiconductor layer;
Forming a buried oxide film in the cavity by thermally oxidizing the second semiconductor layer and the semiconductor substrate through the opening;
Forming a gate electrode on the second semiconductor layer through a gate insulating film;
Forming a source / drain layer respectively disposed on both sides of the gate electrode in the second semiconductor layer. Forming a first semiconductor layer disposed on a part of the surface of the semiconductor substrate;
Forming a second semiconductor layer on the semiconductor substrate, the first semiconductor layer being covered so that the selection ratio during etching is smaller than that of the first semiconductor layer;
Forming an antioxidant film disposed on the first semiconductor layer and having a narrower width than the first semiconductor layer on the second semiconductor layer;
Forming an opening in the second semiconductor layer that is disposed on a side of the antioxidant film and exposes a part of an end of the first semiconductor layer;
Forming a cavity from which the first semiconductor layer has been removed by selectively etching the first semiconductor layer through the opening under the second semiconductor layer;
By performing thermal oxidation of the second semiconductor layer and the semiconductor substrate using the antioxidant film as a mask, a buried oxide film is formed in the cavity, and an element isolation oxide film is formed around the second semiconductor layer And a process of
Forming a gate electrode on the second semiconductor layer through a gate insulating film;
Forming a source / drain layer respectively disposed on both sides of the gate electrode in the second semiconductor layer.

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