JP2006080564A5 - - Google Patents

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Publication number
JP2006080564A5
JP2006080564A5 JP2005336256A JP2005336256A JP2006080564A5 JP 2006080564 A5 JP2006080564 A5 JP 2006080564A5 JP 2005336256 A JP2005336256 A JP 2005336256A JP 2005336256 A JP2005336256 A JP 2005336256A JP 2006080564 A5 JP2006080564 A5 JP 2006080564A5
Authority
JP
Japan
Prior art keywords
semiconductor
substrate
bare chip
semiconductor bare
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2005336256A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006080564A (ja
JP4388926B2 (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2005336256A priority Critical patent/JP4388926B2/ja
Priority claimed from JP2005336256A external-priority patent/JP4388926B2/ja
Publication of JP2006080564A publication Critical patent/JP2006080564A/ja
Publication of JP2006080564A5 publication Critical patent/JP2006080564A5/ja
Application granted granted Critical
Publication of JP4388926B2 publication Critical patent/JP4388926B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP2005336256A 2005-11-21 2005-11-21 半導体装置のパッケージ構造 Expired - Fee Related JP4388926B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005336256A JP4388926B2 (ja) 2005-11-21 2005-11-21 半導体装置のパッケージ構造

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005336256A JP4388926B2 (ja) 2005-11-21 2005-11-21 半導体装置のパッケージ構造

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2004164489A Division JP3842272B2 (ja) 2004-06-02 2004-06-02 インターポーザー、半導体チップマウントサブ基板および半導体パッケージ

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP2008157557A Division JP4303772B2 (ja) 2008-06-17 2008-06-17 半導体パッケージ
JP2008160559A Division JP4388989B2 (ja) 2008-06-19 2008-06-19 半導体チップマウント封止サブ基板

Publications (3)

Publication Number Publication Date
JP2006080564A JP2006080564A (ja) 2006-03-23
JP2006080564A5 true JP2006080564A5 (enExample) 2007-07-19
JP4388926B2 JP4388926B2 (ja) 2009-12-24

Family

ID=36159708

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005336256A Expired - Fee Related JP4388926B2 (ja) 2005-11-21 2005-11-21 半導体装置のパッケージ構造

Country Status (1)

Country Link
JP (1) JP4388926B2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7545031B2 (en) * 2005-04-11 2009-06-09 Stats Chippac Ltd. Multipackage module having stacked packages with asymmetrically arranged die and molding
US7420206B2 (en) 2006-07-12 2008-09-02 Genusion Inc. Interposer, semiconductor chip mounted sub-board, and semiconductor package
US7638868B2 (en) * 2006-08-16 2009-12-29 Tessera, Inc. Microelectronic package
US8299626B2 (en) 2007-08-16 2012-10-30 Tessera, Inc. Microelectronic package

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