JP2006032524A - Nitride semiconductor heterostructure field-effect transistor and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To manufacture a nitride semiconductor HFET structure using an InGaN channel with high quality such as the steepness of a boundary or the like or a barrier layer having high band offset, and to improve the reproducibility of manufacture of an HFET structure. <P>SOLUTION: The nitride semiconductor element structure has an In<SB>x</SB>Ga<SB>1-x</SB>N (0≤x≤1) layer, a nitride semiconductor intermediate layer thereon, and an AlN layer thereon. In addition, the nitride semiconductor element structure has an In<SB>x</SB>Ga<SB>1-x</SB>N (0≤x≤1) layer on a nitride semiconductor thin film and an AlN layer thereon. The In<SB>x</SB>Ga<SB>1-x</SB>N layer is made of a multilayer film with a different composition. The nitride semiconductor intermediate layer is made of GaN, or AlN, or Al<SB>x</SB>Ga<SB>1-x</SB>N, or their multilayer film. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a heterostructure field effect transistor structure using a nitride semiconductor material and a method for manufacturing the same.

Nitride semiconductors have a band gap from the far infrared to the ultraviolet region, and thus are promising as materials for light receiving and light emitting elements in that region. In addition, since it has a strong atomic bonding force, a high dielectric breakdown electric field, and a high saturation electron velocity, it is also promising as a material for electronic devices such as high temperature resistance, high output, and high frequency transistors.
Particularly in applications for electronic devices, development of high-power heterostructure field effect transistors (HFETs) of several hundred mW or more is underway with the aim of applying to amplifiers for mobile phone base stations. In order to increase the output of the HFET, it is necessary to increase the withstand voltage, increase the current to flow more current through the channel, improve the heat dissipation to prevent heat loss, suppress the current collapse, etc. As a technique for increasing the current, it is effective to replace a conventionally used GaN channel with an InGaN channel, or to increase the AlN mixed crystal composition ratio of the AlGaN layer of the barrier layer.
By using the InGaN channel, InGaN theoretically has a higher saturation electron velocity and higher mobility depending on the composition compared to GaN, and due to a larger polarization effect and a larger band offset of the barrier layer. The two-dimensional electron gas at the heterointerface can be made higher in concentration. Even by using a high AlN mixed crystal composition ratio, it is possible to increase the concentration of the two-dimensional electron gas at the heterointerface due to a larger polarization effect and a band offset with a large barrier layer, and to improve the gate breakdown voltage. Is possible (see Patent Document 1).

As a conventional HFET structure using an InGaN channel, production of an AlGaN / InGaN / GaN structure or an AlGaN / InGaN / AlGaN structure by MOCVD has been reported (see Non-Patent Documents 1 and 2). High power HFET characteristics have also been reported. However, the production of this structure has the following problems. In MOCVD growth, the optimum growth temperature of the InGaN layer is 700 ° C. to 800 ° C. when the In composition is about 10%, whereas the AlGaN layer is as high as 900 ° C. or higher. Therefore, in order to grow an AlGaN barrier layer on InGaN, it is necessary to raise the substrate temperature to 900 ° C. or higher after growing the InGaN layer, but InGaN is thermally unstable at a high temperature of 900 ° C. or higher, Desorption to the gas phase occurs, and the crystallinity of the InGaN layer is deteriorated and the steepness of the hetero interface is deteriorated.
For the above reasons, it is very difficult to produce a hetero interface, that is, an interface between AlGaN and InGaN with high quality. Accordingly, the electrical characteristics of the AlGaN / InGaN / GaN structure are inferior to those of the AlGaN / GaN heterostructure. For example, the mobility of the two-dimensional electron gas is about 700 cm ² / Vsec than expected. Is also significantly lower. Even when an AlGaN layer having a high AlN mixed crystal composition ratio is used, problems such as increased gate leakage occur due to crystallinity and interface deterioration.

FIG. 4 is a schematic cross-sectional view of a conventionally used AlGaN / GaN heterostructure. In FIG. 4, 1 is a SiC substrate, 2 is an AlN layer, 3 is a GaN layer, and 4 is an AlGaN layer. All structures on the SiC substrate are produced by the MOCVD method. A structure in which an AlN buffer layer of 50 to 200 nm is deposited on a SiC substrate at 1100 ° C., and then a GaN layer of 1 to 2 μm and an undoped Al _0.25 Ga _0.75 N layer of 20 nm are sequentially deposited at about 1000 ° C. to 1050 ° C. It has become. At this time, a two-dimensional electron gas is generated at the interface between the AlGaN layer and the GaN layer due to the polarization effect of AlGaN and GaN. The characteristics of the HFET can be estimated to some extent from the electrical characteristics of the two-dimensional electron gas. That is, it can be expected that the lower the sheet resistance, the higher the mutual conductance and maximum current density of the HFET. In this case, the electron mobility was 1500 cm ² / Vsec, the two-dimensional electron concentration was 7 × 10 ¹² cm ⁻² , and the sheet resistance was about 600 Ω / sq. In practical use, a transistor is fabricated using a structure in which Si doping is performed on the AlGaN barrier layer to further reduce sheet resistance.

FIG. 5 is a schematic cross-sectional view of a conventionally reported AlGaN / InGaN / GaN double heterostructure in an InGaN channel. In FIG. 5, 1 is a SiC substrate, 2 is an AlN layer, 3 is a GaN layer, 5 is an InGaN layer, and 4 is an AlGaN layer. All structures on the SiC substrate are produced by the MOCVD method. After depositing an AlN buffer layer of 50 to 200 nm on a SiC substrate at 1100 ° C., a GaN layer was grown by 1 to 2 μm at 1000 ° C. to 1050 ° C., the substrate temperature was lowered to 750 ° C., and undoped In _{o. After the 1} Ga _0.9 N layer is deposited by about 10 nm, the substrate temperature is again raised to 1000 ° C. to 1050 ° C., and the undoped Al _0.25 Ga _0.75 N layer is deposited by 20 nm. A two-dimensional electron gas is generated at the interface between the AlGaN layer and the InGaN layer.
At this time, the electrical characteristics of this structure were an electron mobility of 750 cm ² / Vsec, a sheet electron concentration of 1.2 × 10 ¹³ cm ⁻² , and a sheet resistance of about 690 Ω / sq. Compared with the structure of FIG. 4, although the two-dimensional electron concentration is greatly increased due to the increase of the polarization effect, the electron mobility is greatly lowered due to the deterioration of crystal quality and interface steepness, and the sheet resistance is as shown in FIG. It was higher than the conventional AlGaN / GaN-HFET structure shown. With this electrical characteristic, it is difficult to obtain high device characteristics as an HFET.

JP 2003-109973 A G. Simin et al. “AlGaN / InGaN / GaN Doub1e-Heterostructural Field Effect Transistor”: Jpn. J. et al. Appl. Phys. Vol. 40 (2001) L1142 N. Maeda et al. “Enhanced Electron Mobility in AlGaN / InGaN / AlGaN Double-Heterostructures by Piezoelectric Effect”: Jpn. J. et al. Appl. Phys. Vol. 38 (1999) L799

  As described above, it is difficult to produce a high-quality AlGaN / InGaN / GaN heterostructure using an InGaN channel or an AlGaN layer having a high AlN mixed crystal composition ratio. This causes deterioration of electrical characteristics, and as a result, the characteristics of the HFET manufactured by the structure are also inferior to those of the GaN channel, and the HFET using the InGaN channel technology has not yet been put into practical use.

  The object of the present invention is to solve the above-mentioned problems and enable the fabrication of a nitride semiconductor HFET structure using an InGaN channel excellent in quality such as interface steepness or a barrier layer having a high band offset, and It is to improve the reproducibility of the production of the HFET structure.

In order to solve the above problems, in the present invention, an In _x Ga _1-x N (0 ≦ x ≦ 1) layer is formed as a channel on a nitride semiconductor thin film, and a nitride semiconductor such as GaN is formed thereon. It has a configuration of an HFET structure having an intermediate layer and an AlN layer thereon, or an HFET structure having an AlN layer on the In _x Ga _1-x N (0 ≦ x ≦ 1) channel layer.
Further, the deposition method of the uppermost AlN layer is not limited to the continuous growth from the lower structure by the MOCVD method or the like, but a production method of depositing by a sputtering method capable of forming a film at a lower temperature than the MOCVD method is also employed.

In order to solve the above-described problems of the present invention, specifically, the configuration described in the claims is adopted. That is,
As described in claim 1, an In _x Ga _1-x N (0 ≦ x ≦ 1) layer is provided on a nitride semiconductor thin film, and a nitride semiconductor intermediate layer is provided thereon. A nitride semiconductor device structure having an AlN layer is provided.

A nitride semiconductor device having an In _x Ga _1-x N (0 ≦ x ≦ 1) layer on a nitride semiconductor thin film and an AlN layer on the In _x Ga _1-x N (0 ≦ x ≦ 1) layer. It is a structure.

Further, as described in claim 3, in the nitride semiconductor device structure according to claim 1 or 2, the In _x Ga _1-x N layer is a multilayer film having a different composition. It is a structure.

Further, according to claim 4, in the nitride semiconductor device structure according to claim 1, the nitride semiconductor intermediate layer is made of GaN, AlN, Al _x Ga _1-x N, or a multilayer thereof. It is a nitride semiconductor device structure that is a film.

  The nitride semiconductor device structure according to any one of claims 1 to 4, wherein the crystal form of the uppermost AlN layer is polycrystalline. It is an element structure.

Moreover, as described in claim 6, in the nitride semiconductor device structure according to any one of claims 1 to 5, the nitride semiconductor thin film is made of GaN, AlN, or Al _x Ga _{1. −x} N layer is a nitride semiconductor device structure.

In addition, as described in claim 7, in the nitride semiconductor device structure according to any one of claims 1 to 6, the electrical polarity of the In _x Ga _1-x N layer is all intrinsic. Alternatively, a nitride semiconductor device structure composed of the In _x Ga _1-x N layer, which is intrinsic / n-type from the top or intrinsic / n-type / intrinsic from the top, is used.

  In addition, as described in claim 8, in the nitride semiconductor device structure according to any one of claims 1 to 7, the nitride semiconductor device structure is manufactured except for the uppermost AlN layer. In some cases, a metal organic vapor phase epitaxy (MOVPE) method, a molecular beam epitaxy (MBE) method, or a hydride vapor phase epitaxy (HVPE) method is performed, and an AlN layer is deposited thereon as a top layer by a sputtering method. This is a method for producing a nitride semiconductor device structure.

  According to a ninth aspect of the present invention, in the method for fabricating a heterostructure field effect transistor (HFET) device structure using the nitride semiconductor material according to the eighth aspect, an HFET structure of an AlN barrier layer is fabricated in the InGaN channel layer. In the case where an AlN barrier layer is deposited using a sputtering method, and when an intermediate GaN barrier layer is provided by an MOCVD method between the InGaN channel layer and the AlN barrier layer, two-dimensional electrons The InGaN / GaN heterointerface where the gas is generated is a single crystal, and the InGaN / GaN can be continuously grown in the same MOCVD apparatus without being exposed to the atmosphere, thereby producing an InGaN channel HFET having high electron mobility. This is a method for manufacturing a physical semiconductor element structure.

  In addition, as described in claim 10, in the method according to claim 8 or 9, the method of depositing the AlN layer by sputtering includes introducing a cooled substrate to be processed into an ECR plasma sputtering film forming apparatus, Nitrogen is used as a sputtering film forming condition, and the balance of the RF applied voltage, the gas pressure, and the flow rate of the raw material nitrogen is adjusted so that the stoichiometric ratio of Al and N is 1: 1, and the film forming temperature is set. Is from room temperature to 600 ° C., the deposited AlN layer is C-axis oriented polycrystal, the polarity is the same as the base, group III surface, the Al surface faces up, and polarization effect between the InGaN layer and the AlN layer Thus, a method of manufacturing a nitride semiconductor device structure that generates a high-concentration two-dimensional electron gas is obtained.

  According to the present invention, an InGaN channel HFET structure excellent in crystal quality and electrical characteristics can be produced. This makes it possible to increase the current and withstand voltage compared to the conventional AlGaN / GaN HFET structure.

<Example 1>
FIG. 1 is a schematic cross-sectional view of the InGaN channel HFET structure exemplified in Example 1 of the present invention. In FIG. 1, 1 is a SiC substrate, 2 is an AlN layer, 3 is a GaN layer, 5 is an InGaN layer, 6 is an AlN layer, and 12 is a two-dimensional electron gas. Here, the layers up to the InGaN layer are fabricated by MOCVD as in FIG. 5 (conventional AlGaN / InGaN / GaN HFET structure).
After depositing 50 to 200 nm of AlN buffer layer 2 on SiC substrate 1 at 1100 ° C., GaN layer 3 is grown to 1 to 2 μm at 1000 ° C. to 1050 ° C., the substrate temperature is lowered to 750 ° C., and undoped In _0.1 Ga _{A 0.9} N layer 5 was deposited about 10 nm.

The effect of the present invention is in the entire composition region of the composition x of the InGaN channel layer, but is practically about 0.05 to 0.2. Thereafter, the substrate to be processed is cooled, taken out from the MOCVD apparatus, introduced into an ECR (E1 Electron Cyclotron Resonance) plasma sputtering film forming apparatus, and the AlN layer 6 is thickened at room temperature in Ar plasma using Al and nitrogen. Deposited about 20 nm. As film formation conditions for sputtering, the balance between the applied voltage of RF, the gas pressure, and the flow rate of raw material nitrogen is adjusted so that the stoichiometric ratio of Al and N is 1: 1. Up to 600 ° C is desirable.
The deposited AlN layer was a C-axis oriented polycrystal similar to the underlying nitride semiconductor layer grown by MOCVD. As for the polarity, the group III surface, that is, the Al surface faced upward as in the base. For this reason, a two-dimensional electron gas was generated between the InGaN layer and the AlN layer due to the polarization effect. The electron mobility was 800 cm ² / Vsec, the two-dimensional electron concentration was 1.4 × 10 ¹³ cm ⁻² , and the sheet resistance was about 560 Ω / sq (square).

  Compared with the conventional AlGaN / InGaN / GaN-HFET structure shown in FIG. 5, the reason why the electron mobility is improved is that AlN is deposited at room temperature. This is probably because the interface was formed. AlN is lattice-relaxed with respect to the underlying nitride semiconductor layer, and no piezo polarization is generated, but the spontaneous polarization is about four times that of the AlGaN / InGaN interface in FIG. For this reason, it is considered that the two-dimensional electron concentration has increased.

  From the above results, it was confirmed that the electrical characteristics of the HFET structure shown in Example 1 (FIG. 1) of the present invention were improved as compared with the conventional InGaN channel HFET structure. In addition, a lower sheet resistance could be realized as compared with the conventional undoped AlGaN / GaN-HFET structure shown in FIG. In addition to the structure on the nitride semiconductor thin film grown on the SiC substrate, the same effect as that shown here was also obtained on the structure on the sapphire substrate and the nitride semiconductor thin film grown on the Si substrate. . In addition, when the AlN layer and the AlGaN layer other than the GaN layer indicated by reference numeral 3 in FIG. 1 were used, the same effect as in Example 1 was obtained.

<Example 2>
FIG. 2 is a schematic cross-sectional view of the InGaN channel HFET structure exemplified in Example 2 of the present invention. In FIG. 2, 1 is a SiC substrate, 2 is an AlN layer, 3 is a GaN layer, 5 is an InGaN layer, 7 is a GaN layer, 6 is an AlN layer, and 12 is a two-dimensional electron gas.
After depositing 50 to 200 nm of AlN buffer layer 2 on SiC substrate 1 at 1100 ° C. by MOCVD, GaN layer 3 is grown to 1 to 2 μm at 1000 ° C. to 1050 ° C., substrate temperature is lowered to 750 ° C., and undoped In _{A 0.1} Ga _0.9 N layer 5 was deposited to about 10 nm, the substrate temperature was raised to 800 ° C., and a GaN layer 3 was grown to about 3 nm. The effect is confirmed to be about 1 nm to 15 nm as the film thickness of the intermediate layer, but 5 nm or less is desirable. Thereafter, the substrate is taken out from the MOCVD apparatus, and then the substrate to be processed is cooled, taken out from the MOCVD apparatus, introduced into the ECR plasma sputtering film forming apparatus, and Al and nitrogen are used to form an AlN layer at room temperature in Ar plasma. A thickness of about 20 nm was deposited. As in <Example 1> shown in FIG. 1, the AlN layer was a polycrystal with the Al surface facing upward and C-axis oriented. The two-dimensional electron gas 12 is generated at the interface between GaN and InGaN, has an electron mobility of 1200 cm ² / Vsec, a two-dimensional electron concentration of 1.4 × 10 ¹³ cm ⁻² , and a sheet resistance of about 370 Ω / sq. It was.

  As shown in Example 2 (FIG. 2), the GaN (barrier) layer 7 can grow at a lower temperature than the conventional AlGaN (barrier) layer 4 shown in FIG. The interface steepness was also better than that of the conventional AlGaN / InGaN / GaN HFET structure shown in FIG. Furthermore, since the interface between GaN 7 and InGaN 5 in Example 2 (FIG. 2) is a single crystal and is continuously grown in the MOCVD apparatus without being exposed to the atmosphere, the structure shown in FIG. Compared with Example 1, the electron mobility was further improved. The band offset and polarization between InGaN and GaN are small compared to those between InGaN and AlGaN, but by depositing an AlN layer on the upper layer, similar to Example 1 having the structure shown in FIG. A high two-dimensional electron concentration was obtained due to the polarization effect. In addition, a sheet resistance significantly lower than that of the conventional undoped AlGaN / GaN-HFET structure shown in FIG. 4 could be realized.

In addition to the structure on the nitride semiconductor thin film grown on the SiC substrate, the same effect as in Example 2 was obtained with the structure on the sapphire substrate and nitride semiconductor thin film grown on the Si substrate. .
In addition, when the reference numeral 3 shown in FIGS. 1 and 2 is not a GaN layer but another AlN layer or an AlGaN layer, the same effect as in the second embodiment was obtained.

<Example 3>
FIG. 3 is a schematic cross-sectional view of the InGaN channel HFET structure exemplified in Example 3 of the present invention.
FIG. 3 is a schematic cross-sectional view of an InGaN channel HFET fabricated using the structure of the present invention, where 1 is a SiC substrate, 2 is an AlN layer, 3 is a GaN layer, 8 is a Si-doped InGaN layer, and 5 is an undoped InGaN. A layer, 7 an undoped GaN layer, 6 an AlN layer, 9 a source electrode, 10 a drain electrode, 11 a gate electrode, and 12 a two-dimensional electron gas.
After depositing 50 to 200 nm of AlN buffer layer 2 at 1100 ° C. on SiC substrate 1 by MOCVD, a GaN layer is grown to 1 to 2 μm at 1000 ° C. to 1050 ° C., the substrate temperature is lowered to 750 ° C., and the n-type A Si-doped In _0.1 Ga _0.9 N layer 8 having a carrier concentration of 3 × 10 ¹⁸ cm ⁻³ is deposited to a thickness of about 10 nm, and undoped In _{o. The 1} Ga _0.9 N layer 5 was deposited to about 4 nm, the substrate temperature was raised to 800 ° C., and the GaN layer 7 was grown to about 3 nm. Thereafter, the substrate 1 is taken out from the MOCVD apparatus, and then the substrate 1 to be processed is cooled, taken out from the MOCVD apparatus, introduced into the ECR plasma sputtering film forming apparatus, and Al and nitrogen are used in an AlN layer at room temperature in Ar plasma. 6 was deposited to a thickness of about 20 nm. The AlN layer 6 was removed by dry etching, source and drain electrodes 9 and 10 were deposited, and a gate electrode 11 was deposited on the AlN layer 6.

The two-dimensional electron gas 12 is generated at the interface between GaN 7 and InGaN 5, has an electron mobility of 1200 cm ² / Vsec, a two-dimensional electron concentration of 1.6 × 10 ¹³ cm ⁻² , and a sheet resistance of approximately 330 Ω / sq. It was. A nitride semiconductor HFET structure using the fact that carriers generated under the channel become a two-dimensional electron gas has been proposed. By using this, a higher 2 than the second embodiment of FIG. Dimensional electron concentration was realized. In addition, a reduction in gate leakage was also confirmed reflecting the high band gap of the AlN layer.

1 is a schematic diagram showing a configuration of an InGaN channel HFET structure exemplified in Example 1 of the present invention. FIG. The schematic diagram which shows the structure of the InGaN channel HFET structure illustrated in Example 2 of this invention. The schematic diagram which shows the structure of the InGaN channel HFET structure illustrated in Example 3 of this invention. The schematic diagram which shows the structure of the AlGaN / GaN HFET structure used conventionally. The schematic diagram which shows the structure of the AlGaN / InGaN / GaN HFET structure reported conventionally.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... SiC substrate 2 ... AlN layer 3 ... GaN layer 4 ... AlGaN layer 5 ... InGaN layer 6 ... AlN layer 7 ... GaN layer 8 ... Si dope InGaN layer 9 ... Source electrode 10 ... Drain electrode 11 ... Gate electrode 12 ... Two-dimensional Electronic gas

Claims (10)

An In _x Ga _1-x N (0 ≦ x ≦ 1) layer is provided on a nitride semiconductor thin film, a nitride semiconductor intermediate layer is provided thereon, and an AlN layer is provided thereon. Nitride semiconductor device structure. A nitride semiconductor device structure comprising an In _x Ga _1-x N (0 ≦ x ≦ 1) layer on a nitride semiconductor thin film and an AlN layer thereon. 3. The nitride semiconductor device structure according to claim 1, wherein the In _x Ga _1-x N layer is a multilayer film having a different composition. The nitride semiconductor device structure according to claim 1, wherein the nitride semiconductor intermediate layer is GaN, AlN, Al _x Ga _1-x N, or a multilayer film thereof. Element structure.   5. The nitride semiconductor device structure according to claim 1, wherein a crystal form of the uppermost AlN layer is polycrystalline. 6. 6. The nitride semiconductor device structure according to claim 1, wherein the nitride semiconductor thin film is a GaN, AlN, or Al _x Ga _1-x N layer. Nitride semiconductor device structure. 7. The nitride semiconductor device structure according to claim 1, wherein all of the electrical polarities of the In _x Ga _1-x N layer are intrinsic, or from top to intrinsic / n-type, or above. A nitride semiconductor device structure comprising the In _x Ga _1-x N layer of intrinsic / n-type / intrinsic.   8. The nitride semiconductor device structure according to claim 1, wherein the nitride semiconductor device structure is formed except for the uppermost AlN layer when metal nitride vapor phase epitaxy (MOVPE) is formed. 9. Nitride semiconductor device structure characterized by comprising an AlN layer deposited by sputtering as an uppermost layer on the surface thereof, by a molecular beam epitaxy (MBE) method or a hydride vapor phase epitaxy (HVPE) method How to make   9. The method of manufacturing a heterostructure field effect transistor (HFET) device structure using a nitride semiconductor material according to claim 8, wherein an AlN barrier layer is formed using a sputtering method when an HFET structure of an AlN barrier layer is formed in an InGaN channel layer. In addition, when an intermediate GaN barrier layer is provided by MOCVD between the InGaN channel layer and the AlN barrier layer, the InGaN / GaN heterointerface in which the two-dimensional electron gas is generated is a single crystal. Fabrication of a nitride semiconductor device structure characterized in that InGaN / GaN is grown continuously in the same MOCVD apparatus without being exposed to the atmosphere to produce an InGaN channel HFET having high electron mobility. Law.   The method for depositing an AlN layer by sputtering according to claim 8 or claim 9 includes introducing a cooled substrate to be processed into an ECR plasma sputtering film forming apparatus, using Al and nitrogen, and forming film conditions for sputtering as follows: The balance of the applied voltage of RF, the gas pressure, and the flow rate of raw material nitrogen was adjusted so that the stoichiometric ratio of Al to N was 1: 1, the film formation temperature was from room temperature to 600 ° C., and the deposited AlN The layer is a polycrystal with C-axis orientation, the polarity is the same as that of the base, the group III surface, the Al surface faces up, and a high concentration two-dimensional electron gas is generated between the InGaN layer and the AlN layer by the polarization effect. A method for fabricating a nitride semiconductor device structure.

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