JP5436819B2 - High-frequency semiconductor element, epitaxial substrate for forming high-frequency semiconductor element, and method for producing epitaxial substrate for forming high-frequency semiconductor element - Google Patents

Description

  The present invention relates to an epitaxial substrate for forming a high-frequency semiconductor element composed of a group III nitride semiconductor, and a high-frequency semiconductor element manufactured using the substrate.

  Nitride semiconductors are attracting attention as semiconductor materials for next-generation high-frequency / high-power devices because they have a high breakdown electric field and a high saturation electron velocity. In particular, a multilayer structure formed by stacking layers made of AlGaN and GaN has a high concentration of two at the stack interface (heterointerface) due to the large polarization effect (spontaneous polarization effect and piezoelectric polarization effect) unique to nitride materials. Since there is a feature that a two-dimensional electron gas (2DEG) is generated, a high electron mobility transistor (HEMT) using such a multilayer structure as a substrate has been actively developed (for example, see Non-Patent Document 1). ).

In the case of a HEMT that operates under conditions of high power and high frequency (100 W or higher, 2 GHz or higher) such as a mobile phone base station, a material with as low a thermal resistance as possible is used to suppress the temperature rise of the device due to heat generation. It is desirable to produce it. On the other hand, in the case of a HEMT that performs high-frequency operation, it is necessary to suppress parasitic capacitance as much as possible. Therefore, it is desired to manufacture the HEMT using a highly insulating material. When manufacturing a device that meets these requirements using a nitride semiconductor, a good nitride film can be grown, and a so-called insulating SiC substrate having a high specific resistance of 1 × 10 ⁸ Ωcm or more is used as a base substrate. Used.

  On the other hand, it has also been proposed to deposit an insulating AlN film on a conductive SiC substrate by HVPE (hydride vapor phase epitaxy), MOCVD, or the like, and use this as a base substrate (for example, non-patent literature). 2 and Patent Document 1).

"Highly Reliable 250W GaN High Electron Mobility Transistor Power Amplifier", T. Kikkawa, Japanese Journal of Applied Physics, Vol. 44, No. 7A, 2005, pp. 4896-4901. "A 100-W High-Gain AlGaN / GaN HEMT Power Amplifier on a Conductive N-SiC Sustrate for Wireless Bass Station Applications", M. Kanamura, T. Kikkawa, and K. Joshin, Tech. Dig. Of 2004 IEEE International Electron Device Meeting (IEDM2008), pp.799-802 JP 2002-359255 A

  The semi-insulating SiC substrate has a problem that the substrate itself is expensive. On the other hand, when a relatively inexpensive conductive SiC substrate is used, there is a problem that high frequency operation is hindered because the parasitic capacitance of the substrate increases.

  Further, in the method disclosed in Non-Patent Document 2, since it is necessary to form the AlN film with a large thickness of 10 μm in order to obtain the base substrate, the HVPE method is adopted as the crystal growth method. However, when the HVPE method is adopted, it is difficult to uniformly control the crystal quality (dislocation density, etc.) of the AlN film over the entire surface of the substrate, and thus the crystal quality on the surface of the base substrate tends to be nonuniform. When a group III nitride film is formed on a base substrate having non-uniform crystal quality and a HEMT is manufactured, the nitride film also has a variation in crystal quality even in the nitride film. As a result, characteristic variations occur.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide an epitaxial substrate capable of realizing a semiconductor element for high-frequency operation having cost merit and excellent characteristics.

In order to solve the above problems, the invention of claim 1 is characterized in that a base substrate made of SiC, a buffer layer made of AlN epitaxially formed on the base substrate, and epitaxially formed on the buffer layer, A channel layer made of GaN, and Al _x In _y Ga _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) formed epitaxially on the channel layer. A barrier layer; and a gate electrode, a source electrode, and a drain electrode formed on the barrier layer, wherein the base substrate is made of SiC on a base material made of conductive SiC, An insulating layer having an insulating property with a resistance of 1 × 10 ⁶ Ωcm or more is formed to a thickness of 9 μm to 12 μm .

A second aspect of the present invention is the high-frequency semiconductor device according to the first aspect, wherein the insulating layer is formed by a thermal CVD method, and vanadium as an insulating element is 1 × 10 ¹⁷ / It is characterized by having an insulating property by containing at a concentration of cm ^{3 to} 3 × 10 ¹⁷ / cm ³ .

The invention of claim 3 is a base substrate made of SiC, a buffer layer made of AlN epitaxially formed on the base substrate, a channel layer made of GaN epitaxially formed on the buffer layer, A barrier layer made of Al _x In _y Ga _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) epitaxially formed on the channel layer, The base substrate is formed by forming an insulating layer made of SiC and having an insulating property of specific resistance of 1 × 10 ⁶ Ωcm or more on a base material made of conductive SiC in a thickness of 9 μm to 12 μm. It is characterized by that.

The invention according to claim 4 is the epitaxial substrate according to claim 3 , wherein the insulating layer is formed by a thermal CVD method, and vanadium as an insulating element is 1 × 10 ¹⁷ / cm ^3. It is characterized by having insulation by containing at a concentration of ˜3 × 10 ¹⁷ / cm ³ .

The invention according to claim 5 is an insulation in which an insulating layer made of SiC and having an insulating property of specific resistance of 1 × 10 ⁶ Ωcm or more is formed on a base material made of SiC having conductivity to a thickness of 9 μm to 12 μm. A layer forming step; a buffer layer forming step for epitaxially forming a buffer layer made of AlN on the insulating layer; a channel layer forming step for epitaxially forming a channel layer made of GaN on the buffer layer; A barrier layer forming step of epitaxially forming a barrier layer made of Al _x In _y Ga _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) on the channel layer; It is characterized by providing.

Invention of Claim 6 is a manufacturing method of the epitaxial substrate of Claim 5 , Comprising: In the said insulating-layer formation process , vanadium as an insulating element is 1 * 10 < ¹⁷ > / cm < ³ > ^-3 * 10 < ¹⁷ > / cm. ^The insulating layer is vapor-phase epitaxially grown by a thermal CVD method so as to be contained at a concentration of ³ .

The invention of claim 7 is a method of manufacturing an epitaxial substrate according to claim 6, wherein in the insulating layer forming step, by using a vanadium chloride as a raw material gas, Ru is contained vanadium in the insulating layer , characterized in that.

The invention according to claim 8 is the method for producing an epitaxial substrate according to claim 6 , wherein in the insulating layer forming step , an organometallic vanadium compound is used as a source gas to contain vanadium in the insulating layer. Ru is characterized by.

According to the first to eighth aspects of the present invention, a semiconductor element in which parasitic capacitance is suppressed to the same extent as that manufactured using an insulating SiC substrate is realized. Thereby, a semiconductor element suitable for high-frequency operation can be obtained at a lower cost than in the case of using an expensive insulating SiC substrate.

  FIG. 1 is a diagram schematically showing a cross-sectional structure of a HEMT device 20 as one aspect of a semiconductor device including an epitaxial substrate 10 according to an embodiment of the present invention. Epitaxial substrate 10 has a configuration in which insulating layer 2, buffer layer 3, channel layer 4, and barrier layer 5, each of which is a group III nitride semiconductor layer, are epitaxially formed on base material 1. In the following, the substrate in which the insulating layer 2 is formed on the base material 1 may be referred to as a base substrate. Further, the channel layer 4 and the barrier layer 5 may be collectively referred to as a functional layer.

  Further, the HEMT element 20 includes a source electrode 6, a drain electrode 7, and a gate electrode 8 provided on the epitaxial substrate 10 (on the barrier layer 5). In addition, the ratio of the thickness of each layer in FIG. 1 does not reflect the actual one.

  As the base material 1, a conductive SiC single crystal substrate is used. For example, it is preferable to use a 4H—SiC substrate that exhibits n conductivity type and has a specific resistance of about 0.1 Ωcm to 1 Ωcm. The thickness of the base material 1 is not particularly limited in terms of material, but for the convenience of handling, a thickness of several hundred μm to several mm is suitable.

The insulating layer 2 is an insulating layer formed to a thickness of about several μm to several tens of μm (for example, about 10 μm). In the present embodiment, having insulation means that the specific resistance is 1 × 10 ⁶ Ωcm or more. The insulating layer 2 is a layer in which insulation is ensured by intentionally adding a predetermined impurity element to SiC. In the present embodiment, the impurity element intentionally added is referred to as an insulating element. More specifically, by intentional addition of this insulating element, a so-called deep level is formed in the forbidden band, and carriers generated by residual impurities in the insulating layer 2 are compensated. Thereby, SiC, which is originally a wide band gap semiconductor, is semi-insulated. As the insulating element is added at a higher concentration, the effect of insulation in the SiC layer is enhanced. Therefore, in the insulating layer 2, an insulating element having a concentration sufficient to satisfy at least the above-described specific resistance requirement is added. It becomes. If a SiC layer is formed on the substrate 1 without doping the insulating element, the SiC layer exhibits n-type conductivity.

As an insulating element, vanadium is a preferred example. In this case, a deep level is formed at a position of about 1.6 eV from the valence band. Since the solid solution limit of vanadium with respect to SiC is about 3 × 10 ¹⁷ / cm ³ , the concentration when vanadium is used as the insulating element needs to be equal to or less than the solid solution limit. Therefore, it is effective to set the doping range of vanadium to about 1 × 10 ¹⁷ / cm ^{3 to} 3 × 10 ¹⁷ / cm ³ .

An example of the insulating layer 2 containing such an insulating element is preferably formed using a thermal CVD method. Specifically, a known heat configured to be able to supply a source gas such as SiCl ₄ or CH ₄ or a source gas of an insulating element together with a carrier gas such as N ₂ , H ₂ , Ar, or He into the reactor. It is formed using a CVD apparatus. When vanadium is used as the insulating element, an organometallic vanadium compound such as vanadium chloride or TDMV (tetrakisdimethylaminovanadium, V [N (CH ₃ ) ₂ ] ₄ ) is used as a source gas. The base material 1 is held in the reactor, and the base material 1 is heated to a predetermined insulating layer formation temperature, and the source gas is supplied together with the carrier gas at a predetermined supply ratio to form the insulating layer 2. Is done.

  The base substrate on which the insulating layer 2 is formed as described above can be handled in the same manner as an insulating SiC substrate. In addition, such a base substrate has an advantage that it can be obtained at a lower cost than an insulating SiC substrate. The epitaxial substrate 10 and the HEMT element 20 according to the present embodiment are characteristic in that the layers after the buffer layer 3 are formed on the base substrate.

  The buffer layer 3 is a layer formed of AlN to a thickness of about several hundred nm (for example, about 200 nm). The buffer layer 3 is a layer provided for improving the crystal quality of the channel layer 4 and the barrier layer 5 formed thereon.

  The channel layer 4 is a layer formed of GaN with a thickness of about several μm (for example, about 2 μm).

The barrier layer 5 is a group III nitride having a composition of Al _x In _y Ga _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1), and several tens of nm or less ( For example, it is a layer formed in a thickness of about 25 nm. For example, the barrier layer 5 is preferably formed of Al _0.2 Ga _0.8 N.

  The buffer layer 3, the channel layer 4, and the barrier layer 5 are all formed epitaxially using MOCVD (metal organic chemical vapor deposition). Specifically, organic metal (MO) source gases (TMI, TMA, TMG) of In, Al, and Ga, ammonia gas, hydrogen gas, and nitrogen gas can be supplied into the reactor. Epitaxial growth is performed using a known MOCVD furnace. That is, a base substrate is placed on a susceptor provided in the reactor, and the base substrate is heated to a predetermined buffer layer forming temperature, and TMA and ammonia gas are each supplied with a predetermined amount of carrier gas. By supplying at a supply ratio, the buffer layer 3 is formed. The channel layer 4 is also formed by supplying TMG and ammonia gas together with a carrier gas at a predetermined supply ratio while the base substrate is heated to a predetermined channel layer forming temperature. Further, the barrier layer 5 can be formed after the channel layer 4 is formed by setting a formation temperature according to the composition of the barrier layer 5 to be formed and supplying a gas according to the composition. I can do it.

The dislocation density of the channel layer 4 thus obtained is 1 × 10 ⁸ / cm ² or less, and the surface flatness of the barrier layer 5 is 0.5 nm or less. That is, by using the MOCVD method, a functional layer having a good crystal quality can be realized.

  In the present embodiment, the buffer layer 3 made of group III nitride and the functional layer are formed on the base substrate on which the insulating layer 2 is formed of SiC. This is because the group III nitride crystal is formed on the SiC crystal exhibiting good lattice matching with the group III nitride, and the buffer layer 3 and further the functional layer are formed directly on the SiC substrate. Same as forming. This is also one of the reasons why the functional layer made of Group III nitride is produced with good crystal quality.

  The source electrode 6 and the drain electrode 7 are multilayer metal electrodes made of Ti / Al / Ni / Au each having a thickness of about 10 to 100 nm. The source electrode 6 and the drain electrode 7 are in ohmic contact with the barrier layer 5. The source electrode 6 and the drain electrode 7 are preferably formed by a vacuum deposition method and a photolithography process. In order to improve the ohmic contact between both electrodes, after electrode formation, heat treatment is performed for several tens of seconds (eg, 30 seconds) in a nitrogen gas atmosphere at a predetermined temperature (eg, 850 ° C.) between 650 ° C. and 1000 ° C. It is preferable to apply.

  The gate electrode 8 is a multi-layered metal electrode made of Pd / Au having a thickness of about 10 to 100 nm. The gate electrode 8 has a Schottky contact with the barrier layer 5. The gate electrode 8 is preferably formed by a vacuum deposition method and a photolithography process.

  In the HEMT device 20 having such a configuration, the interface between the channel layer 4 and the barrier layer 5 is a heterojunction interface. Therefore, due to the spontaneous polarization effect and the piezo polarization effect, the interface (more specifically, the channel layer 4 A two-dimensional electron gas region in which the two-dimensional electron gas is present in a high concentration is formed in the vicinity of the interface).

  In the HEMT device 20, the parasitic capacitance between the gate and the source electrode is about 1/500 of the HEMT device similarly manufactured using the conductive SiC substrate as the base substrate, and the insulating SiC substrate is used as the base substrate. The value is similar to that of the HEMT device fabricated in this way. That is, the HEMT element 20 is suitable for high-frequency operation.

  As described above, according to the present embodiment, a semiconductor element is formed using an epitaxial substrate formed by forming an insulating SiC layer on a conductive SiC substrate and then forming a functional layer. By doing so, a semiconductor element in which parasitic capacitance is suppressed to the same extent as that manufactured using an insulating SiC substrate is realized. Thereby, a semiconductor element suitable for high-frequency operation can be obtained at a lower cost than in the case of using an expensive insulating SiC substrate.

  In addition, the specific structure aspect of an insulating layer is not restricted to dope of the insulating element mentioned above. As long as the same insulating property can be ensured, the insulating layer may be formed in other modes.

Example 1
In this example, the HEMT element 20 was produced. First, a 4H—SiC substrate having a 2-inch diameter and (0001) plane orientation was prepared as the base material 1 and exhibited n-type conductivity. The specific resistance of the SiC substrate was 0.1 Ωcm.

The substrate 1 is placed in a reactor of a thermal CVD apparatus, heated to 1550 ° C. with a reactor pressure of 10 kPa, SiCl ₄ gas as a silicon source gas, CH ₄ gas as a carbon source gas, An SiC layer was formed by introducing vanadium chloride gas as a vanadium source gas into the reactor together with H ₂ as a carrier gas at a predetermined flow rate. The target film thickness of the SiC layer was in the range of 9 μm to 12 μm. The flow rate of the vanadium chloride gas was adjusted so that the vanadium concentration in the SiC layer was 1 × 10 ¹⁷ / cm ³ . Thereby, a base substrate was obtained.

When the specific resistance of the obtained base substrate was measured, it varied depending on the location, but it was 1 × 10 ⁶ Ωcm or more even at the lowest specific resistance portion. This confirmed that the SiC layer was formed as an insulating layer.

  The obtained base substrate was placed in a MOCVD reactor and replaced with a vacuum gas. Then, the reactor pressure was set to 30 kPa, and an atmosphere of a hydrogen / nitrogen mixed flow state was formed. Next, the substrate was heated by susceptor heating.

  When the susceptor temperature reached 1050 ° C., Al source gas and ammonia gas were introduced into the reactor, and an AlN layer having a thickness of 200 nm was formed as the buffer layer 3.

  Subsequently, the susceptor temperature was maintained at 1100 ° C., which is the channel layer forming temperature, and TMG gas and ammonia gas were introduced into the reactor at a predetermined flow rate ratio to form a GaN layer as the channel layer 4 with a thickness of 2 μm. .

When the channel layer 4 was obtained, the susceptor temperature was kept at 1100 ° C., which is the barrier layer forming temperature, and the reactor pressure was 10 kPa. Next, an organic metal source gas and ammonia gas were introduced into the reactor at a flow rate ratio corresponding to the target composition, and an Al _0.2 Ga _0.8 N layer as the barrier layer 5 was formed to have a thickness of 25 nm. Note that hydrogen gas was used as the bubbling gas and carrier gas for the organometallic raw material. The V / III ratio was 5000.

  After the barrier layer 5 was formed, the susceptor temperature was lowered to near room temperature, the inside of the reactor was returned to atmospheric pressure, the reactor was opened to the atmosphere, and the produced epitaxial substrate 10 was taken out.

  Next, a HEMT device 20 was produced using this epitaxial substrate 10. The HEMT device was designed to have a gate width of 1 mm, a source-gate interval of 0.5 μm, a gate-drain interval of 7.5 μm, and a gate length of 1.5 μm.

Further, a 100 nm thick SiN ₄ film is formed on the epitaxial substrate 10 as a passivation film, and then the SiO ₂ film at the locations where the source electrode 6 and the drain electrode 7 are to be formed is removed by etching using photolithography. A SiO ₂ pattern layer was obtained.

  The source electrode 6 and the drain electrode 7 are made of a metal made of Ti / Al / Ni / Au (each film thickness is 25/75/15/100 nm) at each formation scheduled place using a vacuum deposition method and a photolithography process. Obtained by forming a pattern. Next, in order to make the ohmic property of the source electrode 6 and the drain electrode 7 favorable, heat treatment was performed for 30 seconds in a nitrogen gas atmosphere at 800 ° C.

  Further, the gate electrode 8 is obtained by forming a Schottky metal pattern made of Pd / Au (each film thickness is 30/100 nm) at a place where the gate electrode 8 is to be formed by using vacuum deposition and photolithography. It was.

  Through the above process, the HEMT device 20 was obtained.

  With respect to the obtained HEMT device 20, the capacitance between the gate and the source electrode was measured and found to be 0.1 pF.

(Example 2)
A HEMT device 20 was fabricated in the same manner as in Example 1 except that TDMV was used instead of vanadium chloride as the vanadium source gas when forming the SiC layer.

  With respect to the obtained HEMT device 20, the capacitance between the gate and the source electrode was measured and found to be 0.1 pF.

(Comparative Example 1)
A HEMT device was produced in the same manner as in Examples 1 and 2, except that the SiC layer formed in Example 1 and Example 2 was not formed and the base material 1 was used as it was as the base substrate.

  With respect to the obtained HEMT device 20, the gate-source electrode capacitance was measured and found to be 50 pF.

  From the above results, it was confirmed that providing the insulating layer 2 as in Example 1 and Example 2 is effective in suppressing the parasitic capacitance of the HEMT element.

(Comparative Example 2)
Instead of the conductive SiC substrate used in Example 1, Example 2, and Comparative Example 1, a 2 inch diameter (0001) plane orientation 4H—SiC substrate having a specific resistance of 1 × 10 ⁷ Ωcm was prepared. A HEMT device was fabricated in the same manner as in Example 1 and Example 2, except that the SiC layer formed in Example 1 and Example 2 was not formed and the SiC substrate was used as it was as a base substrate.

  With respect to the obtained HEMT device, the capacitance between the gate and the source electrode was measured and found to be 0.08 pF.

  The above results mean that the parasitic capacitance can be reduced to the same extent as in the case of using the insulating SiC substrate by using the epitaxial substrates according to the first and second embodiments.

It is a figure which shows typically the cross-sectional structure of the HEMT element 20 as one aspect | mode of the semiconductor element comprised including the epitaxial substrate 10 which concerns on embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Base material 2 Insulating layer 3 Buffer layer 4 Channel layer 5 Barrier layer 6 Source electrode 7 Drain electrode 8 Gate electrode 10 Epitaxial substrate 20 HEMT element

Claims (8)

A base substrate made of SiC;
A buffer layer made of AlN epitaxially formed on the base substrate;
A channel layer made of GaN epitaxially formed on the buffer layer;
A barrier layer made of Al _x In _y Ga _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) epitaxially formed on the channel layer;
A gate electrode, a source electrode, and a drain electrode formed on the barrier layer;
With
The base substrate is formed by forming an insulating layer made of SiC and having an insulating property of specific resistance of 1 × 10 ⁶ Ωcm or more on a base material made of conductive SiC in a thickness of 9 μm to 12 μm. ,
A high-frequency semiconductor device characterized by the above. The high-frequency semiconductor device according to claim 1,
The insulating layer is formed by a thermal CVD method and has insulating properties by containing vanadium as an insulating element at a concentration of 1 × 10 ¹⁷ / cm ^{3 to} 3 × 10 ¹⁷ / cm ^3. ,
A high-frequency semiconductor device characterized by the above. A base substrate made of SiC;
A buffer layer made of AlN epitaxially formed on the base substrate;
A channel layer made of GaN epitaxially formed on the buffer layer;
Al formed epitaxially on the channel layer _x In _y Ga _z A barrier layer made of N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1),
With
The base substrate is made of SiC on a base material made of conductive SiC, and has a specific resistance of 1 × 10 ⁶ An insulating layer having an insulating property of Ωcm or more is formed to a thickness of 9 μm to 12 μm.
An epitaxial substrate for forming a semiconductor device for high frequency. The epitaxial substrate according to claim 3 , wherein
The insulating layer is formed by a thermal CVD method and has insulating properties by containing vanadium as an insulating element at a concentration of 1 × 10 ¹⁷ / cm ^{3 to} 3 × 10 ¹⁷ / cm ^3. ,
An epitaxial substrate for forming a semiconductor device for high frequency. An insulating layer forming step of forming an insulating layer made of SiC and having a specific resistance of 1 × 10 ⁶ Ωcm or more on a substrate made of SiC having conductivity to a thickness of 9 μm to 12 μm;
A buffer layer forming step of epitaxially forming a buffer layer made of AlN on the insulating layer;
A channel layer forming step of epitaxially forming a channel layer made of GaN on the buffer layer;
A barrier layer forming step of epitaxially forming a barrier layer made of Al _x In _y Ga _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) on the channel layer; ,
A method for producing an epitaxial substrate for forming a semiconductor device for high frequency, comprising : A method for producing an epitaxial substrate according to claim 5,
The insulating layer forming step is a step of vapor phase epitaxially growing the insulating layer by a thermal CVD method so that vanadium as an insulating element is contained at a concentration of 1 × 10 ¹⁷ / cm ^{3 to} 3 × 10 ¹⁷ / cm ^3. is there,
A method of manufacturing an epitaxial substrate for forming a high-frequency semiconductor element. A method for producing an epitaxial substrate according to claim 6,
In the insulating layer forming step, vanadium is included in the insulating layer by using vanadium chloride as a source gas.
A method for producing an epitaxial substrate for forming a high-frequency semiconductor element. A method for producing an epitaxial substrate according to claim 6 ,
In the insulating layer forming step, vanadium is included in the insulating layer by using an organometallic vanadium compound as a source gas.
A method for producing an epitaxial substrate for forming a high-frequency semiconductor element.

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