JP2006278857A - Semiconductor laminate structure, semiconductor device, and equipment using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize a semiconductor device, having a very small leakage current at cutoff. <P>SOLUTION: A semiconductor laminate structure 10 is obtained by sequentially forming, in this order an insulating single crystal film 12 used as a ground, and a semiconductor single-crystal film 13, used as a channel layer on an insulating single crystal substrate 11, used as the base material. The semiconductor single-crystal film 13 consists of an epitaxial film whose film thickness is 100 nm or smaller. In the semiconductor laminate structure 10, in order to realize the thin semiconductor single-crystal film 13 having few defects, compositions of the insulating single-crystal film 12 and the semiconductor single-crystal film 13 are determined so that each of lattice mismatch in the surface directions of the insulating single-crystal film 12 and the semiconductor single-crystal film 13 is be 5% or lower. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor multilayer structure and a technology related thereto.

  Conventionally, a semiconductor element using a semiconductor other than Si such as a group III nitride semiconductor has been studied. In the semiconductor element, a plurality of epitaxial films are formed on a base material, and a semiconductor single crystal film included in the plurality of epitaxial films is often used as a channel. For example, in Non-Patent Document 1, an undoped GaN single crystal film having a film thickness of 2.4 μm that is not intentionally doped is deposited on a sapphire substrate, and an n-type film having a film thickness of 0.2 μm is further formed thereon. A semiconductor device in which a GaN single crystal film is stacked as a channel layer is disclosed.

In Non-Patent Document 2, an undoped GaN single crystal film having a thickness of 0.6 μm is deposited as a channel layer on a sapphire substrate, and further, Al _0.14 Ga _0.86 having a larger band gap than the 100 nm undoped GaN layer. A semiconductor element (so-called HEMT element structure) is disclosed in which an N layer is deposited and a layer in which a two-dimensional electron gas generated near the interface between an undoped GaN layer and an Al _0.14 Ga _0.86 N layer is accumulated is used as a channel.

Takashi EGAWA et al, Characteristics of a GaN Metal Semiconductor Field-Effect Transistor Grown on a Sapphire Substrate by Metalorganic Chemical Vapor Deposition, Jpn.J.Appl.Phys.Vol.38 (1999) pp.2630-2633 M. Asif Khan et al, High electron mobility transistor based on a GaN-AI, Ga,-, N heterojunction, Appl.Phys. Lett.Vol.63 (1993) pp.1214-1215

  In Non-Patent Document 1, since the base substrate is sapphire having a large lattice mismatch with GaN, the thickness of the undoped GaN single crystal film is 2.4 μm. For example, it is necessary to improve the crystal quality when a good formation is performed by a vapor deposition method or the like. Further, a film thickness of 0.2 μm of the n-type GaN single crystal film is similarly required to improve the crystal quality. Here, when a semiconductor single crystal film having a thickness of several hundred nm or more is formed as a channel of a semiconductor element on an undoped GaN layer having a thickness of 2.4 μm, the semiconductor element has a control electrode (see Non-Patent Document 1). In a semiconductor element, the channel cannot be blocked unless a voltage is applied to the gate) to sufficiently expand the depletion layer inside the channel. In other words, in order to maintain the state where the channel is cut off, it is necessary to continuously apply a sufficiently large voltage to the control electrode (so-called normally-on structure), and in that case, the undoped GaN layer is not a highly insulating semiconductor. Therefore, there is a problem that even if the channel is cut off, the leakage current flowing through the undoped GaN layer cannot be reduced to a level that does not cause a problem in practice.

In the contents of Non-Patent Document 2, since the base substrate is sapphire having a large lattice mismatch with GaN, the thickness of the undoped GaN single crystal film is 0.6 μm. For example, it is necessary to improve the crystal quality when the film is formed well by, for example, vapor phase growth. In the case where a layer in which a two-dimensional electron gas generated near the interface between the undoped GaN layer and the Al _0.14 Ga _0.86 N layer is formed as a channel, in the semiconductor element, a control electrode (a gate in the semiconductor element of Non-Patent Document 2) The channel cannot be blocked unless a voltage is applied to the channel to sufficiently expand the depletion layer inside the channel. In other words, in order to maintain the state where the channel is cut off, it is necessary to continuously apply a sufficiently large voltage to the control electrode (so-called normally-on structure), and in that case, the undoped GaN layer is not a highly insulating semiconductor. Therefore, there is a problem that even if the channel is cut off, the leakage current flowing through the undoped GaN layer cannot be reduced to a level that does not cause a problem in practice.

  In order to solve this problem, a conductive single crystal substrate is used as a base material, an insulating single crystal film is formed on the base material as a base, and a thin semiconductor single crystal film is formed thereon as a channel. However, if the base material is conductive, there is a problem that the high-frequency characteristics of the produced semiconductor element are not good. Also, with this method, a thin semiconductor single crystal film with good quality cannot be formed as a channel due to the effect of lattice mismatch. As a result, there has been a problem that the leakage current cannot be reduced to an extent that does not cause a problem in practice.

  It is also conceivable to form an insulating substrate as a base material, an insulating single crystal film as a base on the base material, and further form a thin semiconductor single crystal film as a channel thereon. However, it is difficult to avoid an adverse effect on the high frequency characteristics of the fabricated semiconductor element. In this method, even if the base can be made insulative, it is difficult to reduce defects in the base, and a thin semiconductor single crystal film with good quality cannot be formed as a channel. As a result, there has been a problem that the leakage current cannot be reduced to an extent that does not cause a problem in practice.

  Therefore, even with the above-described device, it is impossible to realize a semiconductor element with extremely small leakage current at the time of interruption.

  The present invention has been made to solve this problem, and an object of the present invention is to realize a semiconductor element having a very small leakage current when interrupted.

  Another object of the present invention is to realize an element having a normally-off function.

  In order to solve the above problems, the invention of claim 1 is a semiconductor laminated structure, comprising an insulating single crystal substrate, an insulating single crystal film formed on the insulating single crystal substrate, and the insulating single crystal. A first semiconductor single crystal film having a thickness of 100 nm or less formed on the crystal film, and a lattice mismatch ratio in a plane direction between the insulating single crystal film and the first semiconductor single crystal film is 5 % Or less.

  According to a second aspect of the present invention, in the semiconductor multilayer structure according to the first aspect, a lattice mismatch rate in a plane direction between the insulating single crystal substrate and the insulating single crystal film is 5% or less.

  According to a third aspect of the invention, there is provided the semiconductor stacked structure according to the first or second aspect, further comprising a second semiconductor single crystal film formed on the first semiconductor single crystal film. The band gap of the crystal film is larger than that of the first semiconductor single crystal film.

  According to a fourth aspect of the present invention, in the semiconductor multilayer structure according to the third aspect, electrons are supplied from the second semiconductor single crystal film to the first semiconductor single crystal film, so that the internal structure of the first semiconductor single crystal film is increased. A two-dimensional electron gas is generated in the vicinity of the interface with the second semiconductor single crystal film.

  According to a fifth aspect of the present invention, in the semiconductor multilayer structure according to any one of the first to fourth aspects, both the insulating single crystal substrate and the insulating single crystal film are doped with impurities in the semiconductor. It is the obtained insulator.

  According to a sixth aspect of the present invention, in the semiconductor multilayer structure according to the fifth aspect, the impurity is a transition metal element or a rare earth element.

According to a seventh aspect of the present invention, in the semiconductor multilayer structure according to any one of the first to sixth aspects, the insulating single crystal substrate has a general formula of Al _x Ga _1-x N (0.5 ≦ x ≦ 1). ), And the insulating single crystal film is made of a group III nitride represented by the general formula Al _y Ga _1-y N (0.5 ≦ y ≦ 1), a first semiconductor single crystal film, a group III nitride represented by the general formula _{Al z Ga 1-z N (} 0 ≦ z ≦ 0.5).

According to an eighth aspect of the present invention, in the semiconductor multilayer structure according to any one of the first to sixth aspects, the insulating single crystal substrate has a general formula of Al _x Ga _1-x N (0 ≦ x ≦ 0.5). And the insulating single crystal film is made of a group III nitride represented by the general formula Al _y Ga _1-y N (0 ≦ y ≦ 0.5), a first semiconductor single crystal film, a group III nitride represented by the general formula _{Al z Ga 1-z N (} 0 ≦ z ≦ 0.5).

The invention of claim 9 is the semiconductor multilayer structure according to any one of claims 1 to 6, wherein the insulating single crystal substrate is made of SiC, the insulating single crystal film is made of SiC, and a first semiconductor single crystal film, a group III nitride represented by the general formula _{Al z Ga 1-z N (} 0 ≦ z ≦ 0.5).

A tenth aspect of the present invention is the semiconductor multilayer structure according to the third or fourth aspect, wherein the second semiconductor single crystal film is represented by a general formula Al _w Ga _1-w N (0 ≦ w ≦ 1). Made of Group III nitride.

  An eleventh aspect of the invention is a semiconductor element in which a Schottky metal electrode is formed on the semiconductor multilayer structure according to any one of the first to tenth aspects.

  According to a twelfth aspect of the present invention, at least one insulating film is deposited on the semiconductor multilayer structure according to any one of the first to tenth aspects, and a metal electrode is formed on the insulating film. It is a semiconductor element.

  According to a thirteenth aspect of the present invention, in the semiconductor element according to the eleventh or twelfth aspect, a current flowing through the first semiconductor single crystal film is controlled by a voltage applied to the metal electrode.

  According to a fourteenth aspect of the present invention, in the semiconductor element according to the thirteenth aspect, a depletion layer generated in the first semiconductor single crystal film is formed in the insulating single crystal film when no voltage is applied to the metal electrode. Thus, a state is formed in which electrons do not flow inside the first semiconductor single crystal film.

  According to a fifteenth aspect of the present invention, in the semiconductor device according to any one of the eleventh to fourteenth aspects, the film thickness of the first semiconductor single crystal film is 30 nm or less.

According to a sixteenth aspect of the present invention, in the semiconductor element according to any one of the eleventh to fourteenth aspects, the concentration of the impurity imparting conductivity to the semiconductor in the first semiconductor single crystal film is 1 × 10 ¹⁷ / cm ^3. It is as follows.

  According to a seventeenth aspect of the present invention, in the semiconductor element using the semiconductor multilayer structure according to the third or fourth aspect, the thickness of the second semiconductor single crystal film is 10 nm or less.

  According to an eighteenth aspect of the present invention, in the semiconductor element according to the seventeenth aspect, the thickness of the first semiconductor single crystal film is 50 nm or less.

  A nineteenth aspect of the present invention is an apparatus using the semiconductor element according to any one of the eleventh to eighteenth aspects.

  According to a twentieth aspect of the present invention, in the semiconductor multilayer structure according to any one of the first to tenth aspects, at least one of the first semiconductor single crystal film and the second semiconductor single crystal film is metal organic vapor phase epitaxial growth. Or by molecular beam epitaxial growth.

  According to the first to twentieth aspects of the present invention, the first semiconductor single crystal film having few defects and having a film thickness of 100 nm or less can be used as a channel, and the underlying layer is highly insulative. It is possible to realize a semiconductor element with a small leakage current.

  According to the invention of claim 2, since the insulating single crystal film with few defects due to lattice mismatch can be formed, the defects of the first semiconductor single crystal film can be further reduced.

  According to the fourteenth to seventeenth aspects of the present invention, there is provided a semiconductor device having a normally-off function that can use a first semiconductor single crystal film having a small thickness and a low defect as a channel, and can cut off a current without applying a voltage. It can be easily realized.

<1 First Embodiment>
FIG. 1 is a diagram showing a configuration of a semiconductor multilayer structure 10 according to the first embodiment of the present invention and an FET (Field Effect Transistor) 510 that is a semiconductor element formed using the semiconductor multilayer structure 10. 1 is a cross-sectional view of the semiconductor multilayer structure 10 and the FET 510. For convenience of illustration, the thickness ratio of each part illustrated in FIG. 1 is the thickness of each part in the actual semiconductor multilayer structure 10 and the semiconductor element 510. Does not reflect the ratio. This also applies to FIGS.

  As shown in FIG. 1, a semiconductor laminated structure 10 includes an insulating single crystal film 12 serving as a base and a semiconductor single crystal film 13 serving as a channel layer on an insulating single crystal substrate 11 serving as a base material. It is obtained by forming sequentially in this order of description. The insulating single crystal film 12 and the semiconductor single crystal film 13 are epitaxial films formed by a known method such as a metal organic vapor phase epitaxial growth method or a molecular beam epitaxial growth method. A gate electrode 511, a drain electrode 512, and a source electrode 513 are formed on the semiconductor single crystal film 13 formed on the uppermost portion of the semiconductor multilayer structure 10 thus obtained, and the semiconductor single crystal film 13 is channeled. A FET 510 as a layer is realized.

The insulating single crystal substrate 11 is a highly insulating single crystal substrate having a resistivity of 10 ⁸ Ωcm or more. The thickness of the insulating single crystal substrate 11 is preferably several 100 μm to several mm for convenience of handling, but it is not hindered to be outside this range. As the insulating single crystal substrate 11, for example, a substrate made of a group III nitride or SiC can be used. The group III nitride used for the insulating single crystal substrate 11 is preferably a group III nitride represented by the general formula Al _x Ga _1-x N (0 ≦ x ≦ 1), more preferably the general formula. It is a group III nitride represented by Al _x Ga _1-x N (0.5 ≦ x ≦ 1), and more preferably AlN. This is because the group III nitride represented by the general formula Al _x Ga _1-x N is improved in insulation as the Al content x increases, so that the group III nitride used for the insulating single crystal substrate 11 is used. AlN is the most desirable because, if the Al content x is 0.5 or more, sufficient insulation can often be secured.

  Note that a substrate made of a semiconductor doped with an impurity to be an insulator can be used for the insulating single crystal substrate 11. For example, a substrate made of Group III nitride or SiC doped with impurities to be highly insulating can be used as the insulating single crystal substrate 11.

The insulating single crystal film 12 is a highly insulating epitaxial film having a resistivity of 10 ⁸ Ωcm or more, like the insulating single crystal substrate 11. As long as the insulating single crystal film 12 grows on the insulating single crystal substrate 11 within the scope of the present invention, it has a thin semiconductor single crystal film with few defects as long as it has a film thickness of 0.5 μm or more. 13 will sufficiently function as a base for realizing the above-described 13. As the insulating single crystal film 12, like the insulating single crystal substrate 11, an epitaxial film made of group III nitride or SiC, or an epitaxial film made of group III nitride or SiC made highly doped by doping impurities. A membrane can be used. The group III nitride used for the insulating single crystal film 12 is preferably a group III nitride represented by the general formula Al _y Ga _1-y N (0 ≦ y ≦ 1) for the same reason as described above. More preferably, it is a group III nitride represented by the general formula Al _x Ga _1-x N (0.5 ≦ x ≦ 1), and more preferably AlN.

  The above-mentioned impurities doped for improving the insulating properties of the insulating single crystal substrate 11 or the insulating single crystal film 12 are donors or acceptors that cancel carriers that cause conductivity, for example, transition metal elements Or it is selected from rare earth elements. The doping amount of the impurity is determined by examining beforehand the amount of doping that can ensure sufficient insulation.

The semiconductor single crystal film 13 is an epitaxial film having a thickness of 100 nm or less. By setting the thickness of the semiconductor single crystal film 13 to 100 nm or less, as shown in FIG. 2, a voltage is applied to the gate electrode 511 serving as an FET control electrode, and a depletion layer DL is formed inside the semiconductor single crystal film 13. By forming the channel, it is possible to realize a state where the channel is cut off. Further, since the base is made of an insulating single crystal film, it is possible to suppress the leakage current when the channel is cut off to such an extent that there is no practical problem. The semiconductor single crystal film 13 is made of, for example, a group III nitride, preferably a group III nitride represented by the general formula Al _z Ga _{1 -zN} (0 ≦ z ≦ 0.5).

  Furthermore, in the semiconductor multilayer structure 10, in order to realize a thin semiconductor single crystal film 13 with few defects, the lattice mismatch in the plane direction between the insulating single crystal film 12 and the semiconductor single crystal film 13 is 5% or less. As described above, the compositions of the insulating single crystal film 12 and the semiconductor single crystal film 13 are determined. Such prevention of lattice mismatch is typically realized by making the compositions of the insulating single crystal film 12 and the semiconductor single crystal film 13 coincide or similar, but the combination of α-SiC and GaN. Such a combination of different material systems is not disturbed.

  In addition, in order to realize the thin semiconductor single crystal film 13 with few defects, it is desired to reduce the defects of the insulating single crystal film 12 serving as a base, which is insulated from the insulating single crystal substrate 11. This is realized by determining the composition of the insulating single crystal substrate 11 and the insulating single crystal film 12 such that the lattice mismatch with the insulating single crystal film 12 is 5% or less.

  The gate electrode 511 formed on the semiconductor multilayer structure 10 is a Schottky metal electrode formed by making a Schottky junction with the semiconductor single crystal film 13, and the drain electrode 512 and the source electrode 513 are formed of a semiconductor single crystal. This is a metal electrode formed by ohmic contact with the crystal film 13. In the Schottky FET 510 realized in this way, the depletion layer DL inside the semiconductor single crystal film 13 can be enlarged or reduced by changing the voltage applied to the gate electrode 511. The current flowing through the semiconductor single crystal film 13 can be controlled by the applied voltage.

In addition, since the FET 510 uses the thin semiconductor single crystal film 13 with few defects as a channel layer, the semiconductor single crystal film 13 is sufficiently thin (preferably 30 nm or less) or conductive to the semiconductor. By sufficiently reducing the concentration of impurities for imparting (desirably 1 × 10 ¹⁷ / cm ³ or less), a normally-off device having a small leakage current when the channel is cut off can be obtained. When such a normally-off type FET is incorporated in an electronic device, no current flows through the channel even if a voltage cannot be applied to the control electrode due to a failure or the like. It can contribute to cost reduction of equipment.

  In addition, since the base material and the underlayer of the FET 510 are insulative, the FET 510 is hardly affected by the parasitic capacitance and has high frequency characteristics.

  In the above description, an example in which the gate electrode 511, the drain electrode 512, and the source electrode 513 are directly formed on the semiconductor single crystal film 13 is shown. However, as shown in FIG. Further, one or more kinds of semiconductor single crystal films 14 are formed, and a drain electrode 512 and a source electrode 513 are formed by ohmic junction on the semiconductor single crystal film 14 formed on the uppermost part of the semiconductor stacked structure 10. The gate electrode 511 may be formed on the exposed portion of the semiconductor single crystal film 13 that is not coated with the single crystal film 14.

  In the above description, an example in which a Schottky FET is realized is shown, but an MIS FET may be realized.

  For example, as shown in FIG. 4, one or more types of insulating films 15 are further formed on the semiconductor single crystal film 13, and a gate is formed on the insulating film 15 formed on the top of the semiconductor stacked structure 10. The electrode 511 is formed, and the drain electrode 512 and the source electrode 513 may be formed by ohmic junction on the exposed portion of the semiconductor single crystal film 13 that is not coated with the insulating film 15.

  Such an FET 510 can be suitably used in an apparatus including a high frequency circuit, a power control circuit, and the like.

<2 Second Embodiment>
FIG. 5 is a diagram showing a configuration of a semiconductor multilayer structure 20 and a HEMT (High Electron Mobility Transistor) 520 that is a semiconductor element formed using the semiconductor multilayer structure 20 according to the second embodiment of the present invention. FIG. 5 is a cross-sectional view of the semiconductor multilayer structure 20 and the HEMT 520.

  As shown in FIG. 5, the semiconductor multilayer structure 20 includes an insulating single crystal film 22 as a base, a semiconductor single crystal film 23 as a channel layer, an electron on an insulating single crystal substrate 21 as a base material. The semiconductor single crystal film 24 to be a supply layer is obtained by sequentially forming in this order of description. The insulating single crystal film 22 and the semiconductor single crystal films 23 and 24 are epitaxial films formed by metal organic vapor phase epitaxy or molecular beam epitaxy. A gate electrode 521, a drain electrode 522, and a source electrode 523 are formed on the semiconductor single crystal film 24 formed on the uppermost portion of the semiconductor stacked structure 20 obtained in this way, and the semiconductor single crystal film 23 is channeled. A HEMT 520 as a layer is realized.

  In addition, the semiconductor multilayer structure 20 according to the second embodiment includes an insulating single crystal similar to the insulating single crystal substrate 11, the insulating single crystal film 12, and the semiconductor single crystal film 13 of the semiconductor multilayer structure 10 according to the first embodiment. Since the semiconductor single crystal film 24 is further formed on the crystal substrate 21, the insulating single crystal film 22, and the semiconductor single crystal film 23, the insulating single crystal substrate 21, the insulating single crystal film 22 are obtained. The duplicated explanation of the semiconductor single crystal film 23 is omitted.

The semiconductor single crystal film 24 formed on the semiconductor single crystal film 23 is a group III nitride, preferably III represented by the general formula Al _w Ga _1-w N (0 ≦ w ≦ 0.5). An epitaxial film made of a group nitride can be used. The composition of the semiconductor single crystal film 24 is determined so that the band gap is larger than that of the semiconductor single crystal film 23. For example, the composition of the semiconductor single crystal film 23 is represented by the general formula Al _x Ga _1-x N (0 ≦ x ≦ 0.5), and the composition of the semiconductor single crystal film 24 is represented by the general formula Al _w Ga _1-w N ( 0 ≦ w ≦ 1), the Al amount w contained in the semiconductor single crystal film 24 is determined to be larger than the Al amount x contained in the semiconductor single crystal film 23. Thereby, electrons are supplied from the semiconductor single crystal film 24 to the semiconductor single crystal film 23, and a two-dimensional electron gas DEG serving as a carrier of the HEMT 520 is generated in the vicinity of the interface with the semiconductor single crystal film 24 inside the semiconductor single crystal film 23. Is done.

  The gate electrode 521 formed on the semiconductor multilayer structure 20 is a Schottky metal electrode formed by making a Schottky junction with the semiconductor single crystal film 24 as in the case of the first embodiment. The electrode 522 and the source electrode 523 are metal electrodes formed by ohmic contact with the semiconductor single crystal film 24. In the HEMT 520 realized in this way, the depletion layer inside the semiconductor single crystal film 23 can be enlarged or reduced by changing the voltage applied to the gate electrode 521, so that the semiconductor is controlled by the voltage applied to the gate electrode 521. The current flowing through the single crystal film 23 can be controlled.

  Further, as in the first embodiment, the HEMT 520 uses a thin semiconductor single crystal film 23 with few defects as a channel layer, so that the HEMT 520 is a semiconductor element with a small leakage current when the channel is cut off. Of course, the HEMT 520 can also be a normally-off type if the semiconductor single crystal film 23 and the semiconductor single crystal film 24 are sufficiently thin (desirably, 50 nm or less and 10 nm or less, respectively). The normally-off HEMT 520 realized in this way, when incorporated in an electronic device, requires no special protection circuit because no current flows through the channel even if a voltage cannot be applied to the control electrode due to a failure or the like. Therefore, it can contribute to the cost reduction of electronic equipment.

  In addition, since the base material and the base are insulative as in the first embodiment, the HEMT 520 is less susceptible to parasitic capacitance and has good high frequency characteristics.

  In the above description, an example in which the gate electrode 521, the drain electrode 522, and the source electrode 523 are directly formed on the semiconductor single crystal film 24 is shown. However, as shown in FIG. Further, one or more types of semiconductor single crystal films 25 are formed, and a drain electrode 522 and a source electrode 523 are formed by ohmic junction on the semiconductor single crystal film 25 formed on the uppermost portion of the semiconductor stacked structure 20. The gate electrode 521 may be formed on the exposed portion of the semiconductor single crystal film 24 that is not coated with the single crystal film 25.

  In the above description, an example in which a Schottky HEMT is realized has been described. However, an MIS HEMT may be realized.

  For example, as shown in FIG. 7, one or more kinds of insulating films 26 are further formed on the semiconductor single crystal film 24, and gates are formed on the insulating film 26 formed on the uppermost portion of the semiconductor stacked structure 20. The electrode 521 may be formed, and the drain electrode 522 and the source electrode 523 may be formed by ohmic junction on the exposed portion of the semiconductor single crystal film 24 that is not coated with the insulating film 26.

  Such a HEMT 520 can be suitably used in an apparatus including a high-frequency circuit or the like.

  Hereinafter, preferred examples of the present invention and comparative examples outside the scope of the present invention will be described.

<Example 1>
Example 1 is an example according to the first embodiment (see FIG. 1) of the present invention.

In Example 1, on a highly insulating AlN substrate having a thickness of 430 μm, a highly insulating AlN film having a thickness of 1 μm, a thickness of 50 nm, and a donor concentration of donor are formed by metal organic chemical vapor deposition. A GaN film having a concentration of 1 × 10 ¹⁸ / cm ³ was sequentially formed in this order. Here, the AlN substrate corresponds to the insulating single crystal substrate 11 of FIG. 1, and the AlN film and the GaN film correspond to the insulating single crystal film 12 and the semiconductor single crystal film 13 of FIG. 1, respectively.

In the semiconductor multilayer structure 10 thus formed, the lattice mismatch in the plane direction between the AlN substrate and the AlN film is 0%, and the lattice mismatch in the plane direction between the AlN film and the GaN film is 2.4%. Both are 5% or less. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor multilayer structure 10, it was 1 × 10 ⁷ / cm ² or less.

  Further, the gate electrode 511 was formed by a Schottky junction at an appropriate position on the GaN film, and the drain electrode 512 and the source electrode 513 were formed by an ohmic junction to obtain a Schottky FET 510.

  With respect to the FET 510, when a voltage of 40V was applied between the drain and source and a voltage of -5V was applied between the gate and source, the leakage current density was evaluated to be 1 pA / mm or less.

<Example 2>
Example 2 is an example according to the first embodiment (see FIG. 1) of the present invention.

In Example 2, a highly insulating AlN film having a film thickness of 1 μm, a film thickness of 30 nm, and a donor concentration of 1 are formed on a highly insulating AlN substrate having a thickness of 430 μm by metal organic chemical vapor deposition. A GaN film of × 10 ¹⁷ / cm ³ was sequentially formed in this order of description. Here, the AlN substrate corresponds to the insulating single crystal substrate 11 of FIG. 1, and the AlN film and the GaN film correspond to the insulating single crystal film 12 and the semiconductor single crystal film 13 of FIG. 1, respectively.

In the semiconductor multilayer structure 10 thus formed, the lattice mismatch in the plane direction between the AlN substrate and the AlN film is 0%, and the lattice mismatch in the plane direction between the AlN film and the GaN film is 2.4%. Both are 5% or less. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor multilayer structure 10, it was 1 × 10 ⁷ / cm ² or less.

  Further, the gate electrode 511 was formed by a Schottky junction at an appropriate position on the GaN film, and the drain electrode 512 and the source electrode 513 were formed by an ohmic junction to obtain a Schottky FET 510.

  With respect to the FET 510, when a voltage of 40V was applied between the drain and source and a voltage of -5V was applied between the gate and source, the leakage current density was evaluated to be 1 pA / mm or less. In addition, when the voltage of 40 V was applied between the drain and the source and the leakage characteristic when the voltage was not applied between the gate and the source was evaluated, the leakage current density was 10 to 50 nA / mm or less. It was confirmed that it was obtained.

<Example 3>
Example 3 is an example according to the second embodiment (see FIG. 5) of the present invention.

In Example 3, a highly insulating AlN film having a thickness of 1 μm, a GaN film having a thickness of 50 nm on a highly insulating AlN substrate having a thickness of 430 μm by a metal organic chemical vapor deposition method, An Al _0.2 Ga _0.8 N film having a thickness of 25 nm was sequentially formed in this order. Here, the AlN substrate corresponds to the insulating single crystal substrate 21 of FIG. 5, and the AlN film, the GaN film, and the Al _0.2 Ga _0.8 N film are respectively the insulating single crystal film 22 and the semiconductor single crystal film of FIG. 23 and the semiconductor single crystal film 24.

In the semiconductor multilayer structure 20 thus formed, the lattice mismatch in the plane direction between the AlN substrate and the AlN film is 0%, and the lattice mismatch in the plane direction between the AlN film and the GaN film is 2.4%. Both are 5% or less. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor multilayer structure 20, it was 1 × 10 ⁷ / cm ² or less.

Further, the gate electrode 521 was formed by a Schottky junction at an appropriate position on the Al _0.2 Ga _0.8 N film, and the drain electrode 522 and the source electrode 523 were formed by ohmic junction, so that a Schottky type HEMT 520 was obtained.

  With respect to this HEMT 520, when a voltage of 40 V was applied between the drain and the source and a voltage of −5 V was applied between the gate and the source, the leakage characteristics were evaluated, and the leakage current density was 1 pA / mm or less.

<Example 4>
Example 4 is an example according to the second embodiment of the present invention (see FIG. 7).

In Example 4, on a highly insulating AlN substrate having a thickness of 430 μm, a highly insulating AlN film having a thickness of 1 μm, and a GaN film having a thickness of 50 nm are formed by metal organic chemical vapor deposition. An Al _0.2 Ga _0.8 N film having a thickness of 25 nm and an Al ₂ O ₃ film having a thickness of 10 nm were sequentially formed in this order of description. Here, the AlN substrate corresponds to the insulating single crystal substrate 21 of FIG. 7, and the AlN film, GaN film, Al _0.2 Ga _0.8 N film, and Al ₂ O ₃ film are the insulating single crystal film of FIG. 22 corresponds to the semiconductor single crystal film 23, the semiconductor single crystal film 24, and the insulating film 26.

In the semiconductor multilayer structure 20 thus formed, the lattice mismatch in the plane direction between the AlN substrate and the AlN film is 0%, and the lattice mismatch in the plane direction between the AlN film and the GaN film is 2.4%. Both are 5% or less. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor multilayer structure 20, it was 1 × 10 ⁷ / cm ² or less.

Further, the Al ₂ O ₃ film at the position where the drain electrode 522 and the source electrode 523 are formed is removed by etching, and a gate electrode 521 is formed at an appropriate position on the remaining Al ₂ O ₃ film, thereby exposing the exposed Al _0.2 Ga _0.8 N. A drain electrode 522 and a source electrode 523 were formed at appropriate positions on the film by ohmic junction to obtain a MIS type HEMT 520.

  With respect to this HEMT 520, when a voltage of 40 V was applied between the drain and the source and a voltage of −5.5 V was applied between the gate and the source, the leakage current density was evaluated, and the leakage current density was 1 pA / mm or less. .

<Example 5>
Example 5 is an example according to the second embodiment (see FIG. 5) of the present invention.

In Example 5, on a highly insulating AlN substrate having a thickness of 430 μm, a highly insulating AlN film having a thickness of 1 μm, and a GaN film having a thickness of 50 nm are formed by metal organic chemical vapor deposition. An Al _0.2 Ga _0.8 N film having a thickness of 8 nm was sequentially formed in this order. Here, the AlN substrate corresponds to the insulating single crystal substrate 21 described above, and the AlN film, the GaN film, and the Al _0.2 Ga _0.8 N film are respectively the insulating single crystal substrate 22 and the semiconductor single crystal film 23 of FIG. And correspond to the semiconductor single crystal film 24.

In the semiconductor multilayer structure 20 thus formed, the lattice mismatch in the plane direction between the AlN substrate and the AlN film is 0%, and the lattice mismatch in the plane direction between the AlN film and the GaN film is 2.4%. Both are 5% or less. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor laminated structure, it was 1 × 10 ⁷ / cm ² or less.

Further, the gate electrode 521 was formed by a Schottky junction at an appropriate position on the Al _0.2 Ga _0.8 N film, and the drain electrode 522 and the source electrode 523 were formed by ohmic junction, so that a Schottky type HEMT 520 was obtained.

  With respect to this HEMT 520, when a voltage of 40 V was applied between the drain and the source and a voltage of −5 V was applied between the gate and the source, the leakage characteristics were evaluated, and the leakage current density was 1 pA / mm or less. In addition, when a voltage of 40 V was applied between the drain and the source and a leakage characteristic was evaluated when no voltage was applied between the gate and the source, the leakage current density was 10 nA / mm or less, and a normally-off type HEMT 520 was obtained. I was able to confirm that.

<Example 6>
Example 6 is an example according to the second embodiment of the present invention (see FIG. 5).

In Example 6, a highly insulating Al _0.7 Ga _0.3 N film having a thickness of 1 μm and a thickness of 50 nm are formed on a highly insulating AlN substrate having a thickness of 430 μm by metal organic chemical vapor deposition. A GaN film and an Al _0.2 Ga _0.8 N film having a thickness of 25 nm were sequentially formed in this order. Here, the AlN substrate corresponds to the insulating single crystal substrate 21 in FIG. 5, and the Al _0.7 Ga _0.3 N film, the GaN film, and the Al _0.2 Ga _0.8 N film are the insulating single crystal film 22 in FIG. This corresponds to the semiconductor single crystal film 23 and the semiconductor single crystal film 24.

In the semiconductor multilayer structure 20 thus formed, the lattice mismatch in the plane direction between the AlN substrate and the Al _0.7 Ga _0.3 N film is 1.7%, and the plane direction between the Al _0.7 Ga _0.3 N film and the GaN film. The lattice mismatch is 0.7%, and both are 5% or less. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor multilayer structure 20, it was 1 × 10 ⁷ / cm ² or less.

Further, the gate electrode 521 was formed by a Schottky junction at an appropriate position on the Al _0.2 Ga _0.8 N film, and the drain electrode 522 and the source electrode 523 were formed by ohmic junction, so that a Schottky type HEMT 520 was obtained.

  With respect to this HEMT 520, when a voltage of 40 V was applied between the drain and the source and a voltage of −5 V was applied between the gate and the source, the leakage characteristics were evaluated, and the leakage current density was 1 pA / mm or less.

<Example 7>
Example 6 is an example according to the second embodiment of the present invention (see FIG. 5).

In Example 7, a highly insulating Al _0.8 Ga _0.2 N film having a thickness of 1 μm and a film thickness of 50 nm are formed on a highly insulating AlN substrate having a thickness of 430 μm by metal organic chemical vapor deposition. A GaN film and an Al _0.2 Ga _0.8 N film having a thickness of 25 nm were sequentially formed in this order. Here, the AlN substrate corresponds to the insulating single crystal substrate 21 of FIG. 5, and the Al _0.8 Ga _0.2 N film, the GaN film, and the Al _0.2 Ga _0.8 N film are the insulating single crystal substrate 22 of FIG. This corresponds to the semiconductor single crystal film 23 and the semiconductor single crystal film 24.

In the semiconductor multilayer structure 20 thus formed, the lattice mismatch in the plane direction between the AlN substrate and the Al _0.8 Ga _0.2 N film is 1.9%, and the plane direction between the Al _0.8 Ga _0.2 N film and the GaN film. The lattice mismatch is 0.5%, and both are 5% or less. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor laminated structure, it was 1 × 10 ⁷ / cm ² or less.

Further, the gate electrode 521 was formed by a Schottky junction at an appropriate position on the Al _0.2 Ga _0.8 N film, and the drain electrode 522 and the source electrode 523 were formed by ohmic junction, so that a Schottky type HEMT 520 was obtained.

  With respect to this HEMT 520, when a voltage of 40 V was applied between the drain and the source and a voltage of −5 V was applied between the gate and the source, the leakage characteristics were evaluated, and the leakage current density was 1 pA / mm or less.

<Example 8>
Example 8 is an example according to the second embodiment of the present invention (see FIG. 5).

In Example 8, a highly insulating α-SiC film having a thickness of 1 μm and a thickness of 50 nm are formed on a highly insulating α-SiC substrate having a thickness of 430 μm by metal organic chemical vapor deposition. A GaN film and an Al _0.2 Ga _0.8 N film having a thickness of 25 nm were sequentially formed in this order. Here, the AlN substrate corresponds to the insulating single crystal substrate 21 of FIG. 5, and the α-SiC film, the GaN film, and the Al _0.2 Ga _0.8 N film are the insulating single crystal film 22 of FIG. This corresponds to the crystal film 23 and the semiconductor single crystal film 24.

In the semiconductor multilayer structure 20 thus formed, the lattice mismatch in the plane direction between the α-SiC substrate and the α-SiC film is 0%, and the lattice mismatch in the plane direction between the α-SiC film and the GaN film. Is 3.5%, and both are 5% or less. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor multilayer structure 20, it was 1 × 10 ⁷ / cm ² or less.

Further, the gate electrode 521 was formed by a Schottky junction at an appropriate position on the Al _0.2 Ga _0.8 N film, and the drain electrode 522 and the source electrode 523 were formed by ohmic junction, so that a Schottky type HEMT 520 was obtained.

  With respect to this HEMT 520, when a voltage of 40 V was applied between the drain and the source and a voltage of −5 V was applied between the gate and the source, the leakage characteristics were evaluated, and the leakage current density was 1 pA / mm or less.

<Example 9>
Example 9 is an example according to the second embodiment (see FIG. 5) of the present invention.

In Example 9, vanadium having a thickness of 1 μm was added on a α-SiC substrate having a thickness of 430 μm and made highly insulating by adding vanadium, and high insulation was obtained by metal organic chemical vapor deposition method. An α-SiC film, a GaN film with a film thickness of 50 nm, and an Al _0.2 Ga _0.8 N film with a film thickness of 25 nm were sequentially formed in this order of description. Here, the AlN substrate corresponds to the insulating single crystal substrate 21 of FIG. 5, and the α-SiC film, the GaN film, and the Al _0.2 Ga _0.8 N film are the insulating single crystal film 22 of FIG. This corresponds to the crystal film 23 and the semiconductor single crystal film 24.

In the semiconductor multilayer structure 20 thus formed, the lattice mismatch in the plane direction between the α-SiC substrate and the α-SiC film is 0%, and the lattice mismatch in the plane direction between the α-SiC film and the GaN film. Is 3.5%, and both are 5% or less. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor multilayer structure 20, it was 1 × 10 ⁷ / cm ² or less.

Further, the gate electrode 521 was formed by a Schottky junction at an appropriate position on the Al _0.2 Ga _0.8 N film, and the drain electrode 522 and the source electrode 523 were formed by ohmic junction, so that a Schottky type HEMT 520 was obtained.

  With respect to this HEMT 520, when a voltage of 40 V was applied between the drain and the source and a voltage of −5 V was applied between the gate and the source, the leakage characteristics were evaluated, and the leakage current density was 1 pA / mm or less.

<Comparative Example 1>
In Comparative Example 1, a low-temperature grown GaN film having a film thickness of 30 nm, a film thickness of 2 μm, and a donor concentration of 1 × 10 ¹⁸ / cm ³ on a 430 μm-thick sapphire substrate by metal organic chemical vapor deposition. Were sequentially formed in this order. In the semiconductor multilayer structure obtained in this way, the base material of the semiconductor multilayer structure 10 of Example 1 was changed from an AlN substrate to a sapphire substrate, and the underlayer was grown at a low temperature from an AlN film with a thickness of 1 μm to a thickness of 30 nm. This corresponds to a GaN film that is changed to a film thickness of the channel layer increased from 50 nm to 2 μm.

In the semiconductor multilayer structure thus formed, the lattice mismatch in the plane direction between the sapphire substrate and the low-temperature grown GaN film is 16%. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor laminated structure, it was 1 × 10 ⁹ / cm ² or more.

  Furthermore, a gate electrode was formed by a Schottky junction at an appropriate position on the GaN film, and a drain electrode and a source electrode were formed by an ohmic junction to obtain a Schottky FET.

  With respect to this FET, when a voltage of 40 V was applied between the drain and source and a voltage of −10 V was applied between the gate and source, the leakage current density was evaluated, and the leakage current density was 10 μA / mm or more.

<Comparative example 2>
In Comparative Example 2, a low-temperature grown GaN film having a film thickness of 30 nm, a film thickness of 2 μm, and a donor concentration of 1 × 10 ¹⁷ / cm ³ on a sapphire substrate having a thickness of 430 μm by metal organic chemical vapor deposition. Were sequentially formed in this order. In the semiconductor multilayer structure obtained in this way, the base material of the semiconductor multilayer structure 10 of Example 1 was changed from an AlN substrate to a sapphire substrate, and the underlayer was grown at a low temperature from an AlN film with a thickness of 1 μm to a thickness of 30 nm. This corresponds to a GaN film whose channel layer thickness is increased from 30 nm to 2 μm.

In the semiconductor multilayer structure thus formed, the lattice mismatch in the plane direction between the sapphire substrate and the low-temperature grown GaN film is 16%. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor laminated structure, it was 1 × 10 ⁹ / cm ² or more.

  Furthermore, a gate electrode was formed by a Schottky junction at an appropriate position on the GaN film, and a drain electrode and a source electrode were formed by an ohmic junction to obtain a Schottky FET.

  With respect to this FET, when a voltage of 40 V was applied between the drain and source and a voltage of −10 V was applied between the gate and source, the leakage current density was evaluated, and the leakage current density was 10 μA / mm or more. Further, when the leakage characteristics were evaluated when a voltage of 40 V was applied between the drain and the source and no voltage was applied between the gate and the source, the leakage current density was 100 mA / mm or more.

<Comparative Example 3>
In Comparative Example 3, a low-temperature grown GaN film having a film thickness of 30 nm, a GaN film having a film thickness of 3 μm, and an Al film having a film thickness of 25 nm are formed on a sapphire substrate having a thickness of 430 μm by metal organic chemical vapor deposition. _0.2 Ga _0.8 N films were sequentially formed in this order. In the semiconductor multilayer structure obtained in this way, the base material of the semiconductor multilayer structure 20 of Example 2 was changed from an AlN substrate to a sapphire substrate, and the underlayer was grown at a low temperature from an AlN film with a thickness of 1 μm to a thickness of 30 nm. This corresponds to a GaN film that is changed to a channel layer thickness increased from 50 nm to 3 μm.

In the semiconductor multilayer structure thus formed, the lattice mismatch in the plane direction between the sapphire substrate and the low-temperature grown GaN film is 16%. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor laminated structure, it was 1 × 10 ⁹ / cm ² or more.

  Further, a gate electrode was formed by a Schottky junction at an appropriate position on the GaN film, and a drain electrode and a source electrode were formed by an ohmic junction to obtain a Schottky HEMT.

  With respect to this HEMT, when a voltage of 40 V was applied between the drain and the source and a voltage of −5 V was applied between the gate and the source, the leakage characteristics were evaluated, and the leakage current density was 10 μA / mm or more.

<Comparative example 4>
In Comparative Example 4, a low-temperature grown GaN film having a film thickness of 30 nm, a GaN film having a film thickness of 3 μm, and an Al film having a film thickness of 25 nm are formed on a sapphire substrate having a thickness of 430 μm by metal organic chemical vapor deposition. _{A 0.2} Ga _0.8 N film and an Al ₂ O ₃ film having a thickness of 10 nm were sequentially formed in this order. In the semiconductor multilayer structure obtained in this manner, the base material of the semiconductor multilayer structure 20 of Example 3 was changed from an AlN substrate to a sapphire substrate, and the underlayer was grown at a low temperature from an AlN film having a thickness of 1 μm to a thickness of 30 nm. This corresponds to a GaN film that is changed to a channel layer thickness increased from 50 nm to 3 μm.

In the semiconductor multilayer structure thus formed, the lattice mismatch in the plane direction between the sapphire substrate and the low-temperature grown GaN film is 16%. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor laminated structure, it was 1 × 10 ⁹ / cm ² or more.

Further, the Al ₂ O ₃ film at the formation position of the drain electrode and the source electrode is removed by etching, a gate electrode is formed at an appropriate position on the remaining Al ₂ O ₃ film, and the exposed Al _0.2 Ga _0.8 N film is formed. A drain electrode and a source electrode were formed at appropriate positions by ohmic junction to obtain a MIS type HEMT.

  With respect to this HEMT, when a voltage of 40 V was applied between the drain and the source and a voltage of −5.5 V was applied between the gate and the source, the leakage characteristics were evaluated, and the leakage current density was 10 μA / mm or more. .

<Comparative Example 5>
In Comparative Example 5, a low-temperature grown GaN film having a thickness of 30 nm, a GaN film having a thickness of 3 μm, and an Al having a thickness of 8 nm are formed on a sapphire substrate having a thickness of 430 μm by metal organic chemical vapor deposition. _0.2 Ga _0.8 N films were sequentially formed in this order. In the semiconductor multilayer structure obtained in this way, the base material of the semiconductor multilayer structure 20 of Example 5 was changed from an AlN substrate to a sapphire substrate, and the underlayer was grown at a low temperature from an AlN film with a thickness of 1 μm to a thickness of 30 nm. This corresponds to a GaN film that is changed to a channel layer thickness increased from 50 nm to 3 μm.

In the semiconductor multilayer structure thus formed, the lattice mismatch in the plane direction between the sapphire substrate and the low-temperature grown GaN film is 16%. Further, when the misfit dislocation density of the GaN film was measured for the semiconductor laminated structure, it was 1 × 10 ⁹ / cm ² or more.

  Further, a gate electrode was formed by a Schottky junction at an appropriate position on the GaN film, and a drain electrode and a source electrode were formed by an ohmic junction to obtain a Schottky HEMT.

  With respect to this HEMT, when a voltage of 40 V was applied between the drain and the source and a voltage of −5 V was applied between the gate and the source, the leakage characteristics were evaluated, and the leakage current density was 1 μA / mm or more. Further, when the leakage characteristics were evaluated when a voltage of 40 V was applied between the drain and the source and no voltage was applied between the gate and the source, the leakage current density was 100 mA / mm or more.

<Contrast of Examples and Comparative Examples>
As is clear from the comparison between the above-described Examples 1 to 9 and Comparative Examples 1 to 5, in the desirable Examples 1 to 8 of the present invention, the misfit dislocation density of the GaN film serving as the channel layer is 1 × 10 ⁷ / A semiconductor element that can be reduced to cm ² or less and has a leakage current of 1 pA / mm or less when the channel is cut off can be realized. Furthermore, in the second and fifth embodiments, a normally-off type semiconductor element can also be realized.

<3 Modification>
In the above-described embodiment, an example in which the FET 510 and the HEMT 520 are realized has been described. However, other semiconductor elements such as a diode may be realized.

1 is a cross-sectional view of a semiconductor multilayer structure 10 and an FET 510 according to a first embodiment of the present invention. 3 is a diagram showing a depletion layer inside a semiconductor single crystal film 13. FIG.

1 is a cross-sectional view of a semiconductor multilayer structure 10 and an FET 510 according to a first embodiment of the present invention. 1 is a cross-sectional view of a semiconductor multilayer structure 10 and an FET 510 according to a first embodiment of the present invention. It is sectional drawing of the semiconductor laminated structure 20 and HEMT520 which concern on 2nd Embodiment of this invention. It is sectional drawing of the semiconductor laminated structure 20 and HEMT520 which concern on 2nd Embodiment of this invention. It is sectional drawing of the semiconductor laminated structure 20 and HEMT520 which concern on 2nd Embodiment of this invention.

Explanation of symbols

10, 20 Semiconductor laminated structure 510 FET
520 HEMT
DL depletion layer DEG two-dimensional electron gas

Claims (20)

A semiconductor laminated structure,
An insulating single crystal substrate;
An insulating single crystal film formed on the insulating single crystal substrate;
A first semiconductor single crystal film having a thickness of 100 nm or less formed on the insulating single crystal film;
With
A semiconductor multilayer structure, wherein a lattice mismatch ratio in a plane direction between the insulating single crystal film and the first semiconductor single crystal film is 5% or less. The semiconductor multilayer structure according to claim 1,
2. A semiconductor multilayer structure, wherein a lattice mismatch rate in a plane direction between the insulating single crystal substrate and the insulating single crystal film is 5% or less. In the semiconductor laminated structure according to claim 1 or 2,
A second semiconductor single crystal film formed on the first semiconductor single crystal film;
A semiconductor stacked structure, wherein a band gap of the second semiconductor single crystal film is larger than that of the first semiconductor single crystal film. The semiconductor multilayer structure according to claim 3,
Electrons are supplied from the second semiconductor single crystal film to the first semiconductor single crystal film, and a two-dimensional electron gas is generated in the vicinity of the interface with the second semiconductor single crystal film inside the first semiconductor single crystal film. A semiconductor laminated structure characterized by being made. In the semiconductor multilayer structure according to any one of claims 1 to 4,
Both the insulating single crystal substrate and the insulating single crystal film are insulators obtained by doping impurities into a semiconductor. The semiconductor multilayer structure according to claim 5,
A semiconductor multilayer structure, wherein the impurity is a transition metal element or a rare earth element. The semiconductor multilayer structure according to any one of claims 1 to 6,
The insulating single crystal substrate is made of a group III nitride represented by the general formula Al _x Ga _1-x N (0.5 ≦ x ≦ 1),
The insulating single crystal film is made of a group III nitride represented by a general formula Al _y Ga _1-y N (0.5 ≦ y ≦ 1),
It said first semiconductor single crystal film has the general formula _{Al z Ga 1-z N (} 0 ≦ z ≦ 0.5) semiconductor multilayer structure characterized in that it consists of a group III nitride represented by. The semiconductor multilayer structure according to any one of claims 1 to 6,
The insulating single crystal substrate is made of a group III nitride represented by the general formula Al _x Ga _1-x N (0 ≦ x ≦ 0.5),
The insulating single crystal film is made of a group III nitride represented by a general formula Al _y Ga _1-y N (0 ≦ y ≦ 0.5),
It said first semiconductor single crystal film has the general formula _{Al z Ga 1-z N (} 0 ≦ z ≦ 0.5) semiconductor multilayer structure characterized in that it consists of a group III nitride represented by. The semiconductor multilayer structure according to any one of claims 1 to 6,
The insulating single crystal substrate is made of SiC;
The insulating single crystal film is made of SiC,
It said first semiconductor single crystal film has the general formula _{Al z Ga 1-z N (} 0 ≦ z ≦ 0.5) semiconductor multilayer structure characterized in that it consists of a group III nitride represented by. In the semiconductor laminated structure according to claim 3 or claim 4,
2. The semiconductor multilayer structure, wherein the second semiconductor single crystal film is made of a group III nitride represented by a general formula Al _w Ga _1-w N (0 ≦ w ≦ 1).   11. A semiconductor element, wherein a Schottky metal electrode is formed on the semiconductor multilayer structure according to claim 1.   11. A semiconductor device, wherein one or more insulating films are deposited on the semiconductor multilayer structure according to claim 1, and a metal electrode is formed on the insulating film. . The semiconductor element according to claim 11 or claim 12,
A semiconductor element, wherein a current flowing through the first semiconductor single crystal film is controlled by a voltage applied to the metal electrode. The semiconductor device according to claim 13.
In a state where no voltage is applied to the metal electrode, a depletion layer generated inside the first semiconductor single crystal film reaches the insulating single crystal film, and thus electrons do not flow inside the first semiconductor single crystal film. A semiconductor element characterized by forming a state. The semiconductor device according to any one of claims 11 to 14,
A semiconductor element, wherein the thickness of the first semiconductor single crystal film is 30 nm or less. The semiconductor device according to claim 11,
A semiconductor element, wherein a concentration of an impurity imparting conductivity to a semiconductor in the first semiconductor single crystal film is 1 × 10 ¹⁷ / cm ³ or less. In the semiconductor element using the semiconductor multilayer structure according to claim 3 or claim 4,
A semiconductor element, wherein the thickness of the second semiconductor single crystal film is 10 nm or less. The semiconductor device according to claim 17, wherein
A semiconductor element, wherein the thickness of the first semiconductor single crystal film is 50 nm or less.   An apparatus using the semiconductor element according to claim 11. The semiconductor multilayer structure according to any one of claims 1 to 10,
At least one of the first semiconductor single crystal film and the second semiconductor single crystal film is formed by metal organic vapor phase epitaxy or molecular beam epitaxy.

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