JP2009026975A - Semiconductor apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor apparatus which suppresses a longitudinal leak current. <P>SOLUTION: The semiconductor apparatus includes a substrate, a first conductivity type GaN layer provided on the substrate, a barrier layer provided on the GaN layer and formed of In<SB>X</SB>Al<SB>Y</SB>Ga<SB>1-X-Y</SB>N (4.66X≤Y≤4.66X+0.41, X+Y≤1), a channel layer provided on the barrier layer and formed of GaN, an electron supply layer provided on the channel layer and formed of a nitride semiconductor having a larger band gap than the channel layer, a source electrode provided in contact with a surface of the electron supply layer, a drain electrode provided in contact with the surface of the electron supply layer, and a gate electrode provided between the source electrode and drain electrode on the electron supply layer. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device using a heterojunction structure of a nitride semiconductor.

  Gallium nitride (GaN) -based semiconductor materials are characterized by a high breakdown electric field and a high saturation drift velocity of electrons. Field effect transistors (FETs) using this material system are It is attracting attention as a withstand voltage / low loss power element or a high withstand voltage / high frequency element. In particular, a heterostructure of AlGaN and GaN is epitaxially grown on a substrate of SiC, sapphire, Si or the like by a vapor phase growth method such as a metal organic chemical vapor deposition (MOCVD) method or a molecular beam epitaxy (MBE) method. A high electron mobility transistor (HEMT) that uses a two-dimensional electron gas at the interface as a channel has excellent electron transport characteristics, and research and development are being actively promoted. For example, see Patent Document 1.

When a GaN-based HEMT is used as a power element for a switching power supply, which is one of its application fields, a conductive substrate may be used to prevent the substrate potential from fluctuating greatly during on / off switching, and may be connected to a source electrode. . In such an element, a switching operation voltage is applied in the vertical direction between the drain electrode and the substrate when the device is turned off, and the vertical voltage causes a vertical leakage current between the substrate and the drain electrode. is there.
JP 2002-057158 A

  The present invention provides a semiconductor device that suppresses longitudinal leakage current.

According to one aspect of the present invention, a substrate, a first conductivity type GaN layer provided on the substrate, and an In _X Al _Y Ga _1-XY N ( 4.66X ≦ Y ≦ 4.66X + 0.41, X + Y ≦ 1), a channel layer made of GaN provided on the barrier layer, and provided on the channel layer, the channel layer An electron supply layer made of a nitride semiconductor having a larger band gap, a source electrode provided in contact with the surface of the electron supply layer, a drain electrode provided in contact with the surface of the electron supply layer, and the electrons There is provided a semiconductor device comprising: a gate electrode provided between the source electrode and the drain electrode on a supply layer.

  According to the present invention, a semiconductor device that suppresses longitudinal leakage current is provided.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, a GaN-based HEMT (High Electron Mobility Transistor) will be described as an example of a semiconductor device.

[First Embodiment]
FIG. 1 is a schematic view showing a cross-section of the main part of the semiconductor device according to the first embodiment of the present invention.

  On the main surface of the conductive substrate (for example, n-type silicon substrate) 2, a buffer layer (for example, made of n-type AlN / n-type AlGaN) 3 is provided. A back electrode 1 is provided on the surface opposite to the main surface of the substrate 2.

  An n-type GaN layer 4 is provided on the buffer layer 3, and a barrier layer 5 is provided on the n-type GaN layer 4. A heterojunction structure of the channel layer 6 and the electron supply layer 7 is provided on the barrier layer 5.

Barrier layer 5 _is made of _{In X Al Y Ga 1-X} -Y N, where the composition ratio of an In X, the composition ratio Y of Al is a 4.66X ≦ Y ≦ 4.66X + 0.41 and X + Y ≦ 1 Satisfied. Specifically, in the present embodiment, In _0.05 Al _0.5 Ga _0.45 N is used as the barrier layer 5.

The channel layer 6 is made of, for example, non-doped GaN to which no impurity is added, and the electron supply layer 7 is made of, for example, non-doped Al _0.2 Ga _0.8 N having a band gap larger than that of the GaN of the channel layer 6.

  On the surface of the electron supply layer 7, a source electrode 8 and a drain electrode 9 are provided apart from each other. The source electrode 8 and the drain electrode 9 are in ohmic contact with the surface of the electron supply layer 7.

  A gate electrode 10 is provided on the electron supply layer 7 between the source electrode 8 and the drain electrode 9 via an insulating film (for example, a silicon nitride film) 11. Note that the gate electrode 10 may be in Schottky contact with the surface of the electron supply layer 7 without providing the insulating film 11. By controlling the voltage applied to the gate electrode 10, the two-dimensional electron gas concentration at the heterojunction interface between the electron supply layer 7 and the channel layer 6 thereunder increases or decreases, and the main current flowing between the source electrode 8 and the drain electrode 9. Changes.

  Hereinafter, a method for manufacturing the semiconductor device according to the present embodiment will be described.

First, for example, a buffer layer 3 made of an n-type AlN / n-type AlGaN-based material and an n-type GaN layer are formed on an n-type silicon substrate 1 at a temperature of about 800 to 1200 ° C. by MOCVD (metal organic chemical vapor deposition). 4. A barrier layer 5 made of In _0.05 Al _0.5 Ga _0.45 N, a channel layer 6 made of non-doped GaN, and an electron supply layer 7 made of Al _0.2 Ga _0.8 N are continuously epitaxially grown. .

For example, the n-type GaN layer 4 has a thickness of 500 (nm), the barrier layer 5 has a thickness of 100 (nm), the channel layer 6 has a thickness of 2 (μm), and the electron supply layer 7 has a thickness of 30 ( nm). The donor concentration of the n-type GaN layer 4 is 1 × 10 ¹⁸ (cm ⁻³ ).

  Next, about 10 nm of silicon nitride film is deposited as an insulating film 11 on the entire surface of the wafer obtained up to the above-described process by, for example, PECVD (Plasma Enhanced Chemical Vapor Deposition), and then photolithography and dry processing are performed. An opening is formed in the insulating film 11 by etching, and the source electrode 8 and the drain electrode 9 that are in contact with the surface of the electron supply layer 7 are formed through the opening. Thereafter, the gate electrode 10 is formed on the insulating film 11.

  The n-type silicon substrate 2 is electrically connected to the source electrode 8 through the back electrode 1 and wiring formed on the back surface, and the buffer layer 3 and the n-type GaN layer 4 provided on the substrate 2. Is also doped n-type. Therefore, the potential of the substrate 1, the buffer layer 3, and the n-type GaN layer 4 is fixed to the source potential or a potential close to the source potential, and the on / off in the case where the semiconductor device according to the present embodiment is used as a power element for a switching power supply, for example It is possible to prevent the potentials of the substrate 1, the buffer layer 3, and the n-type GaN layer 4 from greatly fluctuating when switching off. In the off state, a switching operation voltage is applied in the vertical direction between the drain electrode 9 and the substrate 1. At this time, since the buffer layer 3 is doped n-type, the buffer having a relatively high defect density. It is possible to prevent an electric field from being applied to the layer 3.

  Between the n-type GaN layer 4 and the channel layer 5 made of non-doped GaN, a barrier layer 5 made of InAlGaN having a band gap larger than that of GaN is provided. Due to the conduction band discontinuity at the heterointerface between GaN and InAlGaN. In the off state, the electron current from the substrate 1 to the drain electrode 9 due to the vertical electric field can be prevented.

Here, by setting the composition ratio of InAlGaN used for the barrier layer 5 to In _0.05 Al _0.5 Ga _0.45 N, the lattice constant difference between InAlGaN and GaN can be reduced to 0.6%, and the barrier The crystal defect density in the vicinity of the upper and lower interfaces of the layer 5 becomes very low. Therefore, the electron trap concentration in the vicinity of the interface between the channel layer 6 and the barrier layer 5 can be reduced, and the on-resistance increase phenomenon (current collapse) when a high voltage is applied can be sufficiently reduced.

The conduction band discontinuity at the hetero interface between In _0.05 Al _0.5 Ga _0.45 N and GaN is about 0.7 (eV), but the barrier layer 5 has a small lattice constant difference from GaN. Since the Al composition Y of the barrier layer 7 is as large as Y ≧ 0.5, for example, the barrier layer 7 can be formed with a thickness of 100 (nm), a back barrier due to large spontaneous polarization of the barrier layer 7 occurs, and the drain electrode In the off state in which a large positive bias is applied to the drain electrode 9, the drain electrode 9 and the vertical leakage current thereunder can be sufficiently prevented.

  That is, according to the present embodiment, a semiconductor device having satisfactory switching characteristics can be provided in which the on-resistance increase phenomenon (current collapse) when a high voltage is applied can be sufficiently reduced, and the vertical leakage current in the off state is prevented. it can.

[Second Embodiment]
FIG. 2 is a schematic diagram showing a cross-section of the main part of a semiconductor device according to the second embodiment of the present invention.

  A buffer layer (eg, made of AlN / AlGaN) 13 is provided on the main surface of the conductive substrate (eg, n-type silicon substrate) 2. A back electrode 1 is provided on the surface opposite to the main surface of the substrate 2.

  An n-type GaN layer 14 is provided on the buffer layer 13, and a barrier layer 15 is provided on the n-type GaN layer 14. A heterojunction structure of the channel layer 16 and the electron supply layer 17 is provided on the barrier layer 15.

Barrier layer 15 _is made of _{In X Al Y Ga 1-X} -Y N, where the composition ratio of an In X, the composition ratio Y of Al is a 4.66X ≦ Y ≦ 4.66X + 0.41 and X + Y ≦ 1 Satisfied. Specifically, in the present embodiment, In _0.1 Al _0.8 Ga _0.1 N is used as the barrier layer 15.

The channel layer 16 is made of, for example, non-doped GaN to which no impurity is added, and the electron supply layer 17 is made of, for example, n-type Al _0.25 Ga _0.75 N having a larger band gap than the GaN of the channel layer 6. .

  On the surface of the electron supply layer 17, the source electrode 8 and the drain electrode 9 are provided so as to be separated from each other. The source electrode 8 and the drain electrode 9 are in ohmic contact with the surface of the electron supply layer 7.

  A gate electrode 10 is provided on the electron supply layer 7 between the source electrode 8 and the drain electrode 9 via an insulating film (for example, a silicon nitride film) 11. Note that the gate electrode 10 may be in Schottky contact with the surface of the electron supply layer 7 without providing the insulating film 11. By controlling the voltage applied to the gate electrode 10, the two-dimensional electron gas concentration at the heterojunction interface between the electron supply layer 17 and the channel layer 16 thereunder increases or decreases, and the main current flowing between the source electrode 8 and the drain electrode 9. Changes.

  The n-type silicon substrate 2 is electrically connected to the source electrode 8 through the back electrode 1 formed on the back surface, wiring, and the like. Furthermore, in this embodiment, a part of the barrier layer 15, the channel layer 16, and the electron supply layer 17 on the n-type GaN layer 14 is removed by, for example, dry etching to form an opening, and through the opening, A part of the source electrode 8 is in contact with the surface of the n-type GaN layer 14 exposed at the bottom of the opening. This contact has ohmic properties, and the n-type GaN layer 14 is kept at the same potential as the source electrode 8.

For example, the n-type GaN layer 14 has a thickness of 500 (nm), the barrier layer 15 has a thickness of 50 (nm), the channel layer 16 has a thickness of 3 (μm), and the electron supply layer 17 has a thickness of 25 ( nm). The donor concentration of the n-type GaN layer 14 is 2 × 10 ¹⁸ (cm ⁻³ ).

  Although the buffer layer 13 in this embodiment is not doped, since both the substrate 2 and the n-type GaN layer 14 are connected to the source electrode 8, the upper and lower layers sandwiching the buffer layer 13 have the same potential. No electric field is applied to the buffer layer 13 having a high defect density during the switching operation.

  A barrier layer 15 made of InAlGaN having a band gap larger than that of GaN is provided between the n-type GaN layer 14 and the channel layer 15 made of non-doped GaN. Due to the conduction band discontinuity at the heterointerface between GaN and InAlGaN. In the off state, the electron current from the substrate 1 to the drain electrode 9 due to the vertical electric field can be prevented.

Here, by setting the composition ratio of InAlGaN used for the barrier layer 15 to In _0.1 Al _0.8 Ga _0.1 N, the lattice constant difference between InAlGaN and GaN can be reduced to 0.8%, and the barrier The crystal defect density near the upper and lower interfaces of the layer 15 becomes very low. Therefore, the electron trap concentration in the vicinity of the interface between the channel layer 16 and the barrier layer 15 can be reduced, and the on-resistance increase phenomenon (current collapse) when a high voltage is applied can be sufficiently reduced.

In the present embodiment, the conduction band discontinuity at the heterointerface between In _0.1 Al _0.8 Ga _0.1 N and GaN is 1.28 (eV), which is compared with the first embodiment. Since it is large, the thickness of the barrier layer 15 is 50 (nm), which is thinner than that of the first embodiment. However, the drain electrode 9 and the vertical direction below the drain electrode 9 in the off state where a large positive bias is applied to the drain electrode 9 Leakage current can be sufficiently prevented. Further, similarly to the first embodiment, since the Al composition Y of the barrier layer 17 is as large as Y ≧ 0.5, a back barrier is generated due to the large spontaneous polarization of the barrier layer 17, which also causes the vertical direction when off. Leakage current can be prevented.

  That is, also in the present embodiment, a semiconductor device having good switching characteristics can be provided by sufficiently reducing the on-resistance increase phenomenon (current collapse) when a high voltage is applied, and preventing the vertical leakage current in the off state. .

The composition ratio of In _X Al _Y Ga _1- XYN used as the barrier layer is not limited to that described in the above embodiment, and 4.66X ≦ Y ≦ 4.66X + 0.41 and X + Y ≦ 1. If satisfied, even if the barrier layer is formed to a thickness (several tens of nm) sufficient to function as a barrier against electrons by suppressing the lattice constant difference between InAlGaN and GaN to within 1%, the barrier layer and its Crystal defects at the respective heterointerfaces with the upper and lower GaN can be suppressed.

  FIG. 3 shows the relationship between the In composition ratio X (horizontal axis) and the Al composition ratio Y (vertical axis) in the barrier layer.

If X and Y are in the relationship of Y = 4.66X, the lattice constant difference between In _X Al _Y Ga _1- XYN and GaN is 0%, and Y = 4.66X + 0.41. For example, the lattice constant of In _X Al _Y Ga _1- XYN is 1% smaller than that of GaN. Even if the lattice constant of _{In X Al Y Ga 1-X} -Y N with respect to the lattice constant of GaN becomes 1% greater, it can not be substantially expected to function barrier layer as a barrier to electrons, thus, longitudinal leak In order to form a barrier layer having a function of preventing current with a small lattice constant difference from GaN, 4.66X ≦ Y ≦ 4.66X + 0.41 is satisfied, that is, a straight line of Y = 4.66X in FIG. And X = Y in the range between Y = 4.66X + 0.41 straight line. X + Y = 1 is a constraint condition that the sum of the composition ratios of X and Y is 1 or less.

−1% ≦ AlGaN lattice constant difference ≦ 0%
3.157 Å ≦ lattice constant of AlGaN a-axis ≦ lattice constant of GaN a-axis (= 3.189).

  Further, in order to enhance the effect of preventing the vertical leakage current, it is desirable that Y ≧ 0.5, and when this condition is added to the above conditions, the four straight lines in FIG. 3, X + Y = 1, Y = 4.66X + 0 .41, Y = 4.66X, and Y = 0.5.

  In addition, since the n-type is easier to make than the p-type for nitride semiconductors at present, the first conductivity type is n-type in the above embodiment, but it may be p-type.

1 is a schematic diagram showing a cross section of a main part of a semiconductor device according to a first embodiment of the present invention. The schematic diagram which shows the principal part cross section of the semiconductor device which concerns on the 2nd Embodiment of this invention. The schematic diagram which shows the relationship between the composition ratio X of In and the composition ratio Y of Al in the barrier layer of the semiconductor device which concerns on embodiment of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 2 ... Substrate, 3, 13 ... Buffer layer, 4, 14 ... N-type GaN layer, 5, 15 ... Barrier layer, 6, 16 ... Channel layer, 7, 17 ... Electron supply layer, 8 ... Source electrode, 9 ... Drain Electrode, 10 ... Gate electrode

Claims (5)

A substrate,
A first conductivity type GaN layer provided on the substrate;
A barrier layer made of the _In provided on the GaN layer _{X Al Y Ga 1-X-} Y N (4.66X ≦ Y ≦ 4.66X + 0.41, X + Y ≦ 1),
A channel layer made of GaN provided on the barrier layer;
An electron supply layer provided on the channel layer and made of a nitride semiconductor having a larger band gap than the channel layer;
A source electrode provided in contact with the surface of the electron supply layer;
A drain electrode provided in contact with the surface of the electron supply layer;
A gate electrode provided between the source electrode and the drain electrode on the electron supply layer;
A semiconductor device comprising:   The semiconductor device according to claim 1, wherein an Al composition ratio Y in the barrier layer satisfies Y ≧ 0.5.   The semiconductor device according to claim 1, wherein the substrate is conductive, and the substrate and the source electrode are electrically connected.   The semiconductor device according to claim 1, wherein the source electrode is in ohmic contact with the first conductivity type GaN layer.   5. The semiconductor device according to claim 4, wherein a buffer layer made of a nitride semiconductor is provided between the substrate and the GaN layer of the first conductivity type.

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