JP2005347369A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
- Publication number
- JP2005347369A JP2005347369A JP2004162854A JP2004162854A JP2005347369A JP 2005347369 A JP2005347369 A JP 2005347369A JP 2004162854 A JP2004162854 A JP 2004162854A JP 2004162854 A JP2004162854 A JP 2004162854A JP 2005347369 A JP2005347369 A JP 2005347369A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- leads
- semiconductor device
- semiconductor
- component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/411—Chip-supporting parts, e.g. die pads
- H10W70/415—Leadframe inner leads serving as die pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W42/00—Arrangements for protection of devices
- H10W42/60—Arrangements for protection of devices protecting against electrostatic charges or discharges, e.g. Faraday shields
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W44/00—Electrical arrangements for controlling or matching impedance
- H10W44/501—Inductive arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W44/00—Electrical arrangements for controlling or matching impedance
- H10W44/601—Capacitive arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/411—Chip-supporting parts, e.g. die pads
- H10W70/413—Insulating or insulated substrates serving as die pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/421—Shapes or dispositions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/475—Capacitors in combination with leadframes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
- H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/547—Dispositions of multiple bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/547—Dispositions of multiple bond wires
- H10W72/5473—Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/932—Plan-view shape, i.e. in top view
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/759—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a laterally-adjacent discrete passive device
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004162854A JP2005347369A (ja) | 2004-06-01 | 2004-06-01 | 半導体装置およびその製造方法 |
| US11/140,394 US20050263863A1 (en) | 2004-06-01 | 2005-05-31 | Semiconductor device and a method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004162854A JP2005347369A (ja) | 2004-06-01 | 2004-06-01 | 半導体装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2005347369A true JP2005347369A (ja) | 2005-12-15 |
| JP2005347369A5 JP2005347369A5 (https=) | 2007-07-12 |
Family
ID=35424258
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004162854A Pending JP2005347369A (ja) | 2004-06-01 | 2004-06-01 | 半導体装置およびその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20050263863A1 (https=) |
| JP (1) | JP2005347369A (https=) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007173712A (ja) * | 2005-12-26 | 2007-07-05 | Hitachi Metals Ltd | Dc−dcコンバータ |
| JP2020113656A (ja) * | 2019-01-11 | 2020-07-27 | 株式会社デンソー | 電子装置およびその製造方法 |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060220191A1 (en) * | 2005-04-01 | 2006-10-05 | Honeywell International Inc. | Electronic package with a stepped-pitch leadframe |
| MY145348A (en) * | 2007-03-15 | 2012-01-31 | Semiconductor Components Ind | Circuit component and method of manufacture |
| US8824165B2 (en) * | 2008-02-18 | 2014-09-02 | Cyntec Co. Ltd | Electronic package structure |
| KR100954981B1 (ko) * | 2008-03-31 | 2010-04-29 | 권구만 | 다양한 지형선택이 가능한 골프연습기구 |
| US7847391B2 (en) * | 2008-07-01 | 2010-12-07 | Texas Instruments Incorporated | Manufacturing method for integrating a shunt resistor into a semiconductor package |
| US8241965B2 (en) * | 2009-10-01 | 2012-08-14 | Stats Chippac Ltd. | Integrated circuit packaging system with pad connection and method of manufacture thereof |
| JP5341717B2 (ja) | 2009-11-10 | 2013-11-13 | ルネサスエレクトロニクス株式会社 | 半導体パッケージ及びシステム |
| JP2013110314A (ja) * | 2011-11-22 | 2013-06-06 | Elpida Memory Inc | 半導体装置 |
| US11342260B2 (en) * | 2019-10-15 | 2022-05-24 | Win Semiconductors Corp. | Power flat no-lead package |
| US11380631B2 (en) * | 2019-11-27 | 2022-07-05 | Texas Instruments Incorporated | Lead frame for multi-chip modules with integrated surge protection |
| JP7779690B2 (ja) * | 2021-09-24 | 2025-12-03 | ローム株式会社 | 半導体装置、及び半導体モジュール |
| DE102021125489A1 (de) * | 2021-10-01 | 2023-04-06 | Tdk-Micronas Gmbh | Integriertes Zwei-Chip Schaltkreissystem in einem integrierten Schaltkreisgehäuse mit zwei separaten Versorgungsgebieten |
| DE102022200892A1 (de) | 2022-01-27 | 2023-07-27 | Robert Bosch Gesellschaft mit beschränkter Haftung | Spannungswandler und Spannungswandlermodul |
| JP2025075696A (ja) * | 2023-10-31 | 2025-05-15 | 新電元工業株式会社 | 半導体モジュール |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4705917A (en) * | 1985-08-27 | 1987-11-10 | Hughes Aircraft Company | Microelectronic package |
| US5089878A (en) * | 1989-06-09 | 1992-02-18 | Lee Jaesup N | Low impedance packaging |
| JP3137749B2 (ja) * | 1992-06-30 | 2001-02-26 | 株式会社日立製作所 | 半導体集積回路装置 |
| US5457340A (en) * | 1992-12-07 | 1995-10-10 | Integrated Device Technology, Inc. | Leadframe with power and ground planes |
| JPH06283650A (ja) * | 1993-03-26 | 1994-10-07 | Ibiden Co Ltd | 半導体装置 |
| US5343074A (en) * | 1993-10-04 | 1994-08-30 | Motorola, Inc. | Semiconductor device having voltage distribution ring(s) and method for making the same |
| US6462404B1 (en) * | 1997-02-28 | 2002-10-08 | Micron Technology, Inc. | Multilevel leadframe for a packaged integrated circuit |
| US6476486B1 (en) * | 1997-10-30 | 2002-11-05 | Agilent Technologies, Inc. | Ball grid array package with supplemental electronic component |
| TW488054B (en) * | 2001-06-22 | 2002-05-21 | Advanced Semiconductor Eng | Semiconductor package for integrating surface mount devices |
| JP4010792B2 (ja) * | 2001-10-19 | 2007-11-21 | 株式会社ルネサステクノロジ | 半導体装置 |
| US6903448B1 (en) * | 2002-11-12 | 2005-06-07 | Marvell International Ltd. | High performance leadframe in electronic package |
| US7002249B2 (en) * | 2002-11-12 | 2006-02-21 | Primarion, Inc. | Microelectronic component with reduced parasitic inductance and method of fabricating |
| US7253506B2 (en) * | 2003-06-23 | 2007-08-07 | Power-One, Inc. | Micro lead frame package |
-
2004
- 2004-06-01 JP JP2004162854A patent/JP2005347369A/ja active Pending
-
2005
- 2005-05-31 US US11/140,394 patent/US20050263863A1/en not_active Abandoned
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007173712A (ja) * | 2005-12-26 | 2007-07-05 | Hitachi Metals Ltd | Dc−dcコンバータ |
| JP2020113656A (ja) * | 2019-01-11 | 2020-07-27 | 株式会社デンソー | 電子装置およびその製造方法 |
| JP7172617B2 (ja) | 2019-01-11 | 2022-11-16 | 株式会社デンソー | 電子装置およびその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20050263863A1 (en) | 2005-12-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101086751B1 (ko) | 반도체 장치 및 전원 시스템 | |
| US8153473B2 (en) | Module having a stacked passive element and method of forming the same | |
| TWI385778B (zh) | 具有堆疊分立電感器結構的半導體功率裝置 | |
| US9054086B2 (en) | Module having a stacked passive element and method of forming the same | |
| US7482699B2 (en) | Semiconductor device | |
| JP2005347369A (ja) | 半導体装置およびその製造方法 | |
| CN101677096B (zh) | 半导体器件 | |
| US8148815B2 (en) | Stacked field effect transistor configurations | |
| US8362626B2 (en) | Semiconductor device with non-overlapped circuits | |
| US20250316416A1 (en) | Molded inductor with magnetic core having mold flow enhancing channels | |
| US9029995B2 (en) | Semiconductor device and method of manufacturing the same | |
| US5907184A (en) | Integrated circuit package electrical enhancement | |
| US20110291254A1 (en) | Semiconductor device package featuring encapsulated leadframe with projecting bumps or balls | |
| JP2007227416A (ja) | 半導体装置の製造方法および半導体装置 | |
| US20090189266A1 (en) | Semiconductor package with stacked dice for a buck converter | |
| CN207217523U (zh) | 复合电子部件、电路模块以及dcdc转换器模块 | |
| JP2010219244A (ja) | 半導体装置及び半導体装置製造方法 | |
| JP4885635B2 (ja) | 半導体装置 | |
| US5763945A (en) | Integrated circuit package electrical enhancement with improved lead frame design | |
| JP2008251901A (ja) | 複合半導体装置 | |
| JP2010098256A (ja) | 半導体装置及び半導体装置製造方法 | |
| JP2012216858A (ja) | 半導体装置の製造方法および半導体装置 | |
| CN113474860A (zh) | 具有用于降低的emi的集成屏蔽拓扑结构的隔离变压器 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070525 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20070525 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20090914 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090924 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20100202 |