JP2005323941A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a game machine provided with a random number circuit for asynchronously outputting random numbers for a plurality of variable display areas. <P>SOLUTION: This game machine executes a special pattern game respectively in two game parts, and the random number circuit for generating a big winning random number is provided with one counter 203 and circuits 201 and 202 for updating the count value of the counter 203. A processor 103 for game control discriminates the presence/absence of only one of a start winning signal SSA from a first normal variable winning ball device 4A and a start winning signal SSB from a second normal variable winning ball device 4B in the interruption processing of one time, and at the time of discriminating that it is "present", fetches a numerical value outputted by the counter 203 as a random number value for a start signal, and stores it in a corresponding special pattern holding storage part 102A or 102B. Thus, even in the case of simultaneous entries to the first and second normal variable winning ball devices 4A and 4B, different values can be fetched as the random number value. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a gaming machine such as a pachinko gaming machine, and more specifically, a first variable display means for variably displaying a plurality of types of identification information that can be identified based on the first start condition being satisfied, A second variable display means for variably displaying a plurality of types of identification information that can each be identified based on the establishment of a second start condition different from the first start condition, and the identification information by the first variable display means When the display result of the variable display is a combination of predetermined specific identification information, or when the display result of the variable display of the identification information by the second variable display means is the combination of the specific identification information In particular, the present invention relates to a gaming machine that controls a specific gaming state that is advantageous to the player.

  In gaming machines such as pachinko machines, variable display is performed by updating or scrolling predetermined identification information (hereinafter referred to as display symbols) on a display device such as a liquid crystal display (hereinafter referred to as LCD). There are a number of games that are enhanced by a so-called variable display game that determines whether to give a predetermined game value based on the display result.

  The special game played as one of the variable display games is a variable display of the display symbol based on the detection of the game ball passing through the start winning opening (that the variable display start condition is satisfied). In this game, the case where the stop symbol form when the display is completely stopped is a predetermined specific display form is determined as “big hit”. In this special figure game, when a “hit” is made, a special electric accessory called a big prize opening or an attacker is opened, and a state in which a game ball can be won extremely easily is provided to a player for a certain period of time. . Such a state is referred to as a “specific game state” or a “hit game state”.

  The selection and determination of the display pattern variable display mode is based on the detection of a game ball that passes through the start winning opening and the random number value (mainly including a big hit random number and other random numbers for determining a figure stop symbol). Based on the extracted random number value, it is determined by determining whether or not to make a jackpot gaming state, a variation mode, and the like. As an example of a random number circuit for enabling such processing, Patent Document 1 discloses a configuration in which a counter is updated by a clock signal and a count value is acquired based on a predetermined timing signal. .

Also, some pachinko gaming machines have a plurality of start winning openings and a variable display unit corresponding to each starting winning opening, and one clock count circuit and two pieces are provided so as to correspond to this type of gaming machine. Patent Document 2 discloses a circuit including a count value storage circuit and two latch signal output circuits.
JP 7-124296 A JP 2003-190483 A

When the random number circuit disclosed in Patent Document 1 is simply used in a pachinko gaming machine having a configuration having a plurality of start winning openings and a variable display unit corresponding to each starting winning opening, Depending on the winning timing, there is a possibility that the count value of the counter being updated is acquired or the same count value (random number value) is acquired for a plurality of variable display units.
Further, in the configuration of the random number circuit disclosed in Patent Document 2, since the output value of the common clock count circuit is latched by the two count value storage circuits, the same value may be obtained depending on the timing of winning to a plurality of start winning ports. There is a risk that the jackpot will be synchronized or the display will be synchronized.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a gaming machine including a random number circuit capable of asynchronously outputting a plurality of random numbers for variable display areas.
Another aspect of the present invention provides a gaming machine including a random number circuit capable of making a random number update timing and a latch (memory) timing different from each other in a plurality of random display circuits for variable display areas. Objective.

In order to achieve the above object, a gaming machine according to claim 1 of the present application,
After the first start condition is satisfied (for example, winning to the first ordinary variable winning ball apparatus 5A), the first start condition is satisfied (for example, previous winning to the first ordinary variable winning ball apparatus 5A). The first variable display means (for example, the first variable display device 4A) that variably displays a plurality of types of identification information that can be identified, and the first variable display device 4A). The second start condition is satisfied after the second start condition different from the start condition is satisfied (for example, winning in the second ordinary variable winning ball apparatus 5B) (for example, the second ordinary variable winning ball apparatus 5B). A second variable display means (for example, a second variable display device 4B) that variably displays a plurality of types of identification information that can each be identified based on the fact that the special figure game is completed based on the previous winning) Identification information by the first variable display means When the display result of the variable display is a predetermined combination of specific identification information (for example, the same symbol of the same pattern), or the display result of the variable display of the identification information by the second variable display means is A gaming machine that controls a specific gaming state (for example, a big hit state) advantageous for a player when the combination of the specific identification information (for example, the same symbol's gaze) is obtained,
Numeric data updating means (for example, random number circuit 104) that updates numeric data at a predetermined cycle and outputs it as a random value;
Game control means (for example, CPU 103) for controlling the progress of the game (for example, special figure game) using the variable display of the first and second variable display means based on the random number value output by the numerical data updating means. And comprising
The game control means includes
An interruption process is periodically executed at a period equal to or longer than the update period of the numerical data of the numerical data update means,
In the interrupt processing, a first start signal (for example, a start winning signal SSA) input based on the first start condition being satisfied or an input based on the second start condition being satisfied. Input determination means (for example, a portion for executing the determination process of step S100 of the CPU 103) for determining whether or not a second start signal (for example, a start winning signal SSB) is input;
Storage means (for example, the first and second latch circuits 103A, 103B, and the like) that stores the random number value output from the numerical data update means when it is determined that the input is determined by the input determination means. First and second special figure reservation memories 102A, 102B),
When the first start condition is established, the random number value stored in the storage means based on the establishment of the first start condition that triggers the establishment of the first start condition is a predetermined determination value data. By determining whether or not they match, it is determined whether or not the display result in the variable display by the first variable display means is the specific display result, and when the second start condition is satisfied, By determining whether or not the random number value stored in the storage means matches predetermined determination value data based on the establishment of the second start condition that triggered the second start condition, Display result determining means (for example, a part for executing the jackpot determination process (FIG. 9) of the CPU 103) for determining whether or not the display result in the variable display by the variable display means is the specific display result,
The input determining means determines only one of the first start signal and the second start signal in one interrupt process (for example, in step S100, the i th prize-winning switch is switched). Only on / off)
A gaming machine characterized by that.

In order to achieve the above object, a gaming machine according to claim 2 of the present application,
After the first start condition is satisfied (for example, winning to the first ordinary variable winning ball apparatus 5A), the first start condition is satisfied (for example, previous winning to the first ordinary variable winning ball apparatus 5A). The first variable display means (for example, the first variable display device 4A) that variably displays a plurality of types of identification information that can be identified, and the first variable display device 4A). Plural types that can be identified based on the fact that the second start condition is satisfied after the second start condition different from the start condition is satisfied (for example, winning in the second ordinary variable winning ball apparatus 5B). Second variable display means (for example, the second variable display device 4B) for variably displaying the identification information of
When the display result of the variable display of the identification information by the first variable display means is a predetermined combination of specific identification information (for example, the same pattern), or the second variable display A gaming machine that controls to a specific gaming state advantageous to a player when the display result of the variable display of identification information by the means is a combination of the specific identification information (for example, the same symbol) ,
Numeric data updating means (for example, random number circuit 104) that updates numeric data at a predetermined cycle and outputs it as a random value;
Game control means (e.g., CPU 103) for controlling the progress of the game using the variable display of the first and second variable display means based on the random number value output by the numerical data update random number generation means,
The game control means includes
An interruption process is periodically executed at a period equal to or longer than the update period of the numerical data of the numerical data update means,
In the interrupt processing, based on the first start signal (for example, the start winning signal SSA) input based on the establishment of the first start condition, or on the fact that the second start condition is established. Input determination means (for example, a portion of the CPU 103 that performs the determination process of step S100) for determining whether or not a second start signal (for example, a start winning signal SSB) is input;
A latch signal output means (a portion for outputting a latch signal of the CPU 103) for fetching a random number value output by the numerical data update means when it is determined by the input determination means;
Storage means (for example, latch circuit 204) for storing a random number value output from the numerical data update means means in response to a latch signal from the latch signal output means,
The game control means includes
When the first start condition is established, the random number value stored in the storage means based on the establishment of the first start condition that triggers the establishment of the first start condition is a predetermined determination value data. By determining whether or not they match, it is determined whether or not the display result in the variable display by the first variable display means is the specific display result, and when the second start condition is satisfied, The second variable is determined by determining whether or not the random number value stored in the storage means matches predetermined determination value data based on the establishment of the second start condition triggered by the second start condition. Display result determination means (for example, a portion of the CPU 103 that executes the jackpot determination process (FIG. 9)) for determining whether or not the display result in the variable display on the display means is the specific display result,
The input determining means determines only one of the first start signal and the second start signal in one interrupt process (for example, in step S100, the i th prize-winning switch is switched). Only on / off)
It is characterized by that.

  In the gaming machine according to claim 3, the game control means outputs an output control signal (for example, a read control signal SRC) to the storage means before reading the random number value from the storage circuit. After controlling the storage control means to the readable state and reading the random number value, the output of the output control signal is stopped to control the storage means to the unreadable state (for example, the read control signal of the CPU 103) A portion for outputting SRC).

  Further, in the gaming machine according to claim 4, when the latch signal is input from the latch signal output unit, the storage unit receives an output control signal that controls the output control signal to be in an unreceivable state. Control means (for example, blocks 301 to 303 in FIG. 12) is included.

  In addition, in the gaming machine according to claim 5, when the output control signal is inputted from the latch signal output means, the storage means controls the latch signal reception control to control the latch signal to be in an unreceivable state. Means (for example, blocks 301 to 304 in FIG. 12).

Further, in the gaming machine according to claim 6, the numerical data update means has a reference clock output means for generating a reference clock signal (for example, a reference clock signal generation circuit 201) and a period based on the reference clock signal. Clock signal generation means (for example, count clock signal generation circuit 202) for generating a plurality of signals having the same and different phases,
The clock signal generating means includes a clock terminal (for example, clock terminal Clk) to which the reference clock signal is input from the reference clock signal output means, and an input terminal (for example, input terminal D) to which a first signal is input. And a first output terminal (for example, an output terminal) that outputs a signal in which a change state of the first signal is synchronized with a timing of changing the reference clock signal input from the clock terminal for each predetermined period. Q) and a second output terminal (for example, output terminal Q bar) that outputs a signal having the same period and a different phase from the signal output from the first output terminal,
The clock signal generation means connects the second output terminal and the input terminal to thereby connect a first clock signal (for example, signal S1) output from the first output terminal and the second output terminal. A second clock signal (e.g., signal S2) that is output from the output terminal and has the same period and a different phase from the first clock signal,
The numerical data updating means (for example, the counter 203) updates the numerical data at the first timing when the first clock signal generated by the clock signal generating means changes, and is generated by the clock signal generating means. Output the second clock signal as an interrupt signal (eg, signal SI) to the game control means,
The game control means executes the interrupt process according to the interrupt signal.
It is characterized by that.

  According to the invention described in claim 1 of the present application, it is possible to extract random numbers for a plurality of variable display means by using one numerical data update means, and the circuit efficiency is good. Further, since only one random number value data is fetched in one interrupt process, there is no possibility that one numeric data is fetched in common for a plurality of variable display devices.

  According to the gaming apparatus of the second aspect, it is possible to extract random numbers for a plurality of variable display means by using one numerical data updating means, and the circuit efficiency is good. Further, since only one random number value data is fetched in one interrupt process, there is no possibility that one numeric data is fetched in common for a plurality of variable display devices.

  According to the configuration of the third aspect, since the first or second random value storage means can be set in a readable state only when the random number value is read, acquisition of the random number value can be performed reliably and stably. It can be carried out.

  According to the configuration of claim 4, when the random number value stored in the random value storage unit is updated, the display result determination unit prevents the random number value from being read from the random value storage unit. Therefore, the random number value can be updated reliably and stably.

  According to the configuration of claim 5, the random number generation unit stores the random number value stored in the random value storage unit when the display result determination unit reads the random value from the random number storage unit. Therefore, it is possible to reliably and stably acquire a random value.

  According to the gaming apparatus of the sixth aspect, the timing for updating the numerical data and the timing for executing the interrupt process can be shifted, and a stable random value can be taken in reliably.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The gaming machine in the present embodiment is a gaming machine that performs a special game with a display device such as an LCD, and a card reader (CR: Card) that lends a ball with a prepaid card.
Reader) pachinko machines.

  FIG. 1 is a front view of a pachinko gaming machine 1 according to the present embodiment, and shows an arrangement layout of main members. The pachinko gaming machine (gaming machine) 1 is roughly composed of a gaming board (gauge board) 2 constituting a gaming board surface and a gaming machine frame (base frame) 3 for supporting and fixing the gaming board 2. The game board 2 is formed with a substantially circular game area surrounded by guide rails. A first variable display device 4A and a second variable display device 4B that variably display special symbols as identification information that can be individually identified are provided at approximately the center position of the game area. The first and second variable display devices 4A and 4B are made of, for example, an LCD. Below the first and second variable display devices 4A and 4B, a first ordinary variable winning ball device (starting winning port) 5A and a second ordinary variable winning ball device (starting winning port) 5B are arranged, respectively. ing. Further, below the first and second ordinary variable winning ball devices 5A and 5B, a first special variable winning ball device (large winning port) 6A and a second special variable winning ball device (large winning port) 6B, respectively. And are provided.

  In the variable display game (special game) in which the start condition (first start condition) is established based on the fact that the game ball has won the first ordinary variable winning ball apparatus 5A, The special symbols, which are composed of pictures and the like and function as plural types of identification information that can be identified, are variably displayed on a variable display section as a plurality of display areas.

  In the variable display game (special game) in which the start condition (second start condition) is established based on the winning of the game ball in the second ordinary variable winning ball apparatus 5B, the second variable display device 4B The special symbols, which are composed of pictures and the like and function as plural types of identification information that can be identified, are variably displayed on a variable display section as a plurality of display areas.

  In a special game played by the first and second variable display devices 4A and 4B, after a specific time has elapsed after starting the variable display of special symbols, the variable display results of the special symbols on each variable display unit are displayed in a predetermined order. Is used to derive and display, and the confirmed symbol (final stop symbol) is stopped and displayed. At this time, if a specific combination of special symbols (a jackpot combination) is derived and displayed as a combination of fixed symbols (stop symbol form) in the special symbol game by the first variable display device 4A, the first special variable winning ball device 6A is displayed. A specific gaming state (big hit gaming state) is achieved by opening and closing the. In the jackpot gaming state based on the winning combination combination being derived and displayed in the special figure game by the first variable display device 4A, the opening / closing plate of the first special variable winning ball device 6A has a predetermined period (for example, 29 seconds) or a predetermined number. The game ball is opened in a period until (for example, 10) winning balls are generated. While the ball is being opened, the game ball falling on the surface of the game board 2 is received and then closed. The opening / closing cycle can be repeated up to a predetermined upper limit number of times (for example, 16 times).

  On the other hand, if the big hit combination is derived and displayed as the combination of the fixed symbols in the special figure game by the second variable display device 4B, the specific game state (big hit game state) is achieved by opening and closing the second special variable winning ball device 6B. . In the jackpot gaming state based on the winning combination combination derived and displayed in the special game by the second variable display device 4B, the opening / closing plate of the second special variable winning ball device 6B has a predetermined period (for example, 29 seconds) or a predetermined number. The game ball is opened in a period until (for example, 10) winning balls are generated, and the game ball that falls on the surface of the game board 2 is received while being opened, and then closed. The opening / closing cycle can be repeated up to a predetermined upper limit number of times (for example, 16 times).

  As described above, in the first variable display device 4A and the second variable display device 4B, the special game is started on the basis that different starting conditions are satisfied. When the big win combination is derived and displayed as the combination of the determined symbols in the first variable display device 4A, the big special game state is controlled by opening and closing the first special variable winning ball device 6A. On the other hand, when the big hit combination is derived and displayed as the combination of the fixed symbols in the second variable display device 4B, the big special game state is controlled by opening and closing the second special variable winning ball device 6B. Note that the opening / closing operation modes of the first and second special variable winning ball devices 6A and 6B in the big hit gaming state may be set to be different from each other. For example, the first special variable winning ball apparatus 6A can repeat the opening / closing cycle of opening and closing the opening / closing plate up to 30 times in the period until 9 seconds or 5 winning balls are generated in the big hit gaming state. On the other hand, the second special variable winning ball device 6B can repeat the opening / closing cycle of opening and closing the opening / closing plate up to 5 times in the period until 49 seconds or 20 winning balls are generated in the big hit gaming state. Also good.

  In this embodiment, three variable display portions of left, middle, and right are provided as display areas in the first and second variable display devices 4A and 4B, respectively. ”To“ 9 ”can be variably displayed as 10 special symbols. Each symbol is arranged with a symbol number of “0” to “9”. When variable symbol special display is started, switching display and scroll display are performed in the order of symbol number, and symbol numbers are displayed. When the special symbol “9” or “0” is displayed, the special symbol whose symbol number is “0” or “9” is displayed. In the special game with each of the first and second variable display devices 4A and 4B, after the variable display of the special symbol is started, for example, the same special symbol or predetermined value is set in each of the left, middle and right variable display units. The first variable display in which the final symbol combination of the big hit combination is stopped and displayed when the final symbol combination that is a big hit combination is stopped and displayed, such as the combination of the special symbols received is stopped and displayed as the final display result. Corresponding to the device 4A or the second variable display device 4B, the pachinko gaming machine 1 becomes a big hit gaming state by opening and closing the first special variable winning ball device 6A or the second special variable winning ball device 6B.

  The first and second ordinary variable winning ball devices 5A, 5B have a tulip shape having a pair of movable wing pieces that are movable and controlled between a vertical (normally open) position and a tilt (enlarged open) position by a solenoid (not shown). Each accessory (ordinary electric accessory) is provided. Each of the first and second ordinary variable winning ball devices 5A and 5B is provided with a start winning port switch, and a game ball winning for one of the first and second ordinary variable winning ball devices 5A and 5B is started. One of the first and second start conditions is met in response to the detection by the winning opening switch.

  The first and second special variable winning ball apparatuses 6A and 6B are each provided with an opening / closing plate that opens and closes a winning area by a solenoid (not shown). The opening / closing plate is in a closed state at a normal time, for example, before the big hit gaming state is generated after the pachinko gaming machine 1 is turned on. On the other hand, when a big hit gaming state is reached based on the result of the special game by the first variable display device 4A or the second variable display device 4B, a solenoid is used to generate a predetermined period or a predetermined number of winning balls in the winning area. It will be closed after opening in the period. When a game ball is won in the winning area when the first and second special variable winning ball devices 6A and 6B are opened, the game ball is detected by a predetermined large winning opening switch. Based on this, a predetermined number of prize balls are paid out.

  In addition to the above configuration, the surface of the game board 2 is provided with a windmill with a built-in lamp, an outlet, a normal symbol display, and the like. Speakers 8L and 8R for reproducing and outputting sound effects and the like are provided at the left and right upper positions of the gaming machine frame 3, and a game effect lamp 9 is provided at the periphery of the game area.

The pachinko gaming machine 1 is mounted with a main board 11 and a display control board 12 as shown in FIG.
The main board 11 has start winning opening switches arranged in the first and second ordinary variable winning ball apparatuses 5A and 5B, and large winning opening switches provided in the first and second special variable winning ball apparatuses 6A and 6B. Also, wiring from each winning opening switch 70 including a switch for detecting a winning of a game ball to the winning opening and the like is also connected.

  The main board 11 is a main-side control board on which various circuits for controlling the progress of the game in the pachinko gaming machine 1 are mounted. The main board 11 mainly has a function for setting random numbers used in a special game, a function for inputting a signal from a switch or the like arranged at a predetermined position, and a sub-side control comprising a display control board 12 and a payout control board. Each board has a function of outputting and transmitting a control command as an example of command information as a control signal, and a function of outputting various types of information to a hall management computer.

  As the display control commands transmitted from the main board 11 to the display control board 12, for example, first and second variable display start commands corresponding to the first and second variable display devices 4A and 4B, First and second special symbol designation commands, first and second special symbol confirmation commands, and the like are prepared.

  The first and second variable display start commands are commands for instructing to start variable display of special symbols in the first and second variable display devices 4A and 4B. The variable display device 4A is instructed to start variable display of the special symbol, and the second variable display start command is instructed to start variable symbol display of the special symbol in the second variable display device 4B. On the display control board 12 side, in response to the first and second variable display start commands, the total variable display time of the special symbol, the determination result of whether or not the display result of the variable display is a big hit, and reach. The determination result of whether or not is specified.

  Here, the reach is a display mode in which variable display is performed for a symbol that has not yet been derived and displayed (referred to as a reach variation symbol) when the symbol that has been derived and displayed constitutes a part of the jackpot combination, or This is a display mode in which all or some of the symbols are synchronously variably displayed while constituting all or part of the jackpot symbol. Specifically, on a combination effective line that has not been stopped and displayed when a special symbol constituting a predetermined jackpot combination is stopped and displayed on some variable display portions on a predetermined combination effective line. The display mode in which variable display is performed in the variable display section (for example, the left, middle and right variable display sections provided in the display area are part of the jackpot symbol in the left and middle variable display sections. (For example, “7”) is displayed in a stopped state and the variable display portion on the right is still in a variable display state), or all or some of the special symbols on the variable display portion on the active line are displayed. A display mode in which variable display is performed synchronously while constituting all or part of the jackpot symbol (for example, in which state the variable display is performed on all of the left, middle, and right variable display portions provided in the display area. Even if is displayed, the same special symbol Tsu variable display in it have aspect is a display mode) that have been made.

  The first and second special symbol designation commands correspond to the first and second variable display devices 4A and 4B, respectively. This is a command for designating a special symbol as a fixed symbol that is derived and displayed in the middle variable display section and becomes a variable display result in a special game. The first and second special symbol confirmation commands are commands for instructing the end of variable symbol special display corresponding to each of the first and second variable display devices 4A and 4B.

The main board 11 includes, for example, a game control microcomputer 100, a switch circuit 107, and the like. The game control microcomputer 100 is, for example, a one-chip microcomputer, and a ROM (Read
Only Memory (101), RAM (Random Access Memory) 102 used as work memory, and CPU (Central
A random number circuit 104 and an I / O (Input / Output) port 105 that generate random numbers independently of the processing unit 103 and the CPU 103 are included. The switch circuit 107 takes in the detection signal from each winning opening switch 70 and transmits it to the game control microcomputer 100.

The random number circuit 104 counts numerical data serving as a jackpot determination random number.
A random number generated by the random number circuit 104 is taken as a jackpot determination random number, and is a random number used to determine whether or not the pachinko gaming machine 1 is in the jackpot gaming state, and ranges from “0” to “65535”. Takes the value of
A specific configuration of the random number circuit 104 will be described later with reference to FIG.

  Note that random numbers other than the jackpot determination random number, for example, a definite symbol determination random number, a reach determination random number, a variable display pattern determination random number, and the like are generated by executing a random number program stored in the ROM 101. Here, the fixed symbol determining random number is a display random number used for determining the fixed symbol of the special symbol in the special symbol game. The reach determination random number indicates whether to determine and display the final symbol of the losing without reaching, if the final symbol is not a jackpot combination in the special game. This is a display random number used for determination. The random number for variable display pattern determination is a random number for display used to determine the variable display pattern used in the special figure game and to define the variable display mode and other effects of the special symbol in the special figure game. is there. In addition, in order to improve a game effect, random numbers other than the above may be used.

  In addition to the game control program, the ROM 101 stores various data tables used for controlling the progress of the game. For example, the ROM 101 stores a plurality of determination tables and determination tables prepared for the CPU 103 to perform various determinations and determinations. This determination table includes a jackpot determination table that is referred to in order to determine whether or not the determined symbol is a jackpot combination in the special figure game. In addition, the determination table includes a variable display pattern determination table for determining a variable display pattern used in the special game by each of the first and second variable display devices 4A and 4B.

  In the RAM 102, a game ball is won in one of the first and second ordinary variable winning ball devices 5A and 5B, and the special game by either the first or second variable display device 4A or 4B is executed. 1st and 2nd variable display of the hold information of the special figure game in which the condition for starting the variable display is not satisfied because the condition is satisfied but the previous special figure game is being executed First and second special figure storage units (shown in FIG. 3) 102A and 102B for storing corresponding to each of the devices 4A and 4B are provided. For example, the first special figure reservation memory unit 102A is associated with the first ordinary variable winning ball device 5A, and the second special figure reservation memory unit 102B is associated with the second ordinary variable winning ball device 5B. In the order of winning to the attached ordinary variable winning ball devices 5A and 5B, the storage number is a predetermined upper limit value (for example, “4”, for example, the hold number and the numerical data indicating the value of the jackpot determination random number extracted by the winning). ”) Until it is reached.

  In addition to this, the RAM 102 is set with a plurality of types of flags that are set or cleared according to the gaming state in the pachinko gaming machine 1, the signal transmitted from each winning port switch 70 via the switch circuit 107, and the like. A game control flag setting area, a game control timer setting area for storing data indicating a plurality of types of timer values used for game control in the pachinko gaming machine 1, and the like may be provided. Note that the circuit used for flag setting and timer may be constituted by a register circuit provided separately from the RAM 102.

  In the game control flag setting area, for example, a special symbol process flag (first and second special symbol process flag) and a big hit flag (first and second variable display devices 4A and 4B) corresponding to each of the first and second variable display devices 4A and 4B. 2nd big hit flag) etc. are provided. The first and second special symbol process flags should be selected and executed in the first and second special symbol process processes executed corresponding to the first and second variable display devices 4A and 4B, respectively. Instruct. The first and second big hit flags are determined that the variable display result in the special figure game is a big hit when the special figure game is started by each of the first and second variable display devices 4A and 4B. And set to the ON state. On the other hand, when the big hit gaming state ends, the big hit flag is cleared and turned off.

  In the game control timer setting area, for example, a function as a variable display time timer (first and second variable display time timer) corresponding to each of the first and second variable display devices 4A and 4B is realized. An area for storing data indicating the timer value is provided. The first and second variable display time timers measure on the main side the variable display time of the special symbol, which is the execution time of the special figure game by the corresponding one of the first and second variable display devices 4A and 4B, respectively. It is a down counter used for The first variable display time timer is determined according to the variable display pattern in the special game of the first variable display device 4A when the first variable display start command is sent from the main board 11 to the display control board 12. A timer initial value corresponding to the total variable display time is set. The second variable display time timer is determined according to the variable display pattern in the special game of the second variable display device 4B when the second variable display start command is sent from the main board 11 to the display control board 12. A timer initial value corresponding to the total variable display time is set.

  The display control board 12 is a sub-side control board independent of the main board 11, and controls display operations and the like in the first and second variable display devices 4A and 4B. For example, the display control board 12 causes the first and second variable display devices 4A and 4B to perform switching display of images based on a display control command transmitted from the main board 11, thereby displaying a special symbol in the special figure game. Various display effects such as variable display and display of the number of rounds in the big hit gaming state are possible.

Next, details of the random number circuit 104 will be described with reference to FIG.
As shown in FIG. 3, the random number circuit 104 includes a reference clock signal generation circuit 201, a count clock signal generation circuit 202, and a counter 203.

  The reference clock signal generation circuit 201 is a circuit that includes a crystal resonator or the like and generates an operation clock for operating the entire system in synchronization. The CPU 103 receives an operation clock having a frequency f0, for example, 10 to 20 MHz. Supply.

  Further, the reference clock signal generation circuit 201 divides the operation clock f0 by an internal frequency dividing circuit to generate a reference clock signal S0 having a predetermined frequency, for example, 1 kHz as shown in FIG. Output.

The count clock signal generation circuit 202 is composed of a D-type flip-flop, the reference clock signal S0 is supplied to the clock terminal Clk, and the positive phase output Q shown in FIG. 4B is output to the counter 203 as the count clock signal S1. The negative phase output (Q bar) signal S2 shown in FIG. 4C is fed back to the D input terminal.
With such a configuration, the count clock signal generation circuit 202 divides the reference clock signal S0 by 1/2, and outputs the positive phase output Q shown in FIG. 4B to the counter 203 as the count clock signal S1, A negative phase output (Q bar) signal S2 shown in FIG. 4C is supplied to the CPU 103 as an interrupt signal SI.
As shown in FIGS. 4B and 4C, the count clock signal S1 and the interrupt signal SI are signals having the same frequency (500 Hz) and opposite phases.

  The counter 203 is composed of an up counter, and counts up the count value C from “0” to “65535” by 1 in response to the rising edge of the count clock signal S1, that is, every 2 m (1/500) seconds. Go. When the counter 203 counts up the count value C to “65535”, the counter 203 returns to “0” and counts up to “65535” again.

  FIG. 4 is a timing chart for explaining the operation of the random number generation circuit 104.

  As shown in FIG. 4A, the reference clock signal generation circuit 201 has a frequency of 1 kHz and rises from a low level to a high level at timings T11, T12,. The falling reference clock signal S 0 is output to the count clock signal generation circuit 202.

  As described above, the count clock signal generation circuit 202 substantially divides the reference clock signal S0 by 1/2 to obtain the 500 Hz count clock signal S1 as shown in FIGS. The signal is converted into a count clock signal S2 that is an inverted signal and output from the normal phase output terminal (Q) and the negative phase output terminal (Q bar).

  As shown in FIG. 4D, the counter 203 updates and outputs a count value (count value data) C in response to the rising edge of the count clock signal S1.

  In response to the interrupt signal SI, the CPU 103 executes a special symbol process, which will be described later, with an interrupt process at intervals of 2 milliseconds, but the first special game for the first special game using the first variable display device 4A. As shown in FIGS. 4E and 4F, the first process process and the second process process for the second special figure game using the second variable display device 4B are alternately performed.

  In the first special symbol process for the first special figure game using the first variable display device 4A executed at the timing shown in FIG. 4 (E), the CPU 103 uses the first start winning opening 5A. The presence / absence of the start winning signal SSA from the winning port switch 70A arranged in the position is determined. If there is the starting winning signal SSA, the value of the counter 203 is taken in as a random value and processing is performed.

  On the other hand, in the second special symbol process for the second special figure game using the second variable display device 4B executed at the timing shown in FIG. 4 (F), the CPU 103 performs the second start winning prize. The presence / absence of the start winning signal SSB from the winning port switch 70B arranged at the mouth 5B is determined. If there is the starting winning signal SSB, the value of the counter 203 is taken in as a random value and processing is performed.

  As shown in FIGS. 4D, 4E, and 4F, the first special symbol process and the second special symbol process are executed at the timing when the counter 203 counts different values. The Accordingly, if a game ball wins the first and second start winning holes 5A and 5B almost simultaneously, start winning signals SSA and SSB are output as shown in FIGS. 4 (G) and 4 (I). However, the timing for fetching the random number value from the counter 203 to the latch circuits 103a and 103b arranged at the input port of the CPU 103 is different as shown in FIGS. The value will be latched.

  Therefore, although one counter 203 is used, a situation in which the random number value for the first variable display device 4A and the random value for the second variable display device 4B are synchronized is prevented.

FIG. 5 is a block diagram illustrating a hardware configuration example of the display control board 12. The display control board 12 includes an oscillation circuit 110, a reset circuit 111, a CPU 112 for display control, a ROM 113, a RAM 114, and first and second VDP (Video
Display processors) 115A and 115B, first and second CGROMs 116A and 116B, and first and second VRAMs (Video RAMs) 117A and 117B. The first and second VDPs 115A and 115B, the first and second CGROMs 116A and 116B, and the first and second VRAMs 117A and 117B may be configured as one VDP, CGROM, and VRAM, respectively.

  The oscillation circuit 110 outputs a reference clock signal to the CPU 112, the first and second VDPs 115A and 115B, and the reset circuit 111 outputs a reset signal for resetting the CPU 112, the first and second VDPs 115A and 115B. It is. When the CPU 112 receives a display control command from the main board 11, the CPU 112 reads out control data for effect control from the ROM 113 while using the RAM 114 as a work area. Further, the CPU 112 sends a drawing command to the first and second VDPs 115A and 115B based on the read control data.

  The ROM 113 is a semiconductor memory that stores various control programs executed by the CPU 112, fixed parameters, and the like. The ROM 113 stores a plurality of types of variable display table data used for controlling the variable display mode of special symbols in the special symbol game by the first and second variable display devices 4A and 4B. For example, each variable display table data is configured to include a combination of a plurality of variable display time timer values and display control data, which are serially written in time series, and an end code. Corresponding to the elapsed time (or the remaining variable display time of the special symbol in the special game), the variable display speed, display position, and size of the special symbol in each of the first and second variable display devices 4A and 4B. The display color, the background image, the display period in the display state, and other information related to the effect display are set in advance.

  The plurality of display control data included in each variable display table data is configured as display control information including, for example, read control information for designating image data read positions in the first and second CGROMs 116A and 116B. Here, the reading position of the image data in the first and second CGROMs 116A and 116B is, for example, a storage address of the image data, a file name for storing the image data, or each stream when the image data is stream type moving image data. An assigned identification number or the like may be designated. The CPU 112 refers to the variable display table data stored in the ROM 113 to reproduce the image corresponding to the timer values in the first and second display control time timers provided in the display control timer setting area of the RAM 114. The period (playback position) can be determined, and the display mode of the image in each of the first and second variable display devices 4A and 4B is controlled by sending a drawing command to each of the first and second VDP 115. can do.

  The RAM 114 is a semiconductor memory used as a work area by the CPU 112. In the RAM 114, display control for setting a plurality of types of flags that are set or cleared according to the display state of each of the first and second variable display devices 4A and 4B, the display control command from the main board 11, and the like. Display control timer setting for storing data indicating a plurality of types of timer values for measuring various times used for controlling the display operation in each of the flag setting area and the first and second variable display devices 4A and 4B. An area or the like may be provided. Note that a circuit used for setting a flag or a timer may be constituted by a register circuit provided separately from the RAM 114.

  In the display control flag setting area, for example, display control process flags (first and second display control process flags) are provided corresponding to the first and second variable display devices 4A and 4B, respectively. Which of the first and second display control process flags should be selected and executed in the first and second display control process processes executed corresponding to the first and second variable display devices 4A and 4B, respectively. Instruct.

  In the display control timer setting area, for example, to realize a function as a display control time timer (first and second display control time timer) corresponding to each of the first and second variable display devices 4A and 4B. An area for storing data indicating the timer value is provided. The first and second display control time timers measure the variable display time of the special symbol which is the execution time of the special symbol game by the corresponding one of the first and second variable display devices 4A and 4B on the sub side. It is a down counter used for The first display control time timer is a timer corresponding to the total variable display time of the special symbol in the variable display pattern specified based on the content of the command when the first variable display start command is received from the main board 11. The initial value is set. The second display control time timer has a timer initial value corresponding to the total variable display time of the special symbol in the variable display pattern specified based on the content when the second variable display start command is received from the main board 11. Is set.

  The first and second VDPs 115A and 115B have a display control function and a high-speed drawing function for displaying images on the first and second variable display devices 4A and 4B, respectively, and images according to a drawing command from the CPU 112 Execute the process. The CPU 112 has a two-dimensional address space independent of the CPU 112, and the first and second VRAMs 117A and 117B are mapped thereto. For example, the first VDP 115A generates image data according to the data read from the first CGROM 116A and develops it on the first VRAM 117A. Then, R (red), G (green), B (blue) signals and a synchronization signal are output to the first variable display device 4A. On the other hand, the second VDP 115B generates image data according to the data read from the second CGROM 116B and develops it on the second VRAM 117B. Then, R, G, B signals and a synchronization signal are output to the second variable display device 4B.

  Each of the first and second CGROMs 116A and 116B is for storing various image data for displaying an image on each of the first and second variable display devices 4A and 4B. For example, in the first CGROM 116A, character image data that is frequently used among those displayed on the first variable display device 4A, specifically, a person, an animal, a character, a figure, a symbol, or the like is stored in advance. On the other hand, in the second CGROM 116B, character image data that is frequently used among the images displayed on the second variable display device 4B is stored in advance. The first VRAM 117A is a frame buffer memory for expanding the image data generated by the first VDP 115A. The second VRAM 117B is a frame buffer memory for expanding the image data generated by the second VDP 115B.

  Next, the operation (action) of the pachinko gaming machine 1 in this embodiment will be described. In the main board 11, when the power supply voltage is supplied, the game control microcomputer 100 is activated and the CPU 103 executes a predetermined game control main process. In this game control main process, the operation of each part of the pachinko gaming machine 1 is initialized and predetermined initial settings are performed. By executing such a game control main process, the CPU 103 is set to generate a timer interrupt periodically (for example, every 2 milliseconds).

Thereafter, in response to the timer interrupt, as shown in FIG. 6, the CPU 103 performs general processing (step S10), update processing of the pointer i for switching between the special figure A and the special figure B (step S11), I-th special symbol process (step S12) designated by the pointer i, i-th normal symbol process (step S13), command control process (step S14), information output process (step S15), solenoid output process (step S16) The prize ball processing (step S17) is sequentially executed.
In the general process of step S10, a general process related to game control is executed.

  In the process of updating the pointer i in step S11, 1 is added to the pointer i. However, when the addition result is 2, it is set to 0. Therefore, the pointer i becomes 0, 1, 0, 1, 0,. . . And updated every 2 milliseconds.

  In the i-th special symbol process in step S12, the value of the i-th special symbol process flag provided in the game control flag setting area is updated according to the gaming state according to the value of the pointer i, and the i-th variable display device 4A or 4B (4A when i = 0, 4B when i = 1), i-th special variable winning ball device 6A or 6B (6A when i = 0, 6B when i = 1) Various processes are selected and executed in order to set the opening / closing operation and the like in a predetermined procedure.

  In step S13, the i-th normal symbol process is performed in the game area corresponding to the i-th normal variable winning ball apparatus 5A or 5B (5A when i = 0, 5B when i = 1). Control the display operation (for example, lighting and extinction of 7-segment LED and lamp) in the i normal symbol display, and the variable display of the i th normal symbol (for example, lighting / blinking display) and the i th normal variable winning ball apparatus It is possible to set the tilt control of the movable blade piece in 5A or 5B.

In the command control process of step S14, a control command is transmitted from the main board 11 to a sub-side control board such as the display control board 12, and operation control in accordance with the gaming state is instructed.
Further, the contents of the storage area for various output data are output to each output port included in the I / O port 105 by the information output process in step S15. In this information output process, a command for outputting jackpot information, start-up information, probability variation information, etc. to the hall management computer is also transmitted from the main board 11 to a predetermined information terminal board.

In the solenoid output processing in step S16, when the predetermined condition is satisfied, the tilt control of the movable blade piece in the i-th normal variable winning ball device 5A or 5B or the opening / closing control of the opening / closing plate in the i-th special variable winning ball device 6A or 6B. I do.
Further, in the prize ball processing in step S17, the number of prize balls is set based on the detection signal input from the i-th prize opening switch 70A or 70B (70A when i = 0, 70B when i = 1). The payout control command can be output to a predetermined payout control board.

FIG. 7 is a flowchart showing details of the i-th special symbol process executed in step S12.
In the i-th special symbol process shown in FIG. 7, the CPU 103 first sets the i-th ordinary display provided corresponding to the i-th variable display device 4A or 4B (4A when i = 0, 4B when i = 1). Whether or not a game ball has won in the variable winning ball apparatus 5A or 5B (5A when i = 0, 5B when i = 1) is provided in the i-th ordinary variable winning ball apparatus 5A or 5B, for example. This is determined by checking the detection signal from the start winning port switch included in the winning port switch 70A or 70B (70A when i = 0, 70B when i = 1) (step S100).

  When the game ball wins the i-th ordinary variable winning ball device 5A or 5B and the detection signal SSA or SSB from the i-th start winning port switch 70A or 70B is turned on (step S100; Yes), A winning process is executed (step S101). On the other hand, when the game ball has not won (Step S100; No), the winning process is skipped.

  In the winning process of step S101, as shown in FIG. 8, the number of reserved storage in the i-th special figure storage unit 102A or 102B provided in the RAM 102 corresponding to the first variable display device 4A is an upper limit value (for example, “ 4 ") or more (step S121). At this time, if the value of the random number for jackpot determination corresponding to the upper limit value of the hold number is stored in the i-th special figure hold storage unit 102A or 102B (step S121; Yes), the hold memory number is equal to or higher than the upper limit value. It is determined that If the number of reserved memories is equal to or greater than the upper limit value, the start of the special figure game by the current winning is invalid and nothing is performed. On the other hand, when the reserved storage number is less than the upper limit value (step S121; No), the i-th latch circuit SLA or SLB is sent to the i-th latch circuit 103a or 103b to store the count value of the counter 203 ( Step S122).

  Subsequently, the CPU 103 sets the random number value latched in one of the latch circuits at the head of the empty entry in the i-th special figure storage unit 102A or 102B (step S123).

  That is, as described with reference to FIG. 4, in the random number circuit 104, the count clock signal generation circuit 202 generates the count clock signal S1 based on the reference clock signal S0, and responds to the count clock signal S1. The counter 203 sequentially updates the count value.

  In the game control interruption process in which the value of the pointer i is 0, the CPU 103 determines whether or not the start winning signal SSA from the start winning port switch 70A of the first ordinary variable winning ball apparatus 5A is ON. If so, the CPU 103 determines whether or not the number of reserved storage in the first special figure reservation storage unit 102A provided in the RAM 102 is less than an upper limit value (for example, “4”). The latch signal SLA is output to cause the first latch circuit 103a to latch the count value of the counter 203, and this is set as a jackpot random value at the end of the first special figure reservation storage unit 102A.

  Further, in the game control interrupt process where the value of the pointer i is 1, the CPU 103 determines whether or not the start winning signal SSB from the start winning port switch 70B of the second ordinary variable winning ball apparatus 5B is ON. If it is ON, the CPU 103 determines whether or not the number of reserved memories in the second special figure reservation storage unit 102B provided in the RAM 102 is less than an upper limit value (for example, “4”). If there is, the latch signal SLB is output, the second latch circuit 103b is caused to latch the count value of the counter 203, and this is set as a jackpot random value at the end of the second special figure holding storage unit 102B.

  Thereafter, the CPU 103 performs steps S110 to S118 shown below in accordance with the value of the i-th special symbol process flag provided in the game control flag setting area of the RAM 102 corresponding to the i-th variable display device 4A or 4B. Execute the process.

  The special symbol normal process in step S110 is executed when the value of the i-th symbol process flag is “0”. This special symbol normal process includes a process of determining whether or not to start a special figure game by the i-th variable display device 4A or 4B based on data stored in the i-th special figure storage unit 102A or 102B. It is out. That is, if an unprocessed random number value is stored in the first entry of the i-th special figure storage unit 102A or 102B, the i-th special symbol process flag is set to “1” in order to execute the corresponding special figure game. Update to

  The big hit determination process in step S111 is executed when the value of the i-th special symbol process flag is “1”. The jackpot determination process includes a process of determining whether or not the variable display result in the special game for the i-th variable display device 4A or 4B for which the start condition is satisfied is determined to be a jackpot.

  In this jackpot determination process, as shown in FIG. 9, the CPU 103 first reads a random value stored in correspondence with the hold number “1” from the i-th special figure hold storage unit 102A or 102B (step S131). ). At this time, “1” is subtracted from the reserved storage number, and the random number value stored in the second to fourth entries (holding numbers “2” to “4”) of the i-th special figure reservation storage unit 102A or 102B. Are shifted up by one entry (step S132).

  Subsequently, the CPU 103 determines whether or not the probability improvement state (probability change is in progress) (step S133). If the probability change is not in progress (step S133; No), the CPU 103 determines that the game is in the normal game state and the special game. As a table for determining whether or not the display result is a big hit, a normal big hit determination table is set (step S134). On the other hand, if the probability change is in progress (step S133; Yes), the probability change big hit determination table is set (step S135).

  The CPU 103 determines whether or not the display result of the special figure game is a jackpot using the read random number value and the set jackpot determination table (step S136). If it is determined to be a big hit (step S136; Yes), the big hit state flag for the i-th variable display device 4A or 4B provided in the flag memory in the RAM 102 is set to an on state (step S136). In S137), when it is determined to be lost (step S136; No), the big hit state flag for the i-th variable display device 4A or 4B is cleared and turned off (step S138). Thereafter, the value of the i-th special symbol process flag is updated to “2” which is a value corresponding to the fixed symbol determination process (step S139).

  The confirmed symbol setting process in step S112 is executed when the value of the i-th special symbol process flag is “2”. In this fixed symbol setting process, a fixed symbol derived and displayed as a variable symbol display result of the special symbol in the special symbol game by the i-th variable display device 4A or 4B is set using a software random number, and the i-th special symbol process flag is set. The process of updating the value of “3” to “3” is included.

  The variable display pattern setting process in step S113 is executed when the value of the i-th special symbol process flag is “3”. The variable display pattern setting process executed when the value of the i-th special symbol process flag is “3” is based on the combination of the fixed symbols set in the fixed symbol setting process of step S112, etc. This includes processing for selecting and determining a variable display pattern to be used in the special figure game by the device 4A or 4B. Corresponding to the fixed symbol set in the fixed symbol setting process in step S112 or the variable display pattern selected and determined in the variable display pattern setting process in step S113, for example, control data is stored in a predetermined command transmission table. For example, the i-th variable display start command and the i-th special symbol designation command are set to be transmittable from the main board 11 to the display control board 12. Thereafter, the command control process in step S14 shown in FIG. 6 is executed, so that the i-th variable display start command and the i-th special symbol designation command are transmitted from the main board 11 to the display control board 12. Thereafter, the value of the i-th special symbol process flag is updated to “4”.

  When the variable display pattern for big hit is selected and determined in response to the i-th big hit flag being turned on in the variable display pattern setting process in step S113, for example, the (i + 1) big hit flag is checked. The (i + 1) th special variable winning ball device 6B or 6A is in a big hit game state by opening / closing operation, or the big hit combination is derived in the special figure game being executed by the (i + 1) th variable display device 4B or 4A. It is desirable to detect that the game is controlled to the big hit gaming state based on the variable display result in the special figure game by the (i + 1) th variable display device 4B or 4A. When it is detected that the game is controlled to the big hit game state, the variable display pattern used in the special game by the i-th variable display device 4A or 4B is compared with the time required for the big hit game state to end. A variable display pattern having a sufficiently long total variable display time for special symbols is selected and determined.

  The variable display control process in step S114 is executed when the value of the i-th special symbol process flag is “4”. This variable display control process is performed based on the timer value in the i-th variable display time timer provided in the game control timer setting area such as the RAM 102 corresponding to the i-th variable display device 4A or 4B. Or the process etc. which measure the remaining variable display time of the special symbol in the special figure game by 4B are included.

  The variable display stop process in step S115 is executed when the value of the i-th special symbol process flag is “5”. In this variable display stop process, the i-th special symbol confirmation command for instructing the deceleration and stop of the special symbol variably displayed on the i-th variable display device 4A or 4B is transmitted to the display control board 12. It includes processing for setting. In the variable display stop process of step S115, when the big hit combination is derived and displayed as a variable display result in the special game by the i-th variable display device 4A or 4B, the value of the i-th special symbol process flag is set to “6”. Updated. On the other hand, when the lost combination is derived and displayed as the variable display result, the value of the i-th special symbol process flag is updated to “0”.

  The pre-opening process for the special winning opening in step S116 is executed when the value of the i-th special symbol process flag is “6”. This pre-opening process for the big prize opening is a process for updating the value of the i-th special symbol process flag to “7” in the initialization process in the big hit operation such as opening / closing the opening / closing plate in the i-th special variable winning ball apparatus 6A or 6B. Including etc.

  The special winning opening opening process in step S117 is executed when the value of the i-th special symbol process flag is “7”. This process during opening of the big prize opening is various processes related to the big hit operation such as opening / closing the opening / closing plate by the i-th special variable winning ball apparatus 6A or 6B, or once in the i-th special variable winning ball apparatus 6A or 6B. When the process ends, the value of the i-th special symbol process flag is updated to “8”.

  The jackpot end process in step S118 is executed when the value of the i-th special symbol process flag is “8”. In this jackpot ending process, it is determined whether or not the jackpot operation by the i-th special variable winning ball apparatus 6A or 6B is finished, and if it is finished, a command for instructing the jackpot finish is transmitted to the display control board 12, and the i The process includes updating the value of the special symbol process flag to “0”, and updating the value of the i-th special symbol process flag to “7” if not completed.

  Next, the operation of the display control CPU 112 mounted on the display control board 12 will be described. In the display control board 12, the CPU 112 determines whether or not the timer interrupt flag provided in the display control flag setting area such as the RAM 114 is turned on, for example, to generate a timer interrupt every 33 milliseconds. For example, various timer interrupt processing programs stored in advance in the ROM 113 or the like for display control are executed. For example, each time the CPU 112 detects the occurrence of a timer interrupt, the CPU 112 executes first and second display control process processes corresponding to the first and second variable display devices 4A and 4B, respectively. In the first display control process, the value of the first display control process flag provided in the display control flag setting area is used to control the display operation in the first variable display device 4A in a predetermined procedure. Updating is performed according to the display state in 4A, and various processes provided in advance corresponding to the value of the first display control process flag are selected and executed. In the second display control process, the value of the second display control process flag provided in the display control flag setting area is set to the second variable in order to control the display operation in the second variable display device 4B according to a predetermined procedure. Updating is performed according to the display state on the display device 4B, and various processes provided in advance corresponding to the value of the second display control process flag are selected and executed.

  FIG. 10 is a flowchart illustrating an example of a process executed by the CPU 112 as the first display control process process. In the first display control process shown in FIG. 10, the CPU 112 selects and executes each of the following steps S150 to S153 according to the value of the first display control process flag.

  The variable display start command reception waiting process in step S150 is executed when the value of the first display control process flag is “0”. In this variable display start command reception waiting process, it is determined whether or not the first variable display start command for instructing the variable display start command variable display start by the first variable display device 4A from the main board 11 is received. Processing. The special symbol variable display start process in step S151 is executed when the value of the first display control process flag is “1”. This special symbol variable display start processing is performed by, for example, a plurality of types of variable stored in the ROM 113 in order to produce various types of display including special symbol variable display in the special symbol game by the first variable display device 4A. This includes processing for setting the display operation of the first variable display device 4A, such as processing for selecting the one corresponding to the variable display pattern from the display table data.

  The special symbol variable display in-process in step S152 is executed when the value of the first display control process flag is “2”, and the display of the special symbol being changed is controlled.

  The special symbol stop waiting process of step S153 shown in FIG. 10 is executed when the value of the first display control process flag is “3”, receives the first special symbol confirmation command from the main board 11, and performs the first variable. The display device 4A includes a process of stopping and displaying a fixed symbol on each of the left, middle, and right variable display portions.

As described above, according to the present invention, a special game using two variable display devices 4A and 4B becomes possible.
In addition, the timing for taking in the random value used for the jackpot determination in the special game in the first variable display device 4A and the random value used in the jackpot determination in the special game in the second variable display device 4B is acquired. Since the contents of the special symbol process are defined differently, there is no problem such as taking in the same random number value or synchronizing random numbers in both special figure games, and it has appropriate randomness The big hit state is established, and the interest of the game can be enhanced.

  The present invention is not limited to the above embodiment, and various modifications and applications are possible.

  For example, in the above embodiment, the operation clock f0 of the CPU 103 and the reference clock S0 of the random number circuit 104 are acquired from the same reference clock generation circuit 201, but may be acquired from separate oscillation circuits.

  Further, although both the update cycle of the counter 203 and the interrupt cycle of the CPU 103 are set to 2 msec, other values may be used. Furthermore, the interrupt cycle (cycle of the interrupt signal SI) may be longer than the update cycle of the counter 203. However, it is desirable that the execution timing of the interrupt process is a timing at which a certain time has elapsed after the count value of the counter 203 is updated and the output data of the counter 203 is stable.

  For example, in the present invention, two or more N variable display devices may be arranged. In that case, a circuit that latches the count value of one counter at different timings may be provided.

  Further, for example, the special game executed by the first variable display device 4A and the second variable display device 4B may have some linkage (one game affects the other).

  In order to facilitate understanding, the i-th special symbol process has been described as executing the process related to the i-th variable display device 4A or 4B. However, the random number acquisition in steps S100 and S101 is performed. With respect to the above, processing related to the i-th variable display device 4A or 4B may be performed, and processing related to the first and second variable display devices 4A and 4B may be performed in other steps.

  In the configuration of FIG. 3, an example in which the count value of the counter 203 is directly taken into the CPU 103 is shown, but a latch circuit may be arranged outside the CPU 103. Further, even if no latch is provided for each of the first variable display device 4A and the second variable display device 4B, the output data of the counter 203 is stored in one latch, and this is stored in the first and second characteristics. You may make it store suitably in figure reservation memory | storage part 102A or 102B.

  FIG. 11 shows a circuit example in such a case. In this example, the count value of the counter 203 is latched in accordance with the latch signal SLA or SLB via the OR circuit 205 by the latch circuit 204 arranged outside the CPU 103, and this is taken into the CPU 103 as appropriate, so that the first and first 2 is appropriately stored in the special figure storage unit 102A or 102B.

  For example, the latch circuit 204 can employ a configuration as shown in FIG. As shown in the figure, the latch circuit 204 includes two AND circuits 301 and 303, two NOT circuits 302 and 304, eight flip-flop circuits 311 to 318, and eight OR circuits 321 to 328. And is composed of.

  The input terminal of the AND circuit 301 is connected to the output terminal Q of the OR circuit 205 and the output terminal of the NOT circuit 304, and the output terminals are the input terminal of the NOT circuit 302 and the clock terminals Clk1 to Clk8 of the flip-flop circuits 311 to 318. And connected to. The input terminal of the NOT circuit 302 is connected to the output terminal of the AND circuit 301, and the output terminal is connected to one input terminal of the AND circuit 303.

  The input terminal of the AND circuit 303 is connected to the output terminal of the NOT circuit 302 and the I / O port of the game control microcomputer 100, and the output terminal is connected to the input terminal of the NOT circuit 304. The input terminal of the NOT circuit 304 is connected to the output terminal of the AND circuit 303, and the output terminal is connected to one input terminal of the AND circuit 301 and one input terminal of each of the OR circuits 321 to 328.

  The input terminals D1 to D8 of the flip-flop circuits 311 to 318 are connected to the output terminal of the counter 203, and one of 8-bit bit data C1 to C8 constituting the count value C is supplied. The clock terminals Clk1 to Clk8 of the flip-flop circuits 311 to 318 are connected to the output terminal of the AND circuit 301, and the output terminals Q1 to Q8 are connected to the other input terminal of each of the OR circuits 321 to 328.

  The input terminals of the OR circuits 321 to 328 are connected to the output terminal of the NOT circuit 304 and the output terminals of the flip-flop circuits 311 to 318, and the output terminals are connected to the I / O ports of the game control microcomputer 100. Yes.

  According to this configuration, the latch circuit 204 latches the count value (random value) of the counter 203 in response to the latch signal SLA or SLB (rising edge) supplied via the OR circuit 205. After that, the CPU 103 outputs a read control signal SRC, reads the latched value, sets it in the special figure reservation storage unit 102A or 102B (if there is an available space), and then turns off the read control signal SRC to disable the read operation. And This reduces the possibility of reading data or latching data while the data in the latch circuit 204 is unstable.

  In the above embodiment, each time the interrupt signal SI is output to the CPU 103, the game control interrupt process shown in FIG. 6 is executed. For example, the number of inputs of the interrupt signal SI is determined by the internal counter of the CPU 103. The game control interrupt process shown in FIG. 6 may be executed by generating an internal interrupt each time the counter is counted and a certain number (n) is counted. With such a configuration, for example, every time a predetermined time (n times the counter update period, for example, 2 msec) is measured while the clock signal S0 is set to a high frequency and the count value of the counter 203 is updated at high speed. The game control interrupt process of FIG. 6 can be executed, and a more suitable random number can be generated.

  Further, for example, as shown in FIG. 11, the operation clock signal f0 having a frequency of about 20 MHz is supplied to the CPU 103 and the count clock signal generation circuit 202, and the count value (numerical data) of the counter 203 is updated at high speed. However, the CPU 103 may count the clock signal f0 for a predetermined number of pulses and execute the game control interrupt process of FIG. 6 every time a certain period has elapsed.

  It is also possible to configure the oscillation circuit for updating the counter 203 and the oscillation circuit for the CPU 103 as separate circuits. Even in this case, the timing at which the CPU 103 generates the latch signals SLA and SLB is preferably the timing at which the output data of the counter 203 is stable.

  In addition, the gaming machine of the present invention is capable of variably displaying special symbols on the first and second variable display devices 4A and 4B based on, for example, winning of game balls on the first and second ordinary variable winning ball devices 5A and 5B. It is not limited to the pachinko gaming machine 1 that satisfies the conditions for starting the game machine, and includes at least two variable display units that variably display each of a plurality of types of identification information that can be identified. The present invention can be applied to any gaming machine that has a gaming state advantageous to the player when the display result of the variable display is a combination of specific identification information. For example, it is possible to start a game by setting the number of bets for one game, and the display result of the variable display device is derived and displayed, so that one game is completed, and the display result of the variable display device is displayed. In response to this, a slot machine or the like that can generate a predetermined prize may be used.

Note that the final stop symbol and the random number for generating the variable display pattern may be generated using the random number circuit of FIG.
In this case, the CPU 103 appropriately outputs a latch instruction signal to the first latch signal output circuit 204A or the second latch signal output circuit 204B, and latches the count value of the counter 203. In this case, the CPU 103 appropriately outputs a latch instruction signal to the first latch signal output circuit 204A or the second latch signal output circuit 204B, and latches the count value of the counter 203.

  In order to obtain timing, the rising edge of the signal is mainly used. However, it is naturally possible to use a falling edge.

  Furthermore, the count value of the counter 203 is an odd number, a multiple of 3 or a prime number, and the counter 203 counts as a random number for the first and second variable display devices 4A and 4B as the counter 203 repeats counting. You may make it count all the numerical values in the range.

It is a front view of the pachinko gaming machine in the embodiment of the present invention. It is a block diagram which shows the system configuration example in a pachinko gaming machine. It is a figure which shows the structure of a random number circuit. 4 is a timing chart for explaining the operation of the circuit shown in FIG. 3. It is a block diagram which shows an example of the hardware constitutions in a display control board. It is a flowchart which shows a game control interruption process. It is a flowchart which shows the i-th (i = 1 or 2) special symbol process process. It is a flowchart of a winning process. It is a flowchart of jackpot determination processing. It is a flowchart which shows a 1st display control process process. It is a figure which shows the other structural example of a random number circuit. It is a figure which shows the structural example of a latch circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Pachinko machine 2 ... Game board 3 ... Gaming machine frame 4A, 4B ... Variable display apparatus 5A, 5B ... Normal variable winning ball apparatus 6A, 6B ... Special variable winning ball apparatus 8L, 8R ... Speaker 9 ... Game effect lamp DESCRIPTION OF SYMBOLS 11 ... Main board 12 ... Display control board 70 ... Each winning prize switch 100 ... Microcomputer 101, 113 for game control ROM
102, 114 ... RAM
103, 112 ... CPU
104 ... random number circuit 105 ... I / O port 107 ... switch circuit 110 ... oscillation circuit 111 ... reset circuit 115A, 115B ... VDP
116A, 116B ... CGROM
117A, 117B ... VRAM

Claims (6)

First variable display means for variably displaying a plurality of types of identification information that can be identified based on the fact that the first start condition is satisfied after the first start condition is satisfied, and the first start condition A second variable display means for variably displaying a plurality of types of identification information that can each be identified based on the second start condition being satisfied after the second start condition different from the second start condition is satisfied, When the display result of variable display of identification information by the first variable display means is a combination of specific identification information determined in advance, or the display result of variable display of identification information by the second variable display means A gaming machine that controls a specific gaming state advantageous to the player when the combination of the specific identification information is provided,
Numeric data updating means for updating the numeric data at a predetermined cycle and outputting it as a random value;
Game control means for controlling the progress of the game using the variable display of the first and second variable display means based on the random number value output by the numerical data update means,
The game control means includes
An interruption process is periodically executed at a period equal to or longer than the update period of the numerical data of the numerical data update means,
In the interrupt process, a first start signal input based on the establishment of the first start condition or a second start signal input based on the establishment of the second start condition is An input discriminating means for discriminating whether or not there is an input;
Storage means for storing a random number value output by the numerical data updating means when it is determined that the input is determined by the input determination means;
When the first start condition is established, the random number value stored in the storage means based on the establishment of the first start condition that triggers the establishment of the first start condition is a predetermined determination value data. By determining whether or not they match, it is determined whether or not the display result in the variable display by the first variable display means is the specific display result, and when the second start condition is satisfied, By determining whether or not the random number value stored in the storage means matches predetermined determination value data based on the establishment of the second start condition that triggered the second start condition, Display result determination means for determining whether or not the display result in the variable display by the variable display means is the specific display result,
The input determining means determines only one of the first start signal and the second start signal in one interrupt process.
A gaming machine characterized by that. First variable display means for variably displaying a plurality of types of identification information that can be identified based on the fact that the first start condition is satisfied after the first start condition is satisfied, and the first start condition A second variable display means for variably displaying a plurality of types of identification information that can be identified based on the fact that the second start condition is satisfied after the second start condition different from is established,
When the display result of the variable display of the identification information by the first variable display means is a combination of predetermined specific identification information, or the display result of the variable display of the identification information by the second variable display means Is a gaming machine that controls to a specific gaming state advantageous to the player when a combination of the specific identification information is obtained,
Numeric data updating means for updating the numeric data at a predetermined cycle and outputting it as a random value;
Game control means for controlling the progress of the game using the variable display of the first and second variable display means based on the random number value output by the numerical data update random number generating means,
The game control means includes
An interruption process is periodically executed at a period equal to or longer than the update period of the numerical data of the numerical data update means,
In the interrupt process, a first start signal input based on the establishment of the first start condition or a second start input based on the establishment of the second start condition Input discriminating means for discriminating whether or not a signal is input;
A latch signal output means for taking in the random number value output by the numerical data update means when it is determined that the input determination means has input,
Storage means for storing a random value output by the numerical data updating means in response to a latch signal from the latch signal output means,
The game control means includes
When the first start condition is established, the random number value stored in the storage means based on the establishment of the first start condition that triggers the establishment of the first start condition is a predetermined determination value data. By determining whether or not they match, it is determined whether or not the display result in the variable display by the first variable display means is the specific display result, and when the second start condition is satisfied, The second variable is determined by determining whether or not the random number value stored in the storage means matches predetermined determination value data based on the establishment of the second start condition triggered by the second start condition. Display result determining means for determining whether or not the display result in the variable display on the display means is the specific display result,
The input determining means determines only one of the first start signal and the second start signal in one interrupt process.
A gaming machine characterized by that. The game control means includes
Before reading the random number value from the storage circuit, output the output control signal to the storage means to control the storage control means to be readable, and after reading the random number value, stop outputting the output control signal Read control means for controlling the storage means to an unreadable state;
The gaming machine according to claim 2, wherein:   3. The storage means includes an output control signal reception control means for controlling the output control signal to be in an unreceivable state when a latch signal is input from the latch signal output means. Or the gaming machine of 3. The storage means includes a latch signal reception control means for controlling the latch signal to an unreceivable state when an output control signal is input from the latch signal output means.
The gaming machine according to claim 2, 3, or 4. The numerical data update means includes reference clock output means for generating a reference clock signal, and clock signal generation means for generating a plurality of signals having the same period and different phases based on the reference clock signal,
The clock signal generation means includes a clock terminal to which the reference clock signal is input from the reference clock signal output means, an input terminal to which a first signal is input, and a change state of the first signal to the clock terminal. A first output terminal that outputs a signal synchronized with a timing that changes every predetermined period of the reference clock signal input from the first output terminal, and a signal that is output from the first output terminal and has the same period and phase And a second output terminal for outputting different signals,
The clock signal generation means outputs the first clock signal output from the first output terminal and the second output terminal by connecting the second output terminal and the input terminal. Generating a second clock signal having the same period and a different phase from the first clock signal,
The numerical data updating means updates the numerical data at a first timing when the first clock signal generated by the clock signal generating means changes,
Outputting the second clock signal generated by the clock signal generation means as an interrupt signal to the game control means;
The game control means executes the interrupt process according to the interrupt signal.
The gaming machine according to claim 1.

Images