JP2005294296A - Flip-chip bonding method and apparatus thereof - Google Patents

Flip-chip bonding method and apparatus thereof Download PDF

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Publication number
JP2005294296A
JP2005294296A JP2004102528A JP2004102528A JP2005294296A JP 2005294296 A JP2005294296 A JP 2005294296A JP 2004102528 A JP2004102528 A JP 2004102528A JP 2004102528 A JP2004102528 A JP 2004102528A JP 2005294296 A JP2005294296 A JP 2005294296A
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Prior art keywords
chip
circuit board
insulating resin
electrode
flip
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Japanese (ja)
Inventor
Naoto Nakatani
直人 中谷
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Nippon Avionics Co Ltd
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Nippon Avionics Co Ltd
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Priority to JP2004102528A priority Critical patent/JP2005294296A/en
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
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    • H01L2224/118—Post-treatment of the bump connector
    • H01L2224/1182—Applying permanent coating, e.g. in-situ coating
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
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    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
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    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83102—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus using surface energy, e.g. capillary forces
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    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
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    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
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Abstract

<P>PROBLEM TO BE SOLVED: To supply an insulating resin so as not to have negative impacts on the alignment accuracy in flip-chip bonding. <P>SOLUTION: In the flip-chip bonding method, a chip 1 with electrodes facing down is held by a bonding tool 3 and then is positioned above a circuit board 2 placed on a stage 5. Then, the chip 1 and the circuit board 2 are optically aligned. After applying the insulating resin 8 on the electrode-formed bottom face of the chip 1, the bonding tool 3 is lowered to mount the chip 1 on the mounting position of the circuit board 2. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、ＩＣチップ等のベアチップを回路基板に実装する場合に、チップの電極と回
路基板の電極とのあいだにバンプを介在させ、これらをフェイスダウン状態で接合するフ
リップチップ実装方法およびその装置に関するものである。 The present invention relates to a flip chip mounting method and apparatus for bonding a bump between a chip electrode and a circuit board electrode in a face-down state when a bare chip such as an IC chip is mounted on a circuit board. It is about.

ここで図４、図５、図６および図７に基づいて従来のフリップチップ実装方法を説明す
る。図４はチップの電極にワイヤのボールボンディング工法を利用してバンプを形成する
方法、図５は図４で示す方法でバンプを形成したチップを回路基板にフェイスダウン実装
する方法を示す。 Here, a conventional flip chip mounting method will be described with reference to FIGS. 4, 5, 6 and 7. FIG. 4 shows a method of forming bumps on a chip electrode by using a wire ball bonding method, and FIG. 5 shows a method of mounting a chip on which bumps are formed by the method shown in FIG.

まず図４（ａ）において、キャピラリ２０１に保持された金等の金属から成るワイヤ２
０２の先端に放電作用によりボール２０３を形成し、キャピラリ２０１を矢印アの方向に
移動させることによりボール２０３をチップ２０４の電極２０５に押圧し接合する。この
接合には熱圧着あるいはこれに矢印イの方向に超音波振動を加える方法がある。ここで２
０６はパッシベーション膜と一般に呼ばれ、電極２０５の周辺に形成される絶縁保護皮膜
である。 First, in FIG. 4A, a wire 2 made of metal such as gold held in a capillary 201 is used.
A ball 203 is formed at the tip of 02 by a discharge action, and the capillary 201 is moved in the direction of arrow A to press and join the ball 203 to the electrode 205 of the chip 204. For this joining, there are thermocompression bonding or a method of applying ultrasonic vibration in the direction of arrow A to this. Where 2
06 is generally called a passivation film, and is an insulating protective film formed around the electrode 205.

さらに図４（ｂ）で示すように、ワイヤ２０２と共にキャピラリ２０１を矢印ウの方向
に移動させることによりワイヤ２０２を引きちぎり、電極２０５上にバンプ２０７を形成
する。このようにして形成されたバンプ２０７は台座部２０７Ａと突出部２０７Ｂで構成
された鋲形状を呈する。これを鋲状バンプと称する。 Further, as shown in FIG. 4B, the capillary 202 is moved in the direction of the arrow C together with the wire 202 to tear the wire 202 and form a bump 207 on the electrode 205. The bump 207 formed in this way has a bowl shape composed of a pedestal portion 207A and a protruding portion 207B. This is called a hook-shaped bump.

次にこのようにして鋲状バンプ２０７が形成されたチップ２０４の背面を、図５で示す
ように接合ツール１０１で吸着保持し、回路基板２５１の方向（矢印エの方向）に移動さ
せる。これにより図５（ａ）のように鋲状バンプ２０７の突出部２０７Ｂの先端が回路基
板２５１上に形成された電極２５２に当接し、僅かに潰れる。この潰れしろにより、複数
の鋲状バンプ２０７に高さのばらつきがあっても、チップ２０４に形成された全ての鋲状
バンプ２０７の先端を、対応する電極２５２に当接させることが可能となる。 Next, the back surface of the chip 204 on which the bowl-shaped bumps 207 are thus formed is sucked and held by the bonding tool 101 as shown in FIG. 5 and moved in the direction of the circuit board 251 (direction of arrow D). As a result, as shown in FIG. 5A, the tip of the protruding portion 207B of the bowl-shaped bump 207 contacts the electrode 252 formed on the circuit board 251 and is slightly crushed. Due to this crushing margin, even if there are variations in the height of the plurality of bowl-shaped bumps 207, the tips of all the bowl-shaped bumps 207 formed on the chip 204 can be brought into contact with the corresponding electrodes 252. .

さらに接合部を所定の温度に加熱したうえで、図５（ｂ）で示すように接合ツール１０
１で矢印エの方向に押圧することで鋲状バンプ２０７が大きく変形して潰れ、バンプ２０
７と電極２５２との接合がなされる。またこのとき、回路基板２５１の主面と略平行方向
（矢印オの方向）に超音波振動を発生させる場合もある。またここでは接合直前にレベリ
ング動作を行っているが、この前の工程で、別に設けたレベリング用平板にバンプ先端を
押し付ける場合もある。 Furthermore, after heating a joining part to predetermined temperature, as shown in FIG.5 (b), the joining tool 10 is shown.
1 is pressed in the direction of arrow D, the bowl-shaped bump 207 is greatly deformed and crushed.
7 and the electrode 252 are joined. At this time, ultrasonic vibrations may be generated in a direction substantially parallel to the main surface of the circuit board 251 (in the direction of the arrow O). Here, the leveling operation is performed immediately before joining, but the bump tip may be pressed against a separately provided leveling flat plate in the previous step.

次に、チップ上にバンプを形成し回路基板にフェイスダウン接合する他の方法を、図６
および図７に基づいて説明する。まず図６（ａ）で示すように、チップ２０４の電極２０
５が在る方の面にめっき電極用金属膜２０８を形成し、さらに電極２０５の上部空間２１
０を避けて所定の厚さにマスキング層２０９を形成する。 Next, another method of forming bumps on the chip and performing face-down bonding to the circuit board is shown in FIG.
And it demonstrates based on FIG. First, as shown in FIG.
5 is formed on the surface where 5 is present, and the upper space 21 of the electrode 205 is further formed.
The masking layer 209 is formed to a predetermined thickness while avoiding zero.

その後図６（ｂ）で示すように、前記めっき電極用金属膜２０８を共通の電極として電
気めっき処理を行い、電極２０５の上部に金属層２１１を形成する。さらに図６（ｃ）で
示すように前記マスキング層２０９とバンプ周辺の不要なめっき電極用金属膜２０８を除
去することにより、金属層２１１によって角柱あるいは円柱形状のバンプを形成する。こ
れをめっきバンプと称する。 Thereafter, as shown in FIG. 6B, electroplating is performed using the metal film 208 for plating electrode as a common electrode to form a metal layer 211 on the electrode 205. Further, as shown in FIG. 6C, the masking layer 209 and unnecessary plating electrode metal film 208 around the bump are removed to form a prismatic or cylindrical bump by the metal layer 211. This is called a plating bump.

次にこのようにしてめっきバンプ２１１が形成されたチップ２０４の背面を、図７（ａ
）で示すように接合ツール１０１で吸着保持し、回路基板２５１の方向（矢印エの方向）
に移動させる。さらに接合部を所定の温度に加熱したうえで、図７（ｂ）で示すように、
接合ツール１０１で矢印エの方向に押圧することでめっきバンプ２１１と電極２５２との
接合がなされる。またこのときも、矢印オの方向に超音波振動を発生させる場合がある。 Next, the back surface of the chip 204 on which the plating bumps 211 are formed in this way is shown in FIG.
) And sucked and held by the bonding tool 101, and the direction of the circuit board 251 (the direction of arrow D)
Move to. Furthermore, after heating a junction part to predetermined | prescribed temperature, as shown in FIG.7 (b),
The plating bump 211 and the electrode 252 are joined by pressing the joining tool 101 in the direction of arrow D. Also at this time, ultrasonic vibrations may be generated in the direction of arrow E.

以上のように金を主成分とする合金からなるバンプを使用した方法の他にも、はんだか
らなるバンプを使用したＣ４（Ｃｏｎｔｒｏｌｌｅｄ ｃｏｌｌａｐｓｅ ｃｈｉｐ ｃ
ｏｎｎｅｃｔｉｏｎ）のようなフリップチップ実装方法もあるが、いずれの場合も図８で
示すようにチップ２０４と回路基板２５１との間隙に絶縁性樹脂２６１を充填する方法が
広く用いられている。この絶縁性樹脂２６１は硬化すると、チップ２０４と回路基板２５
１との熱膨係数の差により生じる応力を分散し、バンプやその接合部に応力集中すること
を防ぐ効果があり、他にも接合後のバンプ周囲の空間を無くすことで、酸素を含む空気や
水分の浸入を防ぐ効果がある。 As described above, in addition to the method using bumps made of an alloy mainly composed of gold, C4 (Controlled collapse chip c) using bumps made of solder is used.
There is a flip chip mounting method such as “connection”. In any case, as shown in FIG. 8, a method of filling the gap between the chip 204 and the circuit board 251 with the insulating resin 261 is widely used. When the insulating resin 261 is cured, the chip 204 and the circuit board 25 are cured.
It has the effect of dispersing the stress caused by the difference in thermal expansion coefficient from 1 and preventing the stress from concentrating on the bumps and their joints. In addition, by eliminating the space around the bumps after bonding, air containing oxygen And prevents moisture from entering.

絶縁性樹脂は図９で示すように、チップ２０４の実装後チップ２０４周縁に接近させた
ディスペンス用ニードル２６２から毛細管現象を利用して充填する方法が広く用いられて
きた。しかしながら近年の実装の高密度化に伴って、単位面積あたりのバンプの数が増え
ると共にチップ下面と回路基板との間隔が小さくなってきたので、内部に気泡を残す等充
填が困難になると共に充填に時間がかかるようになってきた。また図１０で示すように、
実装前に回路基板の実装位置に予め絶縁性樹脂を供給しておく方法もあるが、絶縁性樹脂
が所定の範囲からはみ出さないようにするのは困難であった。 As shown in FIG. 9, a method of filling the insulating resin from the dispensing needle 262 close to the periphery of the chip 204 after mounting the chip 204 by using a capillary phenomenon has been widely used. However, as the mounting density has increased in recent years, the number of bumps per unit area has increased and the distance between the lower surface of the chip and the circuit board has become smaller. It has come to take time. As shown in FIG.
There is a method of supplying an insulating resin to the mounting position of the circuit board in advance before mounting, but it has been difficult to prevent the insulating resin from protruding from a predetermined range.

そこで近年特許文献１や特許文献２のような方法が工夫されてきた。特許文献１の方法
は図１１で示すような方法である。まず図１１（ａ）のように平板２６３上に絶縁性樹脂
２６１を供給しておき、その上方では接合ツール１０１によりチップ２０４を鋲状バンプ
２０７を下方に向けた状態で保持する。そして図１１（ｂ）のように接合ツール１０１を
下降させ、加圧することで鋲状バンプ２０７のレベリングを行う。次に図１１（ｃ）のよ
うに接合ツール１０１を上昇させると、レベリングに加えて絶縁性樹脂２６１の転写が行
われ、その後実装工程に入る。 Therefore, in recent years, methods such as Patent Document 1 and Patent Document 2 have been devised. The method of patent document 1 is a method as shown in FIG. First, as shown in FIG. 11A, the insulating resin 261 is supplied onto the flat plate 263, and the chip 204 is held by the bonding tool 101 with the bowl-shaped bump 207 facing downward. Then, as shown in FIG. 11B, the joining tool 101 is lowered and pressed to level the bowl-shaped bump 207. Next, when the joining tool 101 is raised as shown in FIG. 11C, the insulating resin 261 is transferred in addition to the leveling, and then the mounting process is started.

また特許文献２は図１２で示すような方法である。まず図１２（ａ）のように電極２０
５を上向きにしておかれたチップ２０４の上面に絶縁性樹脂２６１を供給する。そして図
１２（ｂ）のように先端にボールを形成した金属ワイヤを絶縁性樹脂２６１の上から押圧
しボンディングすることで鋲状バンプ２０７を形成する。その後チップ２０４を反転して
実装する。 Patent Document 2 is a method as shown in FIG. First, as shown in FIG.
Insulating resin 261 is supplied to the upper surface of chip 204 with 5 facing upward. Then, as shown in FIG. 12B, a metal wire having a ball formed at the tip is pressed from above the insulating resin 261 and bonded to form the bowl-shaped bump 207. Thereafter, the chip 204 is inverted and mounted.

特開２００１−２３７２７４号公報（第２頁、図７）Japanese Patent Laying-Open No. 2001-237274 (second page, FIG. 7) 特開平１１−１１１７５５号公報（第２頁、図１）Japanese Patent Laid-Open No. 11-111755 (second page, FIG. 1)

しかしながら図１１で示す特許文献１の方法では、実装の位置合わせの段階で、チップ
２０４の電極やバンプを絶縁性樹脂２６１が覆っているので、電極どうしを光学的に撮像
して位置合わせするのに不都合である。したがって、位置合わせしたのちにツールを移動
させ絶縁性樹脂を転写し、再び位置合わせされた実装位置に戻って実装することになるが
、電気的に記憶された位置に戻っても機械的な誤差は免れない。 However, in the method of Patent Document 1 shown in FIG. 11, since the insulating resin 261 covers the electrodes and bumps of the chip 204 at the stage of mounting alignment, the electrodes are optically imaged and aligned. Is inconvenient. Therefore, after alignment, the tool is moved to transfer the insulating resin, and the mounting position is moved back to the aligned mounting position. Is inevitable.

また、図１２で示す特許文献２の方法では、キャピラリ２６４の先端が絶縁性樹脂２６
１に触れないようにバンプをボンディングする必要があり、それを実現したとしても、前
記したような光学的な撮像を行った場合、バンプの先端を位置の基準として判断せざるを
得ないため、バンプ形状の歪みや位置的誤差が実装のための位置合わせ誤差要素となる。
また、絶縁性樹脂２６１をチップ１０１に供給した後バンプを形成し、さらに反転し位置
合わせしてから実装するため、絶縁性樹脂２６１の硬化までの時間が長くかかり、絶縁性
樹脂２６１の所定の物理特性（粘度等）を維持するのに工夫が必要となる。 In the method of Patent Document 2 shown in FIG. 12, the tip of the capillary 264 is connected to the insulating resin 26.
It is necessary to bond the bumps so as not to touch 1, and even if it is realized, when optical imaging as described above is performed, the tip of the bumps must be determined as the position reference. Bump shape distortion and positional error are positioning error factors for mounting.
Further, since the insulating resin 261 is supplied to the chip 101, bumps are formed, and further inverted and aligned, and then mounted, it takes a long time until the insulating resin 261 is cured. Ingenuity is required to maintain physical properties (viscosity, etc.).

本発明は以上述べたような課題を解決すべく創出されたもので、絶縁性樹脂を実装前の
チップに供給しても、光学的な位置合わせの精度に悪影響を与えない絶縁性樹脂の供給方
法と供給装置を提案し、フリップチップ実装において安定した接合品質を得るものである
。 The present invention has been created to solve the above-described problems. Even if the insulating resin is supplied to the chip before mounting, the insulating resin is supplied without adversely affecting the accuracy of optical alignment. A method and a supply device are proposed to obtain a stable bonding quality in flip chip mounting.

本発明は第１の態様として、チップを回路基板にフェイスボンディングするフリップチ
ップ実装方法であって、電極を下向きにした状態のチップを接合ツールが保持しながらス
テージに載置された回路基板の上方に位置しているとき、前記チップの下面に絶縁性樹脂
を塗布し、その後前記接合ツールを下降させて前記回路基板の実装位置に前記チップを実
装することを特徴とするフリップチップ実装方法を提供する。 The present invention provides, as a first aspect, a flip chip mounting method in which a chip is face-bonded to a circuit board, and the upper part of the circuit board placed on the stage while the bonding tool holds the chip with the electrodes facing downward. A flip chip mounting method is provided, wherein an insulating resin is applied to a lower surface of the chip when the chip is positioned, and then the bonding tool is lowered to mount the chip at a mounting position of the circuit board. To do.

また本発明は第２の態様として、前記絶縁性樹脂を塗布する前に前記チップの電極と前
記回路基板の電極との光学的な位置合わせが行われ、前記絶縁性樹脂が塗布される時点に
は、前記位置合わせが終了した状態であることを特徴とする第１の態様として記載のフリ
ップチップ実装方法を提供する。 According to a second aspect of the present invention, when the insulating resin is applied, optical alignment of the chip electrode and the circuit board electrode is performed before the insulating resin is applied. Provides a flip-chip mounting method according to the first aspect, wherein the alignment is completed.

さらに本発明は第３の態様として、チップを回路基板にフェイスボンディングするフリ
ップチップ実装装置であって、電極を下向きにした状態のチップを保持する接合ツールと
、回路基板を載置し保持するステージと、チップの電極と回路基板の電極との位置合わせ
を行う光学的な位置合わせ手段と、絶縁性樹脂を塗布するためのディスペンス用ニードル
とを備え、前記接合ツールに保持されたチップが前記ステージに載置された回路基板の上
方に位置しているとき、前記ディスペンス用ニードルが前記チップに対し、下方から絶縁
性樹脂を塗布することを特徴とするフリップチップ実装装置を提供する。 Furthermore, the present invention provides, as a third aspect, a flip chip mounting apparatus for face bonding a chip to a circuit board, a bonding tool for holding the chip with the electrodes facing downward, and a stage for mounting and holding the circuit board And an optical alignment means for aligning the electrode of the chip and the electrode of the circuit board, and a dispensing needle for applying an insulating resin, and the chip held by the joining tool is the stage The flip-chip mounting apparatus is characterized in that the insulating needle is applied to the chip from below when the dispensing needle is positioned above the circuit board placed on the chip.

加えて本発明は第４の態様として、前記絶縁性樹脂を塗布する前に、前記光学的な位置
合わせ手段がチップの電極と回路基板の電極との位置合わせを行い、前記ディスペンス用
ニードルが前記チップに対し絶縁性樹脂を供給する時点には、前記チップが前記回路基板
の上方に位置合わせされた状態で保持されていることを特徴とする第３の態様として記載
のフリップチップ実装装置を提供する。 In addition, according to a fourth aspect of the present invention, the optical alignment means aligns the chip electrode and the circuit board electrode before applying the insulating resin, and the dispensing needle is The flip-chip mounting apparatus according to the third aspect, wherein the chip is held in a state of being aligned above the circuit board when the insulating resin is supplied to the chip. To do.

本発明によれば、実装後の狭い間隙に絶縁性樹脂を充填しないので、内部に気泡が残留
せず安定した品質が確保できる。さらに絶縁性樹脂供給にかかる時間が短縮でき、実装作
業全体の作業時間が短縮できる。また、絶縁性樹脂をチップ側に供給するので所定の範囲
からはみ出すことがない。 According to the present invention, since the insulating resin is not filled in the narrow gap after mounting, bubbles are not left inside, and stable quality can be ensured. Furthermore, the time required for supplying the insulating resin can be shortened, and the work time of the entire mounting work can be shortened. Further, since the insulating resin is supplied to the chip side, it does not protrude from a predetermined range.

さらに本発明によれば、光学的な位置合わせを行った後に、その位置合わせの結果に影響
することがないように絶縁性樹脂を供給するので、正確な位置合わせによる安定した接合
品質を得ることが可能となる。 Furthermore, according to the present invention, after the optical alignment is performed, the insulating resin is supplied so as not to affect the alignment result, so that stable bonding quality by accurate alignment can be obtained. Is possible.

まず本発明に係るフリップチップ実装装置の構成を図１に示す。図１において、１はチ
ップ、２はチップ１が実装されるべき回路基板、３は接合ツール、４は接合ヘッド、５は
ステージ、６は光学的な位置合わせ手段である上下２視野カメラ、７は絶縁性樹脂供給部
である。 First, the configuration of a flip chip mounting apparatus according to the present invention is shown in FIG. In FIG. 1, 1 is a chip, 2 is a circuit board on which the chip 1 is to be mounted, 3 is a bonding tool, 4 is a bonding head, 5 is a stage, 6 is an upper and lower two-view camera that is an optical alignment means, 7 Is an insulating resin supply section.

ここで、チップ１は接合ツール３に真空吸着作用により保持されている。また回路基板
２はステージ５上に載置され、これも位置ずれしないように吸着保持されている。接合ヘ
ッド４は接合ツール３を下端に備えて上下方向（Ｚ方向）に移動し、制御された荷重でチ
ップ１を回路基板２に押圧することができる。またステージ５は左右方向（Ｘ方向）、前
後方向（Ｙ方向）、回転方向（θ方向）に移動可能であり、チップ１と回路基板２との位
置合わせにおいて位置制御されて駆動する。 Here, the chip 1 is held by the bonding tool 3 by a vacuum suction action. The circuit board 2 is placed on the stage 5 and is also held by suction so as not to be displaced. The joining head 4 has the joining tool 3 at the lower end and moves in the vertical direction (Z direction), and can press the chip 1 against the circuit board 2 with a controlled load. Further, the stage 5 is movable in the left-right direction (X direction), the front-rear direction (Y direction), and the rotation direction (θ direction), and is driven by position control in alignment between the chip 1 and the circuit board 2.

上下２視野カメラ６は略水平方向に移動し、実装動作の前にチップ１と回路基板２との
間に移動して、同時に上下方向すなわち上方のチップ１の下面と下方の回路基板２の上面
を撮像し出力する。この映像出力は図示しないモニターで重ね合わせ画像で表示されると
共に、電子的な位置合わせのデータとして使用される。 The vertical two-view camera 6 moves in a substantially horizontal direction, moves between the chip 1 and the circuit board 2 before the mounting operation, and simultaneously moves in the vertical direction, that is, the lower surface of the upper chip 1 and the upper surface of the lower circuit board 2. Is captured and output. This video output is displayed as a superimposed image on a monitor (not shown) and used as electronic alignment data.

絶縁性樹脂供給部７も略水平方向に移動し、先端に設けた後述するディスペンス用ニー
ドル７Ａをチップ１の下面に接近あるいは離隔させる。また、この絶縁性樹脂供給部７は
図示しない制御部の指令により予め定められた量の絶縁性樹脂を前記ディスペンス用ニー
ドル７Ａに送出する。 The insulating resin supply unit 7 also moves in a substantially horizontal direction, and a later-described dispensing needle 7A provided at the tip is moved closer to or away from the lower surface of the chip 1. The insulating resin supply unit 7 sends a predetermined amount of insulating resin to the dispensing needle 7A in accordance with a command from a control unit (not shown).

ここで、バンプはチップ１の電極に形成される場合もあるし、回路基板２の電極に形成
される場合もある。また、前述した位置合わせに用られる画像の要素としては、チップ１
の下面と回路基板２の実装面に形成されている電極パッド若しくは回路パターンの他の特
徴点、あるいはこれらの面に位置合わせの目的で形成された位置決め用パッドがある。 Here, the bump may be formed on the electrode of the chip 1 or may be formed on the electrode of the circuit board 2. Further, as an image element used for the above-described alignment, the chip 1 is used.
There are electrode pads or other feature points of the circuit pattern formed on the lower surface of the circuit board 2 and the mounting surface of the circuit board 2, or positioning pads formed on these surfaces for the purpose of alignment.

次に図１、図２および図３に基づいて本発明に係るフリップチップ実装の動作を説明す
る。まず図１で示すようにチップ１が電極の在る面を下向きにして接合ツール３に吸着保
持され、これと共に回路基板２がステージ５に載置され吸着保持される。この吸着保持の
のち接合ヘッド４はチップ１と回路基板２とを上下に離隔させた状態で静止する。 Next, the operation of flip chip mounting according to the present invention will be described with reference to FIGS. First, as shown in FIG. 1, the chip 1 is sucked and held on the bonding tool 3 with the surface on which the electrodes are located facing downward, and the circuit board 2 is placed on the stage 5 and sucked and held together with this. After this suction and holding, the bonding head 4 stands still with the chip 1 and the circuit board 2 spaced apart from each other.

次に上下２視野カメラ６が移動してその撮像部をチップ１と回路基板２との間隙に挿入
し、チップ１の下面と回路基板２の実装面とを同時に撮像する。そしてこの画像データに
基づいたステージ５の水平方向の駆動により位置合わせが行われる。このとき、ステージ
５の上面と接合ヘッド４の移動軸との角度調整は予め行ってある。 Next, the upper and lower two-field camera 6 moves and the image pickup unit is inserted into the gap between the chip 1 and the circuit board 2 so that the lower surface of the chip 1 and the mounting surface of the circuit board 2 are simultaneously imaged. Position alignment is performed by driving the stage 5 in the horizontal direction based on the image data. At this time, the angle adjustment between the upper surface of the stage 5 and the moving axis of the bonding head 4 is performed in advance.

このようにして位置合わせが終了すると上下２視野カメラ６が退避し、次に絶縁性樹脂
供給部７が異動して先端部のディスペンス用ニードル７Ａをチップ１の下面に接近させる
。さらに絶縁性樹脂供給部７は制御部からの指令により絶縁性樹脂８をディスペンス用ニ
ードル７Ａに送出する。 When the alignment is completed in this manner, the upper and lower two-field camera 6 is retracted, and then the insulating resin supply unit 7 is moved to bring the dispensing needle 7A at the tip portion closer to the lower surface of the chip 1. Further, the insulating resin supply unit 7 sends the insulating resin 8 to the dispensing needle 7A in accordance with a command from the control unit.

送出された絶縁性樹脂８は図２（ａ）で示すようにディスペンス用ニードル７Ａの先端
から吐出する。吐出した絶縁性樹脂８は自身の粘性と表面張力により下方へ流出すること
なくチップ１の下面に接触し、接触後はこの下面に濡れ広がる。絶縁性樹脂供給部７は絶
縁性樹脂８の供給が所定量に達したところで送出を停止し、この位置から退避する。 The delivered insulating resin 8 is discharged from the tip of the dispensing needle 7A as shown in FIG. The discharged insulating resin 8 contacts the lower surface of the chip 1 without flowing out downward due to its own viscosity and surface tension, and wets and spreads on this lower surface after the contact. The insulating resin supply unit 7 stops the delivery when the supply of the insulating resin 8 reaches a predetermined amount, and retreats from this position.

絶縁性樹脂供給部７が退避したあとは図２（ｂ）で示すようにチップ１の下面には絶縁
性樹脂が供給された状態となり、そのまま速やかに実装動作に入る。実装は所定の温度に
なるよう熱を与えチップ１を回路基板に押圧する熱圧着、接合ツール３あるいはステージ
５を超音波振動させる超音波接合、あるいはこれらの組み合わせによる。 After the insulating resin supply unit 7 is retracted, the insulating resin is supplied to the lower surface of the chip 1 as shown in FIG. Mounting is performed by thermocompression that applies heat to a predetermined temperature to press the chip 1 against the circuit board, ultrasonic bonding that causes the bonding tool 3 or the stage 5 to vibrate ultrasonically, or a combination thereof.

このように、位置合わせを行った後は接合ツール３およびステージ５の静止状態を維持
したまま実装動作に入るので、駆動系のバックラッシ等に起因する位置決めの機械的誤差
を回避して実装を実行する。また絶縁性樹脂８の塗布に際して、図３（ａ）に示すように
ディスペンス用ニードルの先端を上面に向けて斜めに開口したり、図３（ｂ）のように受
け皿状の開口部を設けたり、あるいは図３（ｃ）のようにディスペンス用ニードルの先端
は封止し先端近傍の上面を開口したり、ディスペンス用ニードル７Ａの吐出口形状は絶縁
性樹脂８の物理特性に合わせて最適となるように決定する。 As described above, after the positioning is performed, the mounting operation is started while the stationary state of the welding tool 3 and the stage 5 is maintained, so that the mounting mechanical error due to the backlash of the drive system is avoided and the mounting is executed. To do. Further, when the insulating resin 8 is applied, the tip of the dispensing needle is opened obliquely toward the upper surface as shown in FIG. 3 (a), or a saucer-like opening is provided as shown in FIG. 3 (b). Alternatively, as shown in FIG. 3C, the tip of the dispensing needle is sealed and the upper surface in the vicinity of the tip is opened, or the discharge port shape of the dispensing needle 7A is optimized in accordance with the physical characteristics of the insulating resin 8. To be determined.

本発明の１実施形態の実装装置を示す側面図The side view which shows the mounting apparatus of 1 embodiment of this invention 本発明の１実施形態の実装方法を示す側面図The side view which shows the mounting method of one Embodiment of this invention 本発明の実施形態を示す斜視図The perspective view which shows embodiment of this invention 従来の技術を示す模式図Schematic diagram showing conventional technology 従来の技術を示す模式図Schematic diagram showing conventional technology 従来の技術を示す模式図Schematic diagram showing conventional technology 従来の技術を示す模式図Schematic diagram showing conventional technology 従来の技術を示す模式図Schematic diagram showing conventional technology 従来の技術を示す模式図Schematic diagram showing conventional technology 従来の技術を示す模式図Schematic diagram showing conventional technology 従来の技術を示す模式図Schematic diagram showing conventional technology 従来の技術を示す模式図Schematic diagram showing conventional technology

符号の説明Explanation of symbols

１ チップ
２ 回路基板
３ 接合ツール
４ 接合ヘッド
５ ステージ
６ 上下２視野カメラ
７ 絶縁性樹脂供給部
７Ａ ディスペンス用ニードル
８ 絶縁性樹脂
DESCRIPTION OF SYMBOLS 1 Chip 2 Circuit board 3 Joining tool 4 Joining head 5 Stage 6 Upper and lower 2 view camera 7 Insulating resin supply part 7A Dispensing needle 8 Insulating resin

Claims (4)

チップを回路基板にフェイスボンディングするフリップチップ実装方法で
あって、電極を下向きにした状態のチップを接合ツールが保持しながらステージに載置さ
れた回路基板の上方に位置しているとき、前記チップの下面に絶縁性樹脂を塗布し、その
後前記接合ツールを下降させて前記回路基板の実装位置に前記チップを実装することを特
徴とするフリップチップ実装方法。 A flip-chip mounting method in which a chip is face-bonded to a circuit board, and the chip is positioned above a circuit board placed on a stage while a bonding tool holds the chip with an electrode facing downward. A flip chip mounting method comprising: applying an insulating resin to a lower surface of the substrate, and then lowering the bonding tool to mount the chip at a mounting position of the circuit board. 前記絶縁性樹脂を塗布する前に前記チップの電極と前記回路基板の電極と
の光学的な位置合わせが行われ、前記絶縁性樹脂が塗布される時点には、前記位置合わせ
が終了した状態であることを特徴とする請求項１に記載のフリップチップ実装方法。 Before applying the insulating resin, optical alignment of the electrode of the chip and the electrode of the circuit board is performed, and when the insulating resin is applied, the alignment is completed. The flip chip mounting method according to claim 1, wherein the flip chip mounting method is provided. チップを回路基板にフェイスボンディングするフリップチップ実装装置で
あって、電極を下向きにした状態のチップを保持する接合ツールと、回路基板を載置し保
持するステージと、チップの電極と回路基板の電極との位置合わせを行う光学的な位置合
わせ手段と、絶縁性樹脂を塗布するためのディスペンス用ニードルとを備え、前記接合ツ
ールに保持されたチップが前記ステージに載置された回路基板の上方に位置しているとき
、前記ディスペンス用ニードルが前記チップに対し、下方から絶縁性樹脂を塗布すること
を特徴とするフリップチップ実装装置。 A flip chip mounting apparatus for face bonding a chip to a circuit board, a bonding tool for holding the chip with the electrodes facing downward, a stage for mounting and holding the circuit board, a chip electrode, and a circuit board electrode And an optical alignment means for performing alignment with a dispensing needle for applying an insulating resin, and a chip held by the joining tool is disposed above the circuit board placed on the stage. The flip-chip mounting apparatus according to claim 1, wherein the dispensing needle coats the chip with an insulating resin from below when positioned. 前記絶縁性樹脂を塗布する前に、前記光学的な位置合わせ手段がチップの
電極と回路基板の電極との位置合わせを行い、前記ディスペンス用ニードルが前記チップ
に対し絶縁性樹脂を供給する時点には、前記チップが前記回路基板の上方に位置合わせさ
れた状態で保持されていることを特徴とする請求項３に記載のフリップチップ実装装置。

Before applying the insulating resin, the optical alignment means aligns the electrode of the chip with the electrode of the circuit board, and when the dispensing needle supplies the insulating resin to the chip. 4. The flip chip mounting apparatus according to claim 3, wherein the chip is held in a state of being aligned above the circuit board.

JP2004102528A 2004-03-31 2004-03-31 Flip-chip bonding method and apparatus thereof Pending JP2005294296A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010016332A (en) * 2008-07-01 2010-01-21 Internatl Business Mach Corp <Ibm> Under fill process of chip level and its structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010016332A (en) * 2008-07-01 2010-01-21 Internatl Business Mach Corp <Ibm> Under fill process of chip level and its structure
EP2141738A3 (en) * 2008-07-01 2010-03-03 International Business Machines Corporation Chip-level underfill process and structures

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