JP2005250683A - マイクロコンピュータ - Google Patents

マイクロコンピュータ Download PDF

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Publication number
JP2005250683A
JP2005250683A JP2004057919A JP2004057919A JP2005250683A JP 2005250683 A JP2005250683 A JP 2005250683A JP 2004057919 A JP2004057919 A JP 2004057919A JP 2004057919 A JP2004057919 A JP 2004057919A JP 2005250683 A JP2005250683 A JP 2005250683A
Authority
JP
Japan
Prior art keywords
signal
circuit
data
transfer
enable signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004057919A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005250683A5 (enExample
Inventor
Yasunari Aragaki
康徳 新垣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2004057919A priority Critical patent/JP2005250683A/ja
Priority to US11/069,013 priority patent/US7177966B2/en
Publication of JP2005250683A publication Critical patent/JP2005250683A/ja
Publication of JP2005250683A5 publication Critical patent/JP2005250683A5/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Microcomputers (AREA)
  • Memory System (AREA)
JP2004057919A 2004-03-02 2004-03-02 マイクロコンピュータ Pending JP2005250683A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2004057919A JP2005250683A (ja) 2004-03-02 2004-03-02 マイクロコンピュータ
US11/069,013 US7177966B2 (en) 2004-03-02 2005-03-02 Microcomputer minimizing influence of bus contention

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004057919A JP2005250683A (ja) 2004-03-02 2004-03-02 マイクロコンピュータ

Publications (2)

Publication Number Publication Date
JP2005250683A true JP2005250683A (ja) 2005-09-15
JP2005250683A5 JP2005250683A5 (enExample) 2007-04-05

Family

ID=34909070

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004057919A Pending JP2005250683A (ja) 2004-03-02 2004-03-02 マイクロコンピュータ

Country Status (2)

Country Link
US (1) US7177966B2 (enExample)
JP (1) JP2005250683A (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4896450B2 (ja) 2005-06-30 2012-03-14 株式会社東芝 記憶装置
JP4908017B2 (ja) * 2006-02-28 2012-04-04 富士通株式会社 Ｄｍａデータ転送装置及びｄｍａデータ転送方法
US20080075057A1 (en) * 2006-09-25 2008-03-27 Mediatek Inc. Frequency correction burst detection
EP2455830A1 (de) * 2010-11-23 2012-05-23 Siemens Aktiengesellschaft Verfahren zur Erfassung von Eingangssignaländerungen
KR20220149220A (ko) 2021-04-30 2022-11-08 삼성전자주식회사 메모리 장치

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4106983A (en) * 1976-01-15 1978-08-15 Westinghouse Electric Corp. Thermocouple hot junction receptacle for a nuclear reactor
JPS5296836A (en) * 1976-02-10 1977-08-15 Toshiba Corp Multiplex data processing system
JPS6016664B2 (ja) * 1977-10-28 1985-04-26 豊田工機株式会社 デ−タ転送装置
US4868784A (en) * 1982-02-22 1989-09-19 Texas Instruments Incorporated Microcomputer with a multi-channel serial port having a single port address
US4959782A (en) * 1986-10-29 1990-09-25 United Technologies Corporation Access arbitration for an input-output controller
JPH0645252B2 (ja) * 1987-08-12 1994-06-15 株式会社日立製作所 ラスタスキヤン式プリンタ制御装置
JPS6476254A (en) 1987-09-18 1989-03-22 Fujitsu Ltd Device for arbitrating bus
JPH01291354A (ja) 1988-05-19 1989-11-22 Fujitsu Kiden Ltd データ転送制御装置
JPH01320564A (ja) * 1988-06-23 1989-12-26 Hitachi Ltd 並列処理装置
JP2617621B2 (ja) 1990-12-19 1997-06-04 富士通株式会社 低速／高速インタフェース回路
JP3661235B2 (ja) * 1995-08-28 2005-06-15 株式会社日立製作所 共有メモリシステム、並列型処理装置並びにメモリｌｓｉ
US5923654A (en) * 1996-04-25 1999-07-13 Compaq Computer Corp. Network switch that includes a plurality of shared packet buffers
JPH103447A (ja) * 1996-06-18 1998-01-06 Matsushita Electric Ind Co Ltd バスブリッジ装置
JP2001209609A (ja) 2000-01-25 2001-08-03 Hitachi Ltd マイクロコンピュータシステム
JP4047498B2 (ja) 1999-08-25 2008-02-13 株式会社東芝 データ処理装置
JP3843667B2 (ja) * 1999-10-15 2006-11-08 セイコーエプソン株式会社 データ転送制御装置及び電子機器
US6981073B2 (en) * 2001-07-31 2005-12-27 Wis Technologies, Inc. Multiple channel data bus control for video processing
JP2003067324A (ja) 2001-08-29 2003-03-07 Oki Electric Ind Co Ltd インタフェース回路

Also Published As

Publication number Publication date
US20050198420A1 (en) 2005-09-08
US7177966B2 (en) 2007-02-13

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