JP2005242032A - 表示装置 - Google Patents
表示装置 Download PDFInfo
- Publication number
- JP2005242032A JP2005242032A JP2004052536A JP2004052536A JP2005242032A JP 2005242032 A JP2005242032 A JP 2005242032A JP 2004052536 A JP2004052536 A JP 2004052536A JP 2004052536 A JP2004052536 A JP 2004052536A JP 2005242032 A JP2005242032 A JP 2005242032A
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- JP
- Japan
- Prior art keywords
- resin film
- protective resin
- liquid crystal
- display cell
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Liquid Crystal (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
【解決手段】
表示セル1と表示駆動用回路が実装された回路基板2とを並設し、両者をワイヤ4によって電気的に接続した表示デバイス装置である。間隔5を挟んで表示セル1側の端部に第1の保護樹脂膜61を維持形成し、その後回路基板2側から第2の保護樹脂膜62を形成し、第2の保護樹脂膜を第1の保護樹脂膜61に接触させて、表示セル1と回路基板2との間隔5に樹脂を充填させ、同時にワイヤ4のループしたに樹脂を塗布して保護樹脂膜6を形成した。
【選択図】図2
Description
前記保護樹脂膜は、表示セルの端部に塗布され且つ該端部に維持または前記液晶表示セルと前記回路基板との間隙に流れ込む第1の保護樹脂膜と、前記回路基板上に塗布され、且つ前記液晶表示セルと前記回路基板との間隙に流れ込む第2の保護樹脂膜とからなることを特徴とする表示装置である。
2・・・回路基板
3・・・支持平板
4・・・第1のワイヤ(出力側ワイヤ)
5・・・間隙
6・・・保護樹脂膜
61・・・第1の保護樹脂膜
62・・・第2の保護樹脂膜
Claims (3)
- 端部に複数の端子が形成された表示セルと、該表示セルに接続される表示駆動用回路が形成されてなる回路基板とが、前記表示セルおよび回路基板の裏面に固定される支持板とによって機械的に連結されるとともに、表示駆動用回路から前記液晶セルの端子にワイヤを介して接続され、端子および表示駆動回路を保護樹脂膜で被覆して成る表示装置において、
前記保護樹脂膜は、表示セルの端部に塗布され且つ該端部に維持または前記液晶表示セルと前記回路基板との間隙に流れ込む第1の保護樹脂膜と、前記回路基板上に塗布され、且つ前記液晶表示セルと前記回路基板との間隙に流れ込む第2の保護樹脂膜とからなることを特徴とする表示装置。 - 前記表示駆動回路は、表面に電極パッドを有する駆動用ICチップからなり、前記ワイヤの一端が該駆動用ICチップの電極パッドに、他端が前記表示セルの端子にそれぞれ接続していることを特徴とする請求項1記載の表示装置。
- 前記第1の保護樹脂膜となる硬化前の樹脂は、前記ワイヤの他端寄り端部を中心に供給されることを特徴とする請求項1乃至2記載の表示装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004052536A JP4562403B2 (ja) | 2004-02-26 | 2004-02-26 | 表示装置の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004052536A JP4562403B2 (ja) | 2004-02-26 | 2004-02-26 | 表示装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005242032A true JP2005242032A (ja) | 2005-09-08 |
JP4562403B2 JP4562403B2 (ja) | 2010-10-13 |
Family
ID=35023822
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004052536A Expired - Fee Related JP4562403B2 (ja) | 2004-02-26 | 2004-02-26 | 表示装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4562403B2 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008233701A (ja) * | 2007-03-23 | 2008-10-02 | Seiko Instruments Inc | 表示装置及び表示装置の製造方法 |
JP2012038947A (ja) * | 2010-08-09 | 2012-02-23 | Citizen Finetech Miyota Co Ltd | 電子機器の製造方法 |
JP2018173613A (ja) * | 2017-03-31 | 2018-11-08 | シチズンファインデバイス株式会社 | 画像表示装置及びその製造方法 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03261916A (ja) * | 1990-03-13 | 1991-11-21 | Semiconductor Energy Lab Co Ltd | 液晶電気光学装置の作製方法 |
JPH04111366A (ja) * | 1990-08-30 | 1992-04-13 | Kyocera Corp | 画像装置 |
JPH05144875A (ja) * | 1991-11-18 | 1993-06-11 | Sharp Corp | 配線基板の実装方法 |
JPH0943621A (ja) * | 1995-07-28 | 1997-02-14 | Kyocera Corp | 液晶表示装置の製法 |
JPH1050742A (ja) * | 1996-07-29 | 1998-02-20 | Matsushita Electric Ind Co Ltd | チップ封止用樹脂の塗布方法 |
JPH10288948A (ja) * | 1997-04-16 | 1998-10-27 | Sharp Corp | 表示装置 |
JP2000306932A (ja) * | 1999-04-21 | 2000-11-02 | Denso Corp | 半導体装置の製造方法 |
-
2004
- 2004-02-26 JP JP2004052536A patent/JP4562403B2/ja not_active Expired - Fee Related
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03261916A (ja) * | 1990-03-13 | 1991-11-21 | Semiconductor Energy Lab Co Ltd | 液晶電気光学装置の作製方法 |
JPH04111366A (ja) * | 1990-08-30 | 1992-04-13 | Kyocera Corp | 画像装置 |
JPH05144875A (ja) * | 1991-11-18 | 1993-06-11 | Sharp Corp | 配線基板の実装方法 |
JPH0943621A (ja) * | 1995-07-28 | 1997-02-14 | Kyocera Corp | 液晶表示装置の製法 |
JPH1050742A (ja) * | 1996-07-29 | 1998-02-20 | Matsushita Electric Ind Co Ltd | チップ封止用樹脂の塗布方法 |
JPH10288948A (ja) * | 1997-04-16 | 1998-10-27 | Sharp Corp | 表示装置 |
JP2000306932A (ja) * | 1999-04-21 | 2000-11-02 | Denso Corp | 半導体装置の製造方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008233701A (ja) * | 2007-03-23 | 2008-10-02 | Seiko Instruments Inc | 表示装置及び表示装置の製造方法 |
JP2012038947A (ja) * | 2010-08-09 | 2012-02-23 | Citizen Finetech Miyota Co Ltd | 電子機器の製造方法 |
JP2018173613A (ja) * | 2017-03-31 | 2018-11-08 | シチズンファインデバイス株式会社 | 画像表示装置及びその製造方法 |
Also Published As
Publication number | Publication date |
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JP4562403B2 (ja) | 2010-10-13 |
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