JP2005175261A - 基板の電子部品実装構造および方法 - Google Patents

基板の電子部品実装構造および方法 Download PDF

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Publication number
JP2005175261A
JP2005175261A JP2003414653A JP2003414653A JP2005175261A JP 2005175261 A JP2005175261 A JP 2005175261A JP 2003414653 A JP2003414653 A JP 2003414653A JP 2003414653 A JP2003414653 A JP 2003414653A JP 2005175261 A JP2005175261 A JP 2005175261A
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Japan
Prior art keywords
electronic component
substrate
underfill
terminals
conductive portion
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Pending
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JP2003414653A
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English (en)
Japanese (ja)
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JP2005175261A5 (https=
Inventor
Shigeru Mori
茂 森
Itaru Murakami
至 村上
Joshi Narui
譲司 成井
Tsuguhisa Ishii
嗣久 石井
Takaaki Saeki
高章 佐伯
Hiroshi Maekawa
浩史 前川
Satoharu Watanabe
聡治 渡辺
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Denso Ten Ltd
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Denso Ten Ltd
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Priority to JP2003414653A priority Critical patent/JP2005175261A/ja
Publication of JP2005175261A publication Critical patent/JP2005175261A/ja
Publication of JP2005175261A5 publication Critical patent/JP2005175261A5/ja
Pending legal-status Critical Current

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  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2003414653A 2003-12-12 2003-12-12 基板の電子部品実装構造および方法 Pending JP2005175261A (ja)

Priority Applications (1)

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JP2003414653A JP2005175261A (ja) 2003-12-12 2003-12-12 基板の電子部品実装構造および方法

Applications Claiming Priority (1)

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JP2003414653A JP2005175261A (ja) 2003-12-12 2003-12-12 基板の電子部品実装構造および方法

Publications (2)

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JP2005175261A true JP2005175261A (ja) 2005-06-30
JP2005175261A5 JP2005175261A5 (https=) 2007-02-01

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ID=34734385

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JP2003414653A Pending JP2005175261A (ja) 2003-12-12 2003-12-12 基板の電子部品実装構造および方法

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007258605A (ja) * 2006-03-24 2007-10-04 Toshiba Corp 部品内蔵プリント配線板、部品内蔵プリント配線板の製造方法および電子機器
WO2010038452A1 (ja) * 2008-09-30 2010-04-08 凸版印刷株式会社 リードフレーム基板とその製造方法、及び半導体装置
US7838998B2 (en) 2005-11-16 2010-11-23 Shinko Electric Industries Co., Ltd. Mounting substrate and semiconductor device
WO2012060034A1 (ja) * 2010-11-04 2012-05-10 アルプス電気株式会社 電子部品モジュール
JP2014063888A (ja) * 2012-09-21 2014-04-10 Sony Corp 半導体装置及び半導体装置の製造方法
WO2017171850A1 (en) * 2016-04-01 2017-10-05 Intel Corporation Underfilled electronic device package and manufacturing method thereof
JP2023005616A (ja) * 2021-06-29 2023-01-18 凸版印刷株式会社 配線基板

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7838998B2 (en) 2005-11-16 2010-11-23 Shinko Electric Industries Co., Ltd. Mounting substrate and semiconductor device
JP2007258605A (ja) * 2006-03-24 2007-10-04 Toshiba Corp 部品内蔵プリント配線板、部品内蔵プリント配線板の製造方法および電子機器
US8558363B2 (en) 2008-09-30 2013-10-15 Toppan Printing Co., Ltd. Lead frame substrate and method of manufacturing the same, and semiconductor device
JP2010087221A (ja) * 2008-09-30 2010-04-15 Toppan Printing Co Ltd リードフレーム型基板とその製造方法、及び半導体装置
KR20110074514A (ko) * 2008-09-30 2011-06-30 도판 인사츠 가부시키가이샤 리드 프레임 기판과 그 제조 방법, 및 반도체 장치
WO2010038452A1 (ja) * 2008-09-30 2010-04-08 凸版印刷株式会社 リードフレーム基板とその製造方法、及び半導体装置
TWI502711B (zh) * 2008-09-30 2015-10-01 凸版印刷股份有限公司 導線架基板及其製造方法與半導體裝置
KR101602982B1 (ko) 2008-09-30 2016-03-11 도판 인사츠 가부시키가이샤 리드 프레임 기판과 그 제조 방법, 및 반도체 장치
WO2012060034A1 (ja) * 2010-11-04 2012-05-10 アルプス電気株式会社 電子部品モジュール
JP5814928B2 (ja) * 2010-11-04 2015-11-17 アルプス電気株式会社 電子部品モジュール
JP2014063888A (ja) * 2012-09-21 2014-04-10 Sony Corp 半導体装置及び半導体装置の製造方法
WO2017171850A1 (en) * 2016-04-01 2017-10-05 Intel Corporation Underfilled electronic device package and manufacturing method thereof
US10672625B2 (en) 2016-04-01 2020-06-02 Intel Corporation Electronic device package with recessed substrate for underfill containment
JP2023005616A (ja) * 2021-06-29 2023-01-18 凸版印刷株式会社 配線基板
JP7815630B2 (ja) 2021-06-29 2026-02-18 Ｔｏｐｐａｎホールディングス株式会社 配線基板

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