JP2005116788A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2005116788A
JP2005116788A JP2003349377A JP2003349377A JP2005116788A JP 2005116788 A JP2005116788 A JP 2005116788A JP 2003349377 A JP2003349377 A JP 2003349377A JP 2003349377 A JP2003349377 A JP 2003349377A JP 2005116788 A JP2005116788 A JP 2005116788A
Authority
JP
Japan
Prior art keywords
interlayer insulating
insulating film
film
bonding pad
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003349377A
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English (en)
Japanese (ja)
Other versions
JP2005116788A5 (https=
Inventor
Kazuro Tomita
和朗 冨田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2003349377A priority Critical patent/JP2005116788A/ja
Publication of JP2005116788A publication Critical patent/JP2005116788A/ja
Publication of JP2005116788A5 publication Critical patent/JP2005116788A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H10W72/9232—Bond pads having multiple stacked layers with additional elements interposed between layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/981—Auxiliary members, e.g. spacers
    • H10W72/983—Reinforcing structures, e.g. collars

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
JP2003349377A 2003-10-08 2003-10-08 半導体装置 Pending JP2005116788A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003349377A JP2005116788A (ja) 2003-10-08 2003-10-08 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003349377A JP2005116788A (ja) 2003-10-08 2003-10-08 半導体装置

Publications (2)

Publication Number Publication Date
JP2005116788A true JP2005116788A (ja) 2005-04-28
JP2005116788A5 JP2005116788A5 (https=) 2006-11-24

Family

ID=34541260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003349377A Pending JP2005116788A (ja) 2003-10-08 2003-10-08 半導体装置

Country Status (1)

Country Link
JP (1) JP2005116788A (https=)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005327763A (ja) * 2004-05-12 2005-11-24 Nec Electronics Corp 半導体装置
JP2007019128A (ja) * 2005-07-06 2007-01-25 Sony Corp 半導体装置
WO2007116463A1 (ja) * 2006-03-31 2007-10-18 Fujitsu Limited 半導体装置
JP2007324332A (ja) * 2006-05-31 2007-12-13 Nec Electronics Corp 半導体装置及びその製造方法
JP2012134543A (ja) * 2012-03-08 2012-07-12 Fujitsu Ltd 半導体装置
KR101184375B1 (ko) 2010-05-10 2012-09-20 매그나칩 반도체 유한회사 패드 영역의 크랙 발생을 방지하는 반도체 장치 및 그 제조 방법
US8450796B2 (en) 2009-04-28 2013-05-28 Mitsubishi Electric Corporation Power semiconductor device
US8742584B2 (en) 2009-11-18 2014-06-03 Panasonic Corporation Semiconductor device
US11876043B2 (en) 2019-09-16 2024-01-16 Samsung Electronics Co., Ltd. Semiconductor devices having vias on a scribe lane region

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005327763A (ja) * 2004-05-12 2005-11-24 Nec Electronics Corp 半導体装置
JP2007019128A (ja) * 2005-07-06 2007-01-25 Sony Corp 半導体装置
WO2007116463A1 (ja) * 2006-03-31 2007-10-18 Fujitsu Limited 半導体装置
JP5280840B2 (ja) * 2006-03-31 2013-09-04 富士通株式会社 半導体装置
JP2007324332A (ja) * 2006-05-31 2007-12-13 Nec Electronics Corp 半導体装置及びその製造方法
US8450796B2 (en) 2009-04-28 2013-05-28 Mitsubishi Electric Corporation Power semiconductor device
US8742584B2 (en) 2009-11-18 2014-06-03 Panasonic Corporation Semiconductor device
KR101184375B1 (ko) 2010-05-10 2012-09-20 매그나칩 반도체 유한회사 패드 영역의 크랙 발생을 방지하는 반도체 장치 및 그 제조 방법
JP2012134543A (ja) * 2012-03-08 2012-07-12 Fujitsu Ltd 半導体装置
US11876043B2 (en) 2019-09-16 2024-01-16 Samsung Electronics Co., Ltd. Semiconductor devices having vias on a scribe lane region

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