JP2005037849A - 表示装置 - Google Patents
表示装置 Download PDFInfo
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- JP2005037849A JP2005037849A JP2003277191A JP2003277191A JP2005037849A JP 2005037849 A JP2005037849 A JP 2005037849A JP 2003277191 A JP2003277191 A JP 2003277191A JP 2003277191 A JP2003277191 A JP 2003277191A JP 2005037849 A JP2005037849 A JP 2005037849A
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- display device
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- tft
- switch
- signal line
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Images
Classifications
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- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Electroluminescent Light Sources (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
- Shift Register Type Memory (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
【解決手段】走査線駆動回路に、シフトレジスタと、ラッチ回路と、第1、第2のスイッチ回路と、バッファ回路を設ける。第1スイッチをラッチ回路側に閉じた状態でシフトレジスタから転送される駆動の有無をラッチ回路に記憶させ、記憶データに基づいて第2スイッチを開閉してバッファ回路の出力を制御する。第1スイッチ回路の接続をバッファ回路側に切り換え、スタートパルスとクロックを入力してシフトレジスタを動作させることにより、第2スイッチで制御されたバッファ回路を介して必要なゲート線のみを駆動し、必要でないゲート線の駆動を停止する。
【選択図】図1
Description
一方、ガラス基板上にポリシリコンTFTを形成し、画素と駆動回路を一体形成した表示装置が開発されている。ポリシリコンTFTは100〜200cm2/Vs程度の移動度が実現できるため、駆動回路の一体化が可能である。しかし、ポリシリコンTFTを形成するためには、レーザー結晶化や熱処理、ドーピングなどの工程が増加し、また、それらの装置上の制約から、アモルファスTFTほどガラス基板を大きくできず、コストが下がらないという問題があった。
また、駆動回路はシフトレジスタ201、NAND207、NOR208、バッファ用インバータ209、210より構成され、ゲート信号線G1、G2〜Gyを順に駆動していく。
ロウ電位固定となる。また、スイッチ120はスイッチ118の側に接続される。
次に、P型TFTとなる場所以外にレジストでマスクを行い、(図7(D))P型不純物のドープをおこなう。
次に再び、P型となる部分をレジストでマスクし、P型不純物をドープする。
(図8(B))
また、図11(A)に示す例ではソース信号線駆動回路1105をTFT基板1101上に実装している。この例においては、ソース信号線駆動回路1105を別なガラス基板上に形成し、画素部の横方向と同じ長さの駆動回路チップを形成し、実装している。このように、ガラス上に駆動回路チップを作ることで単結晶チップを使用するよりコストの低減が見込める。ソース信号線駆動回路の実装はガラス上に形成したチップに限定されず、従来例で示したように、単結晶チップをTFT基板1101上に実装しても良いし、FPC上に実装しても良い。
セミアモルファスTFTで画素TFTを構成する場合、アモルファスTFTに比べて、セミアモルファスTFTはオフ電流が大きいという欠点があるため、図12に示すように、画素TFTをダブルゲートとして、オフ電流を低減している。図12ではダブルゲートで記載してあるが、トリプルゲートTFT以上のマルチゲートTFTを用いても良い。
Claims (8)
- 基板上に複数の走査線と、複数の画素と、走査線駆動回路を有する表示装置において、
前記信号線駆動回路は、各信号線ごとに駆動の有無を記憶するラッチ回路と、走査線を駆動するバッファ回路を有し、前記ラッチ回路によって、前記バッファ回路を制御する手段を有することを特徴とした表示装置。 - 基板上に複数の走査線と、複数の画素と、走査線駆動回路を有する表示装置において、
前記走査線駆動回路はシフトレジスタと、第1のスイッチ回路と、第2のスイッチ回路と、ラッチ回路と、バッファ回路を有し、
前記第1のスイッチ回路は第1の切り換え信号によって制御され、前記シフトレジスタの出力を前記ラッチ回路または第2のスイッチ回路に出力し、
前記第2のスイッチは前記ラッチ回路の出力によって制御され、前記第1のスイッチの出力または接地電位を前記インバータに出力し、
前記ラッチ回路はラッチパルスによって制御され、前記第1のスイッチの出力を記憶することを特徴とした表示装置。 - 請求項1乃至請求項2のいずれか一項に記載の表示装置において、
前記表示装置は、セミアモルファスTFTによって、画素部と走査線駆動回路を基板上に一体形成していることを特徴とした表示装置。 - 請求項3に記載の表示装置において、
セミアモルファスTFTは相補型TFTであることを特徴とした表示装置。 - 請求項1乃至請求項4のいずれか一項に記載の表示装置において、
前記表示装置は液晶表示装置であることを特徴とした表示装置。 - 請求項1乃至請求項4のいずれか一項に記載の表示装置において、
前記表示装置は自発光表示装置であることを特徴とした表示装置。 - 請求項6に記載の表示装置において、
前記表示装置はEL材料を用いた表示装置であることを特徴とした表示装置。 - 請求項1乃至請求項7のいずれか一項に記載の表示装置を備える電子機器。
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