JP2004193904A - Two-port isolator and its manufacturing method and communication apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a two-port isolator capable of adjusting the central frequency of isolation and to provide its manufacturing method and a communication apparatus. <P>SOLUTION: A central electrode board 30 is formed with a first central electrode 31 in its one side and with a second central electrode 32, an input port electrode P1, an output port electrode P2, and earth electrodes 33, 34 in its other side. Further, a rectangular electrode 35 for connecting a first resister is provided in an extending manner from the input port electrode P1 in order to connect electrically an end 31a of the first central electrode 31 and a resister 23. In a similar fashion, a second rectangular electrode 36 for connecting a second resister is provided in an extending manner from the output port electrode P2 in order to connect electrically an end 32a of the second central electrode 32 and the resister 23. These electrodes 35, 36 for connecting the first and the second electrodes include a trimming portion T, respectively. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a two-port isolator, and more particularly to a method of manufacturing a two-port isolator used in a microwave band and a two-port isolator and a communication device.
[0002]
[Prior art]
Generally, an isolator has a function of passing a signal only in a transmission direction and preventing transmission in a reverse direction, and is used in a transmission circuit unit of a mobile communication device such as a car phone or a mobile phone.
[0003]
For example, as this type of isolator, a two-port isolator described in Patent Literature 1 is known. This two-port isolator is manufactured by arranging a ferrite or a capacitor for parallel matching inside a case, and then assembling a center electrode substrate or a permanent magnet on which a resistor is mounted.
[0004]
First and second center electrodes are formed on the upper and lower surfaces of the center electrode substrate, and the first center electrode and the second center electrode cross each other in an electrically insulated state. A parallel matching capacitor is electrically connected in parallel to the first and second center electrodes, respectively. Further, a resistor is electrically connected between one end of the first center electrode and one end of the second center electrode, and the other end of the first center electrode and the other end of the second center electrode are respectively grounded.
[0005]
[Patent Document 1]
JP 2001-185912 A
[0006]
[Problems to be solved by the invention]
By the way, generally, the first and second center electrodes formed on the center electrode substrate have their electrode width and electrode thickness, the relative positional relationship between the first center electrode and the second center electrode, or the first center electrode and the second center electrode. The intersection angle between the two center electrodes varies. For this reason, there is a problem that the insertion loss, the reflection loss, and the center frequency of the isolation of the two-port isolator fluctuate, and in the worst case, the desired characteristics cannot be obtained, resulting in a defective product.
[0007]
Here, the variation between the insertion loss and the reflection loss can be eliminated as follows. First, before assembling the isolator, the dimensions of the first and second center electrodes of the center electrode substrate are measured. Next, based on the measured data, a parallel matching capacitor having a capacitance suitable for combination with the center electrode substrate is selected. Thus, by combining a parallel matching capacitor having an appropriate capacitance for each center electrode substrate, variations in insertion loss and reflection loss can be suppressed, and desired characteristics can be obtained.
[0008]
However, the variation in the center frequency of the isolation cannot be eliminated by the two-port isolator of Patent Document 1. This is because the center frequency of the isolation is mainly determined by the relative positional relationship between the first center electrode and the second center electrode and the angle of intersection, and therefore, cannot be adjusted by changing the capacitance of the parallel matching capacitor. It is. For this reason, before assembling the isolator, only the center electrode substrate having the desired isolation center frequency is selected and the defective center electrode substrate is discarded to obtain a two-port isolator having desired characteristics. Was.
[0009]
Therefore, an object of the present invention is to provide a method for manufacturing a two-port isolator and a communication device, which can adjust the center frequency of the isolation.
[0010]
Means and action for solving the problem
In order to achieve the above object, a two-port isolator according to the present invention includes:
(A) a permanent magnet;
(B) a ferrite to which a DC magnetic field is applied by the permanent magnet;
(C) a first center electrode disposed close to the ferrite, one end of which is electrically connected to the first input / output port, and the other end of which is electrically connected to ground;
(D) the first center electrode intersects with the ferrite in an electrically insulated state, is disposed near the ferrite, one end is electrically connected to the second input / output port, and the other end is electrically connected to ground. A second central electrode,
(E) a resistor electrically connected between the one end of the first center electrode and the one end of the second center electrode;
(F) a first parallel capacitor electrically connected between the first input / output port and ground;
(G) a second parallel capacitor electrically connected between the second input / output port and ground;
(H) a first resistor connection electrode electrically connecting the one end of the first center electrode and the resistor;
(I) a second resistance connection electrode that electrically connects the one end of the second center electrode and the resistance;
(J) at least one of the first resistance connection electrode and the second resistance connection electrode has a trimming portion;
It is characterized by.
[0011]
The first and second center electrodes are respectively provided on the front and back surfaces of the center electrode substrate, and the trimming portions of the first and second resistance connection electrodes are provided on the same surface of the center electrode substrate. Alternatively, the first and second center electrodes are arranged on or inside the ferrite.
[0012]
With the above configuration, the center frequency of the isolation moves to the lower frequency side by trimming the trimming portion of the first resistance connection electrode or the second resistance connection electrode to reduce the electrode width. It is desirable that the electrode width of the trimming portion is larger than the width of the resistor. This is because a portion that does not overlap with the resistance is secured in the direction of the electrode width, and trimming can be performed in parallel over a predetermined length, so that the trimming operation is easily performed.
[0013]
When the insertion loss is large due to the high input / output impedance and the lack of matching, the first series capacitor is electrically connected between the first input / output port and the first input / output terminal. Preferably, a second series capacitor is electrically connected between the second input / output port and the second input / output terminal. Thereby, matching is achieved and insertion loss is improved.
[0014]
In the two-port isolator according to the present invention, a trimming hole is provided in a case surrounding the permanent magnet, the ferrite, the first and second resistance connection electrodes, the first and second center electrodes, and the resistance. Features. With the above configuration, even after assembling the two-port isolator, the trimming portions of the first resistance connection electrode and the second resistance connection electrode can be trimmed through the trimming holes.
[0015]
Further, the invention is characterized in that the resistor, the first and second parallel capacitors, and the first and second resistor connection electrodes are provided on a laminated substrate formed by stacking a plurality of dielectric layers and electrode layers. As a result, the number of soldered portions between the resistor, the first parallel capacitor, the second parallel capacitor, the first resistor connecting electrode and the second resistor connecting electrode is reduced, connection reliability is improved, and the isolator is reduced in size and size. Can be tall.
[0016]
Further, the communication device according to the present invention includes the above-described two-port isolator, thereby improving isolation characteristics and reducing manufacturing costs.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of a method for manufacturing a two-port isolator and a two-port isolator according to the present invention and a communication device will be described with reference to the accompanying drawings.
[0018]
[First Embodiment, FIGS. 1 to 5]
FIG. 1 is an exploded perspective view of a two-port lumped-constant isolator 1. The two-port isolator 1 generally includes a permanent magnet 9, a ferrite 20, capacitors for parallel matching 21 and 22, a resistor 23, a chip capacitor 24 functioning as a ground conductor (not functioning as a capacitor), and a center electrode. It comprises a substrate 30, a resin terminal case 3, a metal upper case 4, and a metal lower case 8.
[0019]
The metal lower case 8 has left and right side walls 8b and a bottom 8a. The metal lower case 8 is integrally formed with the resin terminal case 3 by an insert molding method. Two ground terminals 16 extend from a pair of opposite sides of the bottom portion 8a of the metal lower case 8, respectively. The metal upper case 4 has a rectangular shape in plan view, and has an upper portion 4a and left and right side walls 4b.
[0020]
In order to form a magnetic circuit, the metal upper case 4 and the metal lower case 8 are formed by punching and bending a thin plate mainly composed of a material having a high magnetic permeability such as iron, using a die, and then forming a magnetic circuit on the surface. It is obtained by performing copper plating and further performing silver plating.
[0021]
The resin terminal case 3 has a bottom 3a and two side portions 3b. A rectangular opening 3c is formed in the center of the bottom 3a. At a position adjacent to the opening 3c, a recess 3d for accommodating the resistor 23 is formed. The bottom 8a of the lower metal case 8 is exposed at the opening 3c. The input terminal 14 and the output terminal 15 are insert-molded in the resin terminal case 3. The input terminal 14 and the output terminal 15 have one end exposed to the outer surface of the resin terminal case 3 and the other end exposed to the bottom 3a of the resin terminal case 3 to be an input lead electrode 14a and an output lead electrode 15a. You.
[0022]
The permanent magnet 9 has a substantially rectangular parallelepiped shape. The permanent magnet 9 may be pre-magnetized into the isolator 1 or may be non-magnetized into the isolator 1 and then magnetized. The ferrite 20 has a substantially rectangular parallelepiped shape.
[0023]
The center electrode substrate 30 has a first center electrode 31 formed on a front surface, and a second center electrode 32, an input port electrode P1, an output port electrode P2, and ground electrodes 33 and 34 formed on a back surface. FIG. 2 shows the center electrode substrate 30 viewed from the back side. The center electrode substrate 30 is made of a resin such as a phenol resin, an epoxy resin, or a polyimide resin, and a base material such as paper or glass cloth. The center electrodes 31 and 32 and the port electrodes P1 and P2 are patterned by a printing method or a method of etching after plating with a conductive material (for example, copper).
[0024]
One end 31a of the first center electrode 31 formed on the front surface is electrically connected to an input port electrode P1 formed on the back surface via a through hole 41. The other end 31b of the first center electrode 31 is electrically connected via a through hole 41 to a ground electrode 33 formed on the back surface. On the other hand, one end 32a of the second center electrode 32 formed on the back surface is electrically connected to the output port electrode P2, and the other end 32b is electrically connected to the ground electrode. The first center electrode 31 and the second center electrode 32 intersect at approximately 90 degrees.
[0025]
Further, in order to electrically connect between the end 31a of the first center electrode 31 and the resistor 23, a rectangular first resistor connection electrode 35 extends from the input port electrode P1. Similarly, in order to electrically connect between the end 32a of the second center electrode 32 and the resistor 23, a rectangular second resistor connection electrode 36 extends from the output port electrode P2. Each of the first and second resistance connection electrodes 35 and 36 has a trimming portion T (a region indicated by oblique lines in FIG. 2). The electrode width W of the resistance connection electrodes 35 and 36 is constant in the length direction, and is set to be larger than the width D of the resistance 23 at the resistance connection portion. Thereby, a portion (trimming portion T) that does not overlap with the resistor 23 in the direction of the electrode width W is secured. Therefore, even after the resistor 23 is soldered to the center electrode substrate 30, the trimming portion T can be trimmed, and the trimming operation is facilitated.
[0026]
The resistor 23 has terminal electrodes formed on both ends of the substrate by thick-film printing or the like, and a resistor is disposed between them. The resistor 23 is usually soldered and mounted on the resistance connection electrodes 35 and 36 of the center electrode substrate 30 before trimming the trimming portion T, but may be soldered and mounted on the center electrode substrate 30 after trimming.
[0027]
An example of the trimming method will be described below. For example, an isolation characteristic of the center electrode substrate 30 on which the resistor 23 is soldered and mounted by a test device is measured. The trimming amount is determined from the measurement result. Next, the trimming portion T is cut in parallel with the length direction of the resistance connection electrodes 35 and 36 over a predetermined length by using a laser, a sandblaster, a luter, or the like. As a result, the center frequency of the isolation can be adjusted to a desired value (specifically, a value that matches the center frequency of the insertion loss). As a result, it is possible to reduce variations in electrode widths of the center electrodes 31 and 32, relative displacement of the center electrodes 31 and 32, or variations in the center frequency of isolation due to variations in the crossing angles of the center electrodes 31 and 32.
[0028]
As the parallel matching capacitors 21 and 22, single-plate capacitors having capacitor electrodes disposed on upper and lower surfaces are used. The chip capacitor 24 does not use the function as a capacitor, but simply uses the external electrodes 24a and 24b as connection conductors for electrically connecting the center electrodes 31 and 32 and the metal lower case 8. is there.
[0029]
The above components are assembled as follows. The parallel matching capacitors 21 and 22, the chip capacitor 24 and the ferrite 20 are accommodated in the opening 3 c of the resin terminal case 3. At this time, the external electrodes 24a and 24b of the chip capacitor 24 and the lower (cold) capacitor electrodes of the parallel matching capacitors 21 and 22 are connected to the metal lower case exposed at the opening 3c of the resin terminal case 3. 8 are respectively grounded to the bottom 8a.
[0030]
Next, the center electrode substrate 30 to which the resistor 23 is soldered is housed in the resin terminal case 3. At this time, the ferrite 20 is arranged at a position where the first center electrode 31 and the second center electrode 32 intersect in a plan view of the center electrode substrate 30. The resistor 23 is housed in the recess 3d. The input port electrode P1 is connected to the upper surface side capacitor electrode of the parallel matching capacitor 21 and the input extraction electrode 14a. The output port electrode P2 is connected to the upper surface side capacitor electrode of the parallel matching capacitor 22 and the output extraction electrode 15a. The ground electrodes 33 and 34 are connected to the external electrodes 24a and 24b of the chip capacitor 24, respectively.
[0031]
Further, a metal upper case 4 is mounted from above. Under the upper part 4a of the metal upper case 4, a permanent magnet 9 is arranged. Thus, the permanent magnet 9 applies a DC magnetic field to the ferrite 20 disposed below the center electrode substrate 30. The metal lower case 8 and the metal upper case 4 are electrically connected to form a metal case, form a magnetic circuit together with the permanent magnet 9 and the ferrite 20, and also function as a yoke.
[0032]
The electrical connection between the parallel matching capacitors 21 and 22, the chip capacitor 24, the extraction electrodes 14 a and 15 a, the metal upper case 4 and the metal lower case 8 is performed by a method such as solder reflow. Thus, a two-port isolator 1 is obtained.
[0033]
FIG. 3 is a circuit diagram for explaining the operation principle of the isolator 1, and FIG. 4 is an equivalent circuit diagram of the isolator 1. In FIG. 3, arrows indicate the direction of the high-frequency magnetic field below the center electrodes 31 and 32.
[0034]
Considering the transmission of signals in the forward direction, as shown in FIG. 3A, the high-frequency signal input from the input terminal 14 to the first center electrode 31 rotates 90 degrees in the ferrite 20. The rotated high-frequency signal propagates through the second center electrode 32 and is output from the output terminal 15. Assuming that the potential of the ground terminal 16 is 0, the potential of the input terminal 14 is + V and the potential of the output terminal 15 is + V from the direction of the high-frequency magnetic field. Therefore, since there is no potential difference between both ends of the resistor 23, no high-frequency signal flows through the resistor 23, and the high-frequency signal input from the input terminal 14 is output from the output terminal 15 as it is.
[0035]
On the other hand, considering the incidence of the signal in the opposite direction, as shown in FIG. 3B, the high-frequency signal input from the output terminal 15 to the second center electrode 32 rotates 90 degrees in the ferrite 20. The rotated high-frequency signal should propagate through the first center electrode 31 and be output from the input terminal 14. At this time, the direction of the high-frequency magnetic field is opposite to that in FIG. Since the direction of the high-frequency magnetic field is opposite to that of FIG. 3A, if the potential of the ground terminal 16 is 0, the potential of the input terminal 14 is −V. From the direction of the high-frequency magnetic field, the potential of the input terminal 14 is −V and the potential of the output terminal 15 is + V, and a potential difference of +2 V is generated at both ends of the resistor 23. For this reason, the high-frequency signal propagates through the resistor 23 and is converted into heat (power consumption) by the resistor 23, and ideally no high-frequency signal is output from the input terminal 14. Since the resistance 23 has a small reactance component, the isolation characteristic has a wide band.
[0036]
However, in practice, the electrode widths of the center electrodes 31 and 32 vary, the relative positions of the center electrodes 31 and 32 deviate, and the intersection angles of the center electrodes 31 and 32 vary. The inductance L1 of the center electrode 31 and the inductance L2 of the second center electrode 32 usually have a relationship of L1 ≠ L2.
[0037]
Further, as shown in the equivalent circuit of FIG. 4, between the input terminal 14 and the parallel matching capacitor 21, there is a residual inductance Ls 1 generated at the input terminal 14, the input port electrode P 1, and the capacitor electrode itself of the parallel matching capacitor 21. Exists. Between the input terminal 14 and the first center electrode 31, there is a residual inductance Ls2 generated in the input terminal 14 and the input port electrode P1 itself. Between the first center electrode 31 and the ground terminal 16, there is a ground electrode 33, an external electrode 24a of the chip capacitor 24, and a residual inductance Ls3 generated in the metal lower case 8 itself.
[0038]
Further, between the output terminal 15 and the parallel matching capacitor 22, there is a residual inductance Ls4 generated in the output terminal 15, the output port electrode P2, and the capacitor electrode of the parallel matching capacitor 22 itself. Between the output terminal 15 and the second center electrode 32, there is a residual inductance Ls5 generated in the output terminal 15 and the output port electrode P2 itself. Between the second center electrode 32 and the ground terminal 16, there is a ground electrode 34, an external electrode 24b of the chip capacitor 24, and a residual inductance Ls6 generated in the metal lower case 8 itself.
[0039]
The sum (Ls1 + Ls2 + Ls3) of the residual inductance on the input terminal 14 side and the sum (Ls4 + Ls5 + Ls6) of the residual inductance on the output terminal 15 side also usually have a relationship of (Ls1 + Ls2 + Ls3) ≠ (Ls4 + Ls5 + Ls6).
[0040]
For this reason, it deviates from the ideal operation described with reference to FIG. 3, and a potential difference of +2 V does not occur at both ends of the resistor 23 at a desired frequency. Therefore, the trimming portions T of the first and second resistance connection electrodes 35 and 36 are cut over a predetermined length so as to generate a potential difference of +2 V at both ends of the resistor 23, and the electrode width is reduced. As a result, the inductances L3 and L4 of the first and second resistance connection electrodes 35 and 36 are adjusted to appropriate values, respectively, and the sum of the inductances on the input terminal 14 side (L1 + L3 + Ls1 + Ls2 + Ls3) and the sum of the inductances on the output terminal 15 side ( L2 + L4 + Ls4 + Ls5 + Ls6). As a result, the center frequency of the isolation can be adjusted to a desired value, and variations in the center frequency of the isolation due to variations in the electrode width of the center electrodes 31 and 32, relative displacement, and variations in the intersection angle can be suppressed.
[0041]
This will be specifically described using numerical values. FIG. 5 is a graph showing the results of evaluating the relationship between the electrode width W of the resistance connection electrodes 35 and 36 and the respective center frequencies of the insertion loss, isolation, and input / output reflection loss of the isolator 1. At this time, a chip component having a width D of 0.3 mm, a length of 0.6 mm, and a width of the external electrodes 24a and 24b of 0.12 mm was used for the resistor 23. The resistance value R of the resistor 23 is set to a value of 91Ω at which the insertion loss becomes the best, corresponding to the parallel resonance impedance of the center electrode 31 (32) and the parallel matching capacitor 21 (22). The distance between the resistance connection electrodes 35 and 36 was set to 0.2 mm. The length of trimming (cutting) in the trimming portion T was set to 0.35 mm for both the resistance connection electrodes 35 and 36.
[0042]
When it is desired to operate the isolator 1 at 2520 MHz, the electrode width W of the resistance connection electrodes 35 and 36 is designed to be 0.6 mm thicker than before so that the center frequency of the isolation is always 2520 MHz or more. . Conventionally, the electrode width W of the resistance connection electrodes 35 and 36 was designed to be about 0.3 mm. As a result, each of the resistance connection electrodes 35 and 36 has a trimming portion T. Next, by trimming the trimming portion T and narrowing the electrode width W of the resistance connection electrodes 35 and 36, the center frequency of the isolation can be lowered to a desired center frequency of 2520 MHz.
[0043]
[Second Embodiment, FIGS. 6 and 7]
In the isolator 1 of the first embodiment, the matching may not be achieved due to the high input / output impedance of the parallel matching capacitors 21 and 22 alone. In this case, as shown in FIGS. 6 and 7, two more series-matching capacitors 25 and 26 are connected to the isolator 1 of the first embodiment.
[0044]
As the series matching capacitors 25 and 26, single plate capacitors having capacitor electrodes arranged on the upper and lower surfaces are used. The series matching capacitor 25 is connected in series between the input port electrode P1 and the input extraction electrode 14a. The series matching capacitor 26 is connected in series between the output port electrode P2 and the output extraction electrode 15a.
[0045]
The two-port isolator 1A having the above configuration can easily achieve impedance matching by changing the capacitance of the parallel matching capacitors 21 and 22 and the series matching capacitors 25 and 26, thereby improving insertion loss. be able to.
[0046]
[Third embodiment, FIG. 8]
The third embodiment describes a two-port isolator that can trim the trimming portion of the resistance connection electrode even after the assembly is completed.
[0047]
FIG. 8 is a view of the two-port isolator 1B after the assembly is completed as viewed from the bottom side. The isolator 1B is the same as the two-port isolator 1 of the first embodiment in which trimming holes 45 and 46 are provided in the bottom portion 8a of the lower metal case 8. The trimming portions T of the resistance connection electrodes 35 and 36 are exposed through the trimming holes 45 and 46.
[0048]
Therefore, the isolation characteristics of the isolator 1B after the completion of the assembly are measured, and if the isolation is out of the standard, the trimming portion T is cut through the trimming holes 45 and 46 to obtain the desired center frequency of the isolation. Can be adjusted to As a result, the number of defects can be reduced, and the manufacturing cost can be reduced.
[0049]
[Fourth embodiment, FIGS. 9 to 11]
FIG. 9 is an exploded perspective view showing another embodiment of the two-port isolator according to the present invention. The two-port isolator 51 generally includes a permanent magnet 59, a ferrite 60, a laminated substrate 70, and a metal case 54. The metal case 54 has a rectangular shape in plan view, and has four side walls 54b and an upper portion 54a.
[0050]
The ferrite 60 has a substantially rectangular parallelepiped shape, and has a first center electrode 61 and a second center electrode 62 disposed therein so as to cross each other at substantially 90 degrees in an electrically insulated state. One end of the first center electrode 61 is electrically connected to the input-side hot electrode 63, and the other end is electrically connected to the ground-side cold electrode (not shown). One end of the second center electrode 62 is electrically connected to the output side hot electrode 64, and the other end is electrically connected to the ground side cold electrode (not shown).
[0051]
The multilayer substrate 70 is a multilayer substrate formed by stacking a plurality of dielectric layers and capacitor electrode layers. Although not shown, the multilayer matching capacitor and the series matching capacitor described in the first and second embodiments are built in the laminated substrate 70. Ferrite mounting lands 71, 72, 73, 74 are provided on the upper surface of the laminated substrate 70. The ferrite lands 71 to 74 are connected to the input / output hot electrodes 63 and 64 of the ferrite 60 and the ground cold electrodes, respectively. Here, the ferrite mounting lands 71 and 72 correspond to the input port electrode P1 and the output port electrode P2, respectively.
[0052]
An input terminal 84, an output terminal 85, and four ground terminals 86 are provided on a semi-cylindrical wall surface on two opposing end surfaces of the laminated substrate 70. These terminals 84 to 86 extend on the lower surface of the laminated substrate 70 as shown in FIG. Then, on the lower surface of the laminated substrate 70, the two sets of ground terminals 86 facing each other are electrically connected by electrodes 87 and 88, respectively. However, the ground terminals 86 do not necessarily need to be electrically connected by the electrodes 87 and 88, and the four ground terminals 86 may be made independent. On the other hand, rectangular input electrodes 75 and 76 extend from the input terminal 84 and the output terminal 85 so as to face each other. Each of the resistance connection electrodes 75 and 76 has a trimming portion T (a region indicated by oblique lines in FIG. 10). The input terminal 84 and the output terminal 85 are electrically connected to ferrite mounting lands 71 and 72 via via holes and electrodes provided inside the multilayer substrate 70, respectively. Similarly, the ground terminal 86 is electrically connected to the ferrite mounting lands 73 and 74 via via holes and electrodes provided inside the laminated substrate 70.
[0053]
Further, the printed resistor 80 is formed by a method such as a screen printing method so as to straddle the two resistor connection electrodes 75 and 76.
[0054]
The above components are assembled as follows. The permanent magnet 59 and the ferrite 60 are mounted and mounted on the upper surface of the laminated substrate 70. Further, a metal case 54 is mounted thereon. Thus, a two-port isolator 51 is obtained.
[0055]
The isolator 51 is built in the multilayer substrate 70 or formed on the surface of the multilayer substrate 70 in a thin film without using individual chip components for the parallel matching capacitor, the series matching capacitor, and the resistor. Therefore, the number of soldering connection points is reduced, connection reliability is improved, and the size and height of the isolator 51 can be reduced.
[0056]
Further, since the trimming portion T of the resistance connection electrodes 75 and 76 is exposed on the bottom surface of the isolator 51, the trimming portion T can be cut even after the assembly is completed, and can be adjusted to a desired center frequency of the isolation. The laminated substrate 70 can be variously modified in accordance with the specifications of the isolator. For example, as in a laminated substrate 70A shown in FIG. It may be provided.
[0057]
[Fifth Embodiment, FIG. 12]
In the fifth embodiment, an embodiment of a communication device will be described using a mobile phone as an example.
[0058]
FIG. 12 is an electric circuit block diagram of the RF portion of the mobile phone 120. 12, reference numeral 122 denotes an antenna element; 123, a duplexer; 131, an isolator; 132, a transmission-side power amplifier; 133, a transmission-side interstage bandpass filter; 134, a transmission-side mixer; 135, a reception-side low-noise amplifier; Is a bandpass filter for inter-stage on the receiving side, 137 is a mixer on the receiving side, 138 is a voltage controlled oscillator (VCO), and 139 is a bandpass filter for local.
[0059]
Here, as the isolator 131, the isolators 1, 1A, 1B, and 51 of the first to fourth embodiments can be used. By mounting these isolators 1, 1A, 1B, 51, it is possible to realize a mobile phone with improved isolation characteristics and low manufacturing cost.
[0060]
[Other embodiments]
The present invention is not limited to the above-described embodiment, and can be changed to various configurations within the scope of the present invention. For example, although it has been described that the resin terminal case 3 and the metal lower case 8 are formed by insert molding, the present invention is not limited to this, and the resin terminal case 3 and the metal lower case 8 are formed separately. Alternatively, they may be combined. Further, in the first to fourth embodiments, the input terminal is described as 14, 84 and the output terminal is described as 15, 85. However, the present invention is not limited thereto, and the input terminal is 15, 85, and the output terminal is 14, 85. , 84.
[0061]
Further, in the above-described embodiment, the isolators in which the center electrodes 31 and 32 are formed on the front and back surfaces of the center electrode substrate 30 and the isolators in which the center electrodes 61 and 62 are formed inside the ferrite 60 have been described, but are not necessarily limited thereto. Absent. For example, an isolator may be used in which a center electrode is patterned on ferrite by a printing method or a method of etching after plating with a conductive material.
[0062]
Alternatively, an isolator using a metal material composed of two center electrodes and a common ground electrode may be used. The metal ground electrode is disposed so as to cover the lower surface of the ferrite. On the other hand, the two center electrodes are bent so as to enclose the ferrite, and are arranged so that they intersect at approximately 90 degrees on the upper surface of the ferrite with an insulating sheet interposed. The center electrode has port portions P1 and P2 on one end side, respectively, and is electrically connected to the upper-side capacitor electrode of the parallel matching capacitor by soldering.
[0063]
Alternatively, an isolator may be used in which two linear center electrodes are wound around ferrite such that the two center electrodes cross each other at approximately 90 degrees.
[0064]
【The invention's effect】
As is apparent from the above description, according to the present invention, the center frequency of the isolation can be set to a desired value by trimming the trimming portions of the first resistance connection electrode and the second resistance connection electrode to reduce the electrode width. Can be adjusted. As a result, it is possible to suppress variations in the center frequency of the isolation due to variations in the electrode width of the first and second center electrodes, relative positional deviations, and variations in the intersection angle.
[Brief description of the drawings]
FIG. 1 is an exploded perspective view showing a first embodiment of a two-port isolator according to the present invention.
FIG. 2 is a plan view of the center electrode substrate shown in FIG. 1 as viewed from the back surface side.
FIG. 3 is a circuit diagram for explaining the operation principle of the two-port isolator shown in FIG.
FIG. 4 is an equivalent circuit diagram of the two-port isolator shown in FIG.
FIG. 5 is a graph showing a result of evaluating a relationship between an electrode width W of a resistance connection electrode and respective center frequencies of insertion loss, isolation, and input / output reflection loss of an isolator.
FIG. 6 is an exploded perspective view showing a second embodiment of a two-port isolator according to the present invention.
7 is an equivalent circuit diagram of the two-port isolator shown in FIG.
FIG. 8 is a bottom view showing a third embodiment of the two-port isolator according to the present invention.
FIG. 9 is an exploded perspective view showing a fourth embodiment of a two-port isolator according to the present invention.
FIG. 10 is a plan view of the laminated substrate shown in FIG. 9 as viewed from the back surface side.
FIG. 11 is a plan view of a modified example of the laminated substrate shown in FIG. 9 as viewed from the back surface side.
FIG. 12 is a block diagram showing one embodiment of a communication device according to the present invention.
[Explanation of symbols]
1, 1A, 1B, 51 ... 2-port isolator
4, 8, 54 ... metal case
9,59… Permanent magnet
14, 15, 84, 85 ... input / output terminals
20, 60 ... ferrite
21,22 ... Capacitor for parallel matching
23,80… Resistance
25,26 ... Capacitor for series matching
30 ... Center electrode substrate
31, 32, 61, 62 ... central electrode
35, 36, 75, 76 ... electrodes for resistance connection
45, 46 ... holes for trimming work
70 ... Laminated substrate
120… mobile phone
P1 ... Input port electrode
P2: Output port electrode
T: Trimming part

Claims (9)

A permanent magnet,
A ferrite to which a DC magnetic field is applied by the permanent magnet;
A first center electrode disposed close to the ferrite, one end of which is electrically connected to the first input / output port, and the other end of which is electrically connected to ground;
The first center electrode intersects with the ferrite in an electrically insulated state, is disposed near the ferrite, one end is electrically connected to the second input / output port, and the other end is electrically connected to ground. Two center electrodes,
A resistor electrically connected between the one end of the first center electrode and the one end of the second center electrode;
A first parallel capacitor electrically connected between the first input / output port and ground;
A second parallel capacitor electrically connected between the second input / output port and ground;
A first resistor connection electrode electrically connecting the one end of the first center electrode and the resistor;
A second resistor connection electrode that electrically connects the one end of the second center electrode and the resistor,
At least one of the first resistance connection electrode and the second resistance connection electrode has a trimming portion,
A two-port isolator characterized by: 2. The two-port isolator according to claim 1, wherein an electrode width of the first resistance connection electrode and the second resistance connection electrode is larger than a width of the resistance at a resistance connection part. 3. A first input / output terminal and a second input / output terminal;
A first series capacitor electrically connected between the first input / output port and the first input / output terminal;
A second series capacitor electrically connected between the second input / output port and the second input / output terminal;
The two-port isolator according to claim 1 or 2, further comprising: A case surrounding the permanent magnet, the ferrite, the first and second resistance connection electrodes, the first and second center electrodes, and the resistance is provided, and a trimming work hole is provided in the case. The two-port isolator according to claim 1. The first and second center electrodes are provided on the front and back surfaces of a center electrode substrate, respectively, and the trimming portions of the first and second resistance connection electrodes are provided on the same surface of the center electrode substrate. The two-port isolator according to claim 1. The two-port isolator according to any one of claims 1 to 4, wherein the first and second center electrodes are disposed on or inside the ferrite. The resistor, the first and second parallel capacitors, and the first and second resistor connection electrodes are provided on a laminated substrate formed by stacking a plurality of dielectric layers and electrode layers. The two-port isolator according to claim 1. 8. The two-port isolator according to claim 1, wherein the trimming portion is trimmed in parallel over a predetermined length to adjust a center frequency of the isolation to a desired value. Manufacturing method of port type isolator. A communication device comprising the two-port isolator according to claim 1.

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