JP4192883B2 - Two-port nonreciprocal circuit device and communication device - Google Patents

Two-port nonreciprocal circuit device and communication device Download PDF

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JP4192883B2
JP4192883B2 JP2004319475A JP2004319475A JP4192883B2 JP 4192883 B2 JP4192883 B2 JP 4192883B2 JP 2004319475 A JP2004319475 A JP 2004319475A JP 2004319475 A JP2004319475 A JP 2004319475A JP 4192883 B2 JP4192883 B2 JP 4192883B2
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JP2006135419A (en
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崇 川浪
真一 米田
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Murata Manufacturing Co Ltd
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Description

本発明は、2ポート型非可逆回路素子、特に、マイクロ波帯で使用されるアイソレータなどの2ポート型非可逆回路素子および通信装置に関する。   The present invention relates to a two-port nonreciprocal circuit device, and more particularly to a two-port nonreciprocal circuit device such as an isolator used in a microwave band and a communication device.

例えば、この種の2ポート型非可逆回路素子として、特許文献1には、中心電極組立体を水平方向に横置き配置した2ポート型アイソレータが開示されている。この中心電極組立体は、フェライトの一方の主面に中心電極および絶縁膜が印刷により形成され、中心電極の端部にはフェライトの側面を経由して他方の主面に接続電極が形成されている。   For example, as this type of two-port nonreciprocal circuit device, Patent Document 1 discloses a two-port isolator in which a center electrode assembly is horizontally disposed in a horizontal direction. In this center electrode assembly, a center electrode and an insulating film are formed by printing on one main surface of the ferrite, and a connection electrode is formed on the other main surface via the side surface of the ferrite at the end of the center electrode. Yes.

このアイソレータの組立において、中心電極組立体はフェライトの他方の主面に形成された接続電極を他の部品にはんだ付けして接合する。また、フェライトの一方の主面に形成された中心電極は、挿入損失を小さくするため、Agの比率を高くした導電率の高い組成の材料からなることが好ましい。   In assembling this isolator, the center electrode assembly solders and connects the connection electrode formed on the other main surface of the ferrite to other components. In addition, the center electrode formed on one main surface of the ferrite is preferably made of a material having a high conductivity and a high Ag ratio in order to reduce insertion loss.

ところで、近年、非可逆回路素子の小型化のために中心電極組立体を垂直方向に縦置きした構造のものが考えられている。しかし、中心電極組立体を垂直方向に縦置き配置すると、フェライトの一方の主面に形成された中心電極にはんだが接触してしまう。そのため、Agの比率が高い中心電極は、はんだ付けの際にAg喰われが生じ、挿入損失増加や電極切断などの不具合が発生してしまうという問題があった。   By the way, in recent years, in order to reduce the size of the nonreciprocal circuit element, a structure in which the center electrode assembly is vertically arranged in the vertical direction has been considered. However, when the center electrode assembly is vertically arranged in the vertical direction, the solder comes into contact with the center electrode formed on one main surface of the ferrite. For this reason, the central electrode having a high Ag ratio has a problem that Ag erosion occurs during soldering, causing problems such as increased insertion loss and electrode cutting.

なお、特許文献2には、中心電極組立体を積層基板上に垂直方向に縦置き配置した2ポート型アイソレータが開示されている。しかし、特許文献2の中心電極は印刷により形成されたものではなく、絶縁被覆導線をフェライトに巻回したものであり、上記不具合は発生しない。
特開2002−76711号公報 特開2002−26615号公報
Patent Document 2 discloses a two-port isolator in which a center electrode assembly is vertically arranged on a multilayer substrate. However, the center electrode of Patent Document 2 is not formed by printing, but is obtained by winding an insulation-coated conductive wire around ferrite, and the above-described problem does not occur.
JP 2002-76711 A JP 2002-26615 A

そこで、本発明の目的は、中心電極組立体を垂直方向に縦置き配置した構造の2ポート型非可逆回路素子において、フェライトの主面に形成された中心電極のAg喰われが生じない2ポート型非可逆回路素子および通信装置を提供することにある。   Accordingly, an object of the present invention is to provide a 2-port non-reciprocal circuit element having a structure in which a center electrode assembly is vertically arranged in a vertical direction, and a 2-port which does not cause Ag erosion of the center electrode formed on the main surface of ferrite. An object of the present invention is to provide a type nonreciprocal circuit device and a communication device.

前記目的を達成するため、本発明に係る2ポート型非可逆回路素子は、永久磁石と、該永久磁石により直流磁界が印加されるフェライトと、該フェライトに配置された導体膜からなる二つの中心電極と、表面に端子電極が形成された回路基板と、を備えた2ポート型非可逆回路素子であって、
フェライトは直方体形状をなし、Agを主成分とした二つの中心電極が絶縁膜によって互いに絶縁された状態で交差してフェライトの両主面に形成され、
両主面と直交する一側面に中心電極に接続された接続用電極が形成され、
中心電極の全面を覆うようにフェライトの両主面に絶縁膜が形成されており、
フェライトは両主面と直交する一側面にて回路基板上に載置されていること、
を特徴とする。
In order to achieve the above object, a two-port nonreciprocal circuit device according to the present invention comprises a permanent magnet, a ferrite to which a DC magnetic field is applied by the permanent magnet, and two centers comprising a conductor film disposed on the ferrite. A two-port nonreciprocal circuit device comprising: an electrode; and a circuit board having a terminal electrode formed on a surface thereof,
The ferrite has a rectangular parallelepiped shape, and the two central electrodes mainly composed of Ag intersect with each other while being insulated from each other by the insulating film, and are formed on both main surfaces of the ferrite.
A connection electrode connected to the center electrode is formed on one side surface orthogonal to both main surfaces,
An insulating film is formed on both main surfaces of the ferrite so as to cover the entire surface of the center electrode,
Ferrite is placed on the circuit board on one side perpendicular to both main surfaces,
It is characterized by.

以上の構成により、フェライトの両主面に形成されている中心電極は絶縁膜にて覆われ、露出していない。従って、はんだによってフェライトを回路基板上に接合する際、はんだがフェライトの両主面に回り込んでも、フェライトの両主面に形成されている中心電極にはんだが接触することがなく、中心電極のAg喰われが発生しない。   With the above configuration, the center electrode formed on both main surfaces of the ferrite is covered with the insulating film and is not exposed. Therefore, when the ferrite is joined to the circuit board by the solder, the solder does not come into contact with the central electrodes formed on the two main surfaces of the ferrite even if the solder wraps around the two main surfaces of the ferrite. Ag erosion does not occur.

本発明に係る2ポート型非可逆回路素子において、絶縁膜はフェライトの両主面の全面に形成されていてもよい。また、接続用電極を絶縁膜上またはフェライトの絶縁膜が形成されていない主面部分に回り込むように形成することにより、フェライトと回路基板の間に、はんだフィレットを形成させて両者の接合強度を高め、かつ、中心電極のAg喰われが発生しない構造が得られる。   In the two-port nonreciprocal circuit device according to the present invention, the insulating film may be formed on the entire surface of both main surfaces of the ferrite. In addition, by forming the connection electrode on the insulating film or around the main surface where the ferrite insulating film is not formed, a solder fillet is formed between the ferrite and the circuit board to increase the bonding strength between the two. And a structure in which Ag erosion of the center electrode does not occur is obtained.

また、本発明に係る通信装置は前記2ポート型非可逆回路素子を備えたものであり、電気特性に優れた信頼性の高いものとなる。   Further, the communication device according to the present invention includes the two-port nonreciprocal circuit element, and has excellent electrical characteristics and high reliability.

本発明によれば、フェライトの両主面に形成されている中心電極は絶縁膜にて覆われ、露出していないので、はんだによってフェライトを回路基板上に接合する際、はんだがフェライトの両主面に回り込んでも、フェライトの両主面に形成されている中心電極にはんだが接触することがなく、中心電極のAg喰われが発生しない。この結果、Ag喰われによる挿入損失増加や電極切断などの不具合が発生しない、特性の安定した非可逆回路素子が得られる。   According to the present invention, the center electrode formed on both main surfaces of the ferrite is covered with the insulating film and is not exposed. Therefore, when the ferrite is joined to the circuit board by the solder, the solder is the two main electrodes of the ferrite. Even if it goes around the surface, the solder does not come into contact with the center electrode formed on both main surfaces of the ferrite, and Ag biting of the center electrode does not occur. As a result, a non-reciprocal circuit element having stable characteristics can be obtained in which problems such as increased insertion loss due to Ag erosion and electrode disconnection do not occur.

以下、本発明に係る2ポート型非可逆回路素子および通信装置の実施例について添付図面を参照して説明する。   Embodiments of a two-port nonreciprocal circuit device and a communication device according to the present invention will be described below with reference to the accompanying drawings.

[第1実施例、図1〜図7]
本発明に係る2ポート型非可逆回路素子の一実施例の外観図を図1に示し、平面図を図2に示し、分解斜視図を図3に示す。この2ポート型アイソレータ1は、集中定数型アイソレータであり、概略、金属製ヨーク10と、回路基板20と、フェライト31を含む中心電極組立体30と、フェライト31に直流磁界を印加するための永久磁石41,41とで形成されている。図1はこのアイソレータ1が基板50上に実装されている状態を示している。
[First embodiment, FIGS. 1 to 7]
FIG. 1 is an external view of an embodiment of a two-port nonreciprocal circuit device according to the present invention, FIG. 2 is a plan view, and FIG. 3 is an exploded perspective view. This two-port isolator 1 is a lumped constant isolator, which is roughly a metal yoke 10, a circuit board 20, a center electrode assembly 30 including a ferrite 31, and a permanent magnet for applying a DC magnetic field to the ferrite 31. It is formed with magnets 41 and 41. FIG. 1 shows a state where the isolator 1 is mounted on a substrate 50.

ヨーク10は軟鉄などの強磁性体材料からなり、銀めっきが施され、回路基板20上で中心電極組立体30と永久磁石41,41を囲む枠体形状とされている。   The yoke 10 is made of a ferromagnetic material such as soft iron, is silver-plated, and has a frame shape surrounding the center electrode assembly 30 and the permanent magnets 41 and 41 on the circuit board 20.

中心電極組立体30は、図4に示すように、マイクロ波フェライト31の主面31a,31bに互いに電気的に絶縁された第1中心電極35及び第2中心電極36を形成したものである。ここで、フェライト31は互いに平行な第1主面31a及び第2主面31bを有する直方体形状をなし、第1主面31a及び第2主面31bはその短辺寸法と長辺寸法との比(以下、形状比と称する)が1:1.5〜5であり、かつ、回路基板20上に第1主面31a及び第2主面31bが略垂直方向に配置されている。本明細書では、主面31a,31bの長辺と接する面を側面31c,31d、短辺と接する面を端面31e,31fと称する。   As shown in FIG. 4, the center electrode assembly 30 is formed by forming a first center electrode 35 and a second center electrode 36 that are electrically insulated from each other on main surfaces 31 a and 31 b of the microwave ferrite 31. Here, the ferrite 31 has a rectangular parallelepiped shape having a first main surface 31a and a second main surface 31b that are parallel to each other, and the first main surface 31a and the second main surface 31b have a ratio of the short side dimension to the long side dimension. (Hereinafter referred to as the shape ratio) is 1: 1.5 to 5 and the first main surface 31a and the second main surface 31b are arranged on the circuit board 20 in a substantially vertical direction. In this specification, the surfaces in contact with the long sides of the main surfaces 31a and 31b are referred to as side surfaces 31c and 31d, and the surfaces in contact with the short sides are referred to as end surfaces 31e and 31f.

また、永久磁石41,41はフェライト31の主面31a,31bに対して磁界を略垂直方向に印加するように回路基板20上に配置されている。   The permanent magnets 41 and 41 are disposed on the circuit board 20 so as to apply a magnetic field in a substantially vertical direction to the main surfaces 31 a and 31 b of the ferrite 31.

図4に示すように、第1中心電極35はフェライト31の第1主面31aにおいて2本に分岐した状態で左下から右上に長辺に対して比較的小さな角度で傾斜して形成され、側面31c上の接続用電極35aを介して第2主面31bに回り込み、第2主面31bにおいて2本に分岐した状態で左下に長辺に対して比較的小さな角度で傾斜して形成されている。   As shown in FIG. 4, the first center electrode 35 is formed to be inclined at a relatively small angle with respect to the long side from the lower left to the upper right in a state where the first central electrode 35 is branched into two on the first main surface 31 a of the ferrite 31. The second main surface 31b is formed so as to be inclined at a relatively small angle with respect to the long side at the lower left in a state where the second main surface 31b branches into two via the connection electrode 35a on 31c. .

第2中心電極36は、まず、0.5ターン目36aが第1主面31aにおいて右下から左上方に長辺に対して比較的大きな角度で傾斜して第1中心電極35と交差した状態で形成され、側面31c上の接続用電極36bを介して第2主面31bに回り込み、この1ターン目36cが第2主面31bにおいて左方に長辺に対して比較的大きな角度で傾斜して第1中心電極35と交差した状態で形成されている。1ターン目36cの下端部は側面31dの接続用電極36dを介して第1主面31aに回り込み、この1.5ターン目36eが第1主面31aにおいて0.5ターン目36aと平行に第1中心電極35と交差した状態で形成され、側面31c上の接続用電極36fを介して第2主面31bに回り込んでいる。この2ターン目36gも第2主面31bにおいて1ターン目36cと平行に第1中心電極35と交差した状態で形成され、側面31dの接続用電極36hに接続されている。   First, the second center electrode 36 is in a state in which the 0.5th turn 36a intersects the first center electrode 35 at a relatively large angle with respect to the long side from the lower right to the upper left on the first main surface 31a. The first turn 36c is inclined leftward at a relatively large angle with respect to the long side on the second main surface 31b via the connection electrode 36b on the side surface 31c. The first central electrode 35 is formed so as to intersect with the first central electrode 35. The lower end of the first turn 36c goes around the first main surface 31a via the connection electrode 36d on the side surface 31d, and the 1.5th turn 36e is parallel to the 0.5th turn 36a on the first main surface 31a. The first center electrode 35 is formed so as to intersect with the second main surface 31b via the connection electrode 36f on the side surface 31c. The second turn 36g is also formed on the second main surface 31b so as to intersect the first center electrode 35 in parallel with the first turn 36c, and is connected to the connection electrode 36h on the side surface 31d.

また、第2中心電極36の2ターン目36gは第2主面31bにおいて第1中心電極35の他端と接続されている。   The second turn 36g of the second center electrode 36 is connected to the other end of the first center electrode 35 on the second main surface 31b.

即ち、第2中心電極36はフェライト31に螺旋状に2ターン巻回されていることになる。ここで、ターン数とは、中心電極36が第1又は第2主面31a,31bをそれぞれ1回横断した状態を0.5ターンとして計算している。そして、中心電極35,36の交差角は必要に応じて設定され、入力インピーダンスや挿入損失が調整されることになる。   That is, the second center electrode 36 is wound around the ferrite 31 in a spiral manner for two turns. Here, the number of turns is calculated by assuming that the state in which the center electrode 36 crosses the first or second main surface 31a, 31b once each is 0.5 turns. The crossing angle of the center electrodes 35 and 36 is set as necessary, and the input impedance and insertion loss are adjusted.

回路基板20は、複数枚の誘電体シート上に所定の電極を形成して積層し、焼結した積層型基板であり、その内部には、図4に示すように、整合用コンデンサC1,C2、終端抵抗Rが内蔵されている。また、上面には端子電極25a〜25fが、下面には外部接続用端子電極26,27,28がそれぞれ形成されている。   The circuit board 20 is a laminated board in which predetermined electrodes are formed on a plurality of dielectric sheets, laminated, and sintered. Inside the circuit board 20, as shown in FIG. 4, matching capacitors C1, C2 The termination resistor R is built in. Terminal electrodes 25a to 25f are formed on the upper surface, and external connection terminal electrodes 26, 27, and 28 are formed on the lower surface, respectively.

これらの整合用回路素子と前記第1及び第2中心電極35,36との接続関係を図4及び図5の等価回路を参照して説明する。即ち、回路基板20の下面に形成された外部接続用端子電極26が入力ポートP1として機能し、この電極26は整合用コンデンサC1と終端抵抗Rとの接続点21aに接続されている。また、この接続点21aは回路基板20の上面に形成された端子電極25b及びフェライト31の側面31dに形成された接続用電極35bを介して第1中心電極35の一端に接続されている。   The connection relationship between these matching circuit elements and the first and second center electrodes 35 and 36 will be described with reference to the equivalent circuits of FIGS. That is, the external connection terminal electrode 26 formed on the lower surface of the circuit board 20 functions as the input port P1, and this electrode 26 is connected to the connection point 21a between the matching capacitor C1 and the termination resistor R. The connection point 21 a is connected to one end of the first center electrode 35 through a terminal electrode 25 b formed on the upper surface of the circuit board 20 and a connection electrode 35 b formed on the side surface 31 d of the ferrite 31.

第1中心電極35の他端はフェライト31の側面31dに形成された接続用電極35c及び回路基板20の上面に形成された端子電極25cを介して終端抵抗Rに接続されている。また、第1中心電極35の他端35dはフェライト31の側面31dに形成された接続用電極36h及び回路基板20の上面に形成された端子電極25dを介して整合用コンデンサC1,C2の接続点21bに接続されている。   The other end of the first center electrode 35 is connected to the termination resistor R via a connection electrode 35 c formed on the side surface 31 d of the ferrite 31 and a terminal electrode 25 c formed on the upper surface of the circuit board 20. The other end 35d of the first center electrode 35 is a connection point between the matching capacitors C1 and C2 via the connection electrode 36h formed on the side surface 31d of the ferrite 31 and the terminal electrode 25d formed on the upper surface of the circuit board 20. 21b.

一方、回路基板20の下面に形成された外部接続用端子電極27が出力ポートP2として機能し、この電極27は前記接続点21bに接続されている。   On the other hand, the external connection terminal electrode 27 formed on the lower surface of the circuit board 20 functions as the output port P2, and this electrode 27 is connected to the connection point 21b.

第2中心電極36の一端接続用電極36i(フェライト31の側面31dに形成されている)は回路基板20の上面に形成された端子電極25eを介して整合用コンデンサC2の接続点21cに接続されている。接続点21cは回路基板20の下面に形成された外部接続用端子電極28と接続されている。この外部接続用電極28は接地ポートP3として機能するものである。また、この外部接続用電極28は、回路基板20の上面に形成された端子電極25a,25fを介して前記ヨーク10にも接続されている。   The one end connection electrode 36i (formed on the side surface 31d of the ferrite 31) of the second center electrode 36 is connected to the connection point 21c of the matching capacitor C2 via the terminal electrode 25e formed on the upper surface of the circuit board 20. ing. The connection point 21 c is connected to an external connection terminal electrode 28 formed on the lower surface of the circuit board 20. The external connection electrode 28 functions as the ground port P3. The external connection electrode 28 is also connected to the yoke 10 via terminal electrodes 25 a and 25 f formed on the upper surface of the circuit board 20.

回路基板20とヨーク10とは端子電極25a,25fを介してはんだ付けされて一体化され、中心電極組立体30はフェライト31の側面31dの各種接続用電極が回路基板20上の端子電極25b〜25eとはんだ付けされて一体化される。また、永久磁石41,41はヨーク10の内壁に接着剤にて一体化される。   The circuit board 20 and the yoke 10 are integrated by soldering via terminal electrodes 25a and 25f, and the center electrode assembly 30 has various connection electrodes on the side surface 31d of the ferrite 31 connected to the terminal electrodes 25b to 25b on the circuit board 20. 25e is soldered and integrated. The permanent magnets 41 and 41 are integrated with the inner wall of the yoke 10 with an adhesive.

より詳細に中心電極組立体30と回路基板20の接合について説明する。図6に示すように、フェライト31の主面31a,31b上には、導体膜からなる第1中心電極35、絶縁体膜37、導体膜からなる第2中心電極36、絶縁体膜38が成膜されている。また、フェライト31の上側面31c及び下側面31dには各種接続用電極が導体厚膜によって形成されている。   The joining of the center electrode assembly 30 and the circuit board 20 will be described in more detail. As shown in FIG. 6, on the main surfaces 31a and 31b of the ferrite 31, a first center electrode 35 made of a conductor film, an insulator film 37, a second center electrode 36 made of a conductor film, and an insulator film 38 are formed. It is a membrane. Further, various connection electrodes are formed on the upper side surface 31c and the lower side surface 31d of the ferrite 31 by a thick conductor film.

中心電極35,36は、フェライト31の主面31a,31bに、主成分であるAgの比率が高い電極膜材料にて、印刷や転写により厚膜として形成されている。あるいは、これらの電極膜材料と感光物質とを混合してフォトリソグラフ、エッチングなどの加工技術を用いて、所定の形状に形成してもよい。   The center electrodes 35 and 36 are formed on the main surfaces 31a and 31b of the ferrite 31 as a thick film by printing or transfer using an electrode film material having a high ratio of Ag as a main component. Alternatively, these electrode film materials and a photosensitive material may be mixed and formed into a predetermined shape using a processing technique such as photolithography or etching.

絶縁体膜37,38は、ガラス粉を焼結したもの、エポキシ樹脂などの有機物質膜、ガラス布とエポキシ樹脂などの有機物質膜を組み合わせたものなどを、印刷や転写によりフェライト31の主面31a,31bの全面に厚膜として形成されている。あるいは、これらの材料と感光物質とを混合してフォトリソグラフ、エッチングなどの加工技術を用いて、フェライト31の主面31a,31bの全面に厚膜として形成してもよい。   The insulator films 37 and 38 are made of a sintered glass powder, an organic material film such as an epoxy resin, a combination of a glass cloth and an organic material film such as an epoxy resin, etc. A thick film is formed on the entire surface of 31a and 31b. Alternatively, these materials and a photosensitive material may be mixed and formed as a thick film on the entire main surfaces 31a and 31b of the ferrite 31 using a processing technique such as photolithography or etching.

中心電極35,36の導体膜と絶縁体膜37,38は必要に応じて、それぞれ1層以上設け、場合によっては絶縁体膜37,38に形成した孔(ビアホール)を経由して異なる層の導体膜どうしを接続してもよい。   One or more conductor films and insulator films 37 and 38 of the center electrodes 35 and 36 are provided as necessary, and in some cases, different layers are formed via holes (via holes) formed in the insulator films 37 and 38. You may connect conductor films.

各種接続用電極は、Agを主成分とする電極膜材料にガラスを添加した材料にて、印刷や転写により厚膜として形成されている。あるいは、これらの電極膜材料と感光物質とを混合してフォトリソグラフ、エッチングなどの加工技術を用いて、所定の形状に形成してもよい。   The various connection electrodes are formed as a thick film by printing or transfer using a material in which glass is added to an electrode film material containing Ag as a main component. Alternatively, the electrode film material and the photosensitive material may be mixed and formed into a predetermined shape using a processing technique such as photolithography or etching.

なお、中心電極組立体30を量産する際には、フェライト母基板の主面上に導体膜からなる第1中心電極35、絶縁体膜37、導体膜からなる第2中心電極36、絶縁体膜38を厚膜印刷などの工法で積層する。この後、前記厚膜付きフェライト母基板をダイシングなどの工法により所望のサイズのフェライトチップに切断する。この後、フェライトチップの側面に各種接続用電極を厚膜印刷などの工法で形成する。   When mass production of the center electrode assembly 30 is performed, the first center electrode 35 made of a conductor film, the insulator film 37, the second center electrode 36 made of a conductor film, the insulator film on the main surface of the ferrite mother substrate. 38 are laminated by a method such as thick film printing. Thereafter, the ferrite mother substrate with a thick film is cut into ferrite chips of a desired size by a method such as dicing. Thereafter, various connection electrodes are formed on the side surface of the ferrite chip by a method such as thick film printing.

フェライト31の下側面31dに形成した各種接続用電極35b,35c,36d,36h,36iは、図6に示すように、回路基板20の上面に形成した端子電極25b〜25eに、例えば、はんだ23によって接合される。   As shown in FIG. 6, various connection electrodes 35b, 35c, 36d, 36h, 36i formed on the lower surface 31d of the ferrite 31 are connected to terminal electrodes 25b-25e formed on the upper surface of the circuit board 20, for example, solder 23 Joined by.

以上の構成からなる2ポート型アイソレータ1において、フェライト31は回路基板20上に主面31a,31bが略垂直方向に配置され、かつ、永久磁石41,41はフェライト31の主面31a,31bに対して磁界を該主面31a,31bに略垂直方向に印加するように回路基板20上に配置されているため、換言すれば、フェライト31と永久磁石41,41は回路基板20上に垂直方向に縦置き配置されているため、大きな磁界を得るために永久磁石41,41を厚くしても該厚みに拘わらず背が高くなることはなく、小型化が達成される。   In the two-port isolator 1 configured as described above, the ferrite 31 has principal surfaces 31 a and 31 b arranged on the circuit board 20 in a substantially vertical direction, and the permanent magnets 41 and 41 are arranged on the principal surfaces 31 a and 31 b of the ferrite 31. On the other hand, since the magnetic field is arranged on the circuit board 20 so as to be applied to the main surfaces 31a and 31b in a substantially vertical direction, in other words, the ferrite 31 and the permanent magnets 41 and 41 are arranged on the circuit board 20 in the vertical direction. Therefore, even if the permanent magnets 41 and 41 are thickened in order to obtain a large magnetic field, the height does not increase regardless of the thickness, and downsizing is achieved.

そして、フェライト31の両主面31a,31bに形成されている中心電極35,36は絶縁体膜38にて覆われ、露出していないので、はんだ23によってフェライト31を回路基板20上に接合する際、はんだ23がフェライト31の両主面31a,31bに回り込んでも、中心電極35,36にはんだ23が接触することがなく、中心電極35,36のAg喰われが発生しない。この結果、Ag喰われによる挿入損失増加や電極切断などの不具合が発生しない、特性の安定した2ポート型アイソレータ1が得られる。   Since the central electrodes 35 and 36 formed on both main surfaces 31 a and 31 b of the ferrite 31 are covered with the insulator film 38 and are not exposed, the ferrite 31 is joined onto the circuit board 20 by the solder 23. At this time, even if the solder 23 wraps around both the main surfaces 31 a and 31 b of the ferrite 31, the solder 23 does not contact the center electrodes 35 and 36, and Ag biting of the center electrodes 35 and 36 does not occur. As a result, the two-port isolator 1 with stable characteristics is obtained, in which there are no problems such as increased insertion loss due to Ag erosion and electrode cutting.

さらに、Ag喰われのおそれがないので、中心電極35,36に用いる材料としてはガラスフリット含有量の極めて少ない(10%以下)銀粉などを用いることができる。このような材料は電気伝導性が純銀に近いので、極めて入力損失の少ないアイソレータを得ることができる。   Furthermore, since there is no possibility of Ag erosion, silver powder or the like having an extremely low glass frit content (10% or less) can be used as the material used for the center electrodes 35 and 36. Since such a material has an electrical conductivity close to that of pure silver, an isolator with extremely low input loss can be obtained.

また、この2ポート型アイソレータ1にあっては、図7に示すように、フェライト31の回路基板20に対する実装面側に設けた各種接続用電極35b,35c,36d,36h,36iをフェライト31の主面31a,31b側の絶縁体膜38上に回り込むように形成することにより、中心電極組立体30と回路基板20の間に、はんだフィレット23aを形成させて両者の接合強度を高め、かつ、中心電極35,36のAg喰われが発生しない構造が得られる。   In the two-port isolator 1, as shown in FIG. 7, various connection electrodes 35 b, 35 c, 36 d, 36 h, 36 i provided on the mounting surface side of the ferrite 31 with respect to the circuit board 20 are connected to the ferrite 31. By forming so as to wrap around the insulator film 38 on the main surfaces 31a, 31b side, a solder fillet 23a is formed between the center electrode assembly 30 and the circuit board 20 to increase the joint strength between them, and A structure in which Ag erosion of the center electrodes 35 and 36 does not occur is obtained.

以上説明した第1実施例において、絶縁体膜37,38はフェライト31の主面31a,31bの全面に形成されている。しかし、必ずしも主面31a,31bの全面に形成する必要はなく、少なくとも中心電極35,36の全面を覆うように形成されていればよい。この場合、図7に示した接続用電極35b,35c,36d,36h,36iの一部は、絶縁体膜37,38が形成されていないフェライト31の主面部分に回り込むように形成されていてもよい。   In the first embodiment described above, the insulator films 37 and 38 are formed on the entire main surfaces 31 a and 31 b of the ferrite 31. However, it is not always necessary to form the entire surface of the main surfaces 31a and 31b, as long as at least the entire surfaces of the center electrodes 35 and 36 are covered. In this case, a part of the connection electrodes 35b, 35c, 36d, 36h, 36i shown in FIG. 7 is formed so as to wrap around the main surface portion of the ferrite 31 where the insulator films 37, 38 are not formed. Also good.

[第2実施例、図8]
次に、本発明に係る通信装置として、携帯電話を例にして説明する。
[Second Embodiment, FIG. 8]
Next, a mobile phone will be described as an example of the communication device according to the present invention.

図8は携帯電話220のRF部分の電気回路ブロック図である。図8において、222はアンテナ素子、223はデュプレクサ、231は送信側アイソレータ、232は送信側増幅器、233は送信側段間用帯域通過フィルタ、234は送信側ミキサ、235は受信側増幅器、236は受信側段間用帯域通過フィルタ、237は受信側ミキサ、238は電圧制御発振器(VCO)、239はローカル用帯域通過フィルタである。   FIG. 8 is an electric circuit block diagram of the RF portion of the mobile phone 220. In FIG. 8, 222 is an antenna element, 223 is a duplexer, 231 is a transmission side isolator, 232 is a transmission side amplifier, 233 is a band pass filter for transmission side stages, 234 is a transmission side mixer, 235 is a reception side amplifier, 236 is A reception side interstage band pass filter, 237 is a reception side mixer, 238 is a voltage controlled oscillator (VCO), and 239 is a local band pass filter.

ここに、送信側アイソレータ231として、前記第1実施例の2ポート型アイソレータ1を使用することができる。アイソレータ1を実装することにより、電気特性に優れた信頼性の高い携帯電話を実現することができる。   Here, the two-port isolator 1 of the first embodiment can be used as the transmission-side isolator 231. By mounting the isolator 1, it is possible to realize a highly reliable mobile phone with excellent electrical characteristics.

[他の実施例]
なお、本発明に係る2ポート型非可逆回路素子および通信装置は前記実施例に限定するものではなく、その要旨の範囲内で種々に変更することができる。
[Other embodiments]
The two-port nonreciprocal circuit device and the communication device according to the present invention are not limited to the above-described embodiments, and can be variously modified within the scope of the gist.

例えば、永久磁石41,41のN極とS極を反転させれば、入力ポートP1と出力ポートP2が入れ替わる。また、前記実施例では、整合用回路素子の全てを回路基板に内蔵したものを示したが、チップタイプのインダクタやコンデンサを回路基板に外付けしてもよい。   For example, if the N pole and S pole of the permanent magnets 41 and 41 are reversed, the input port P1 and the output port P2 are switched. In the above embodiment, the matching circuit elements are all built in the circuit board. However, a chip type inductor or capacitor may be externally attached to the circuit board.

また、フェライトは直方体形状のものを示したが、角部をバレル研磨などで研磨したものであってもよい。   Further, although the ferrite has a rectangular parallelepiped shape, the corner may be polished by barrel polishing or the like.

本発明に係る2ポート型非可逆回路素子の一実施例を示す斜視図。The perspective view which shows one Example of the 2 port type nonreciprocal circuit device based on this invention. 図1に示した2ポート型非可逆回路素子の平面図。The top view of the 2 port type nonreciprocal circuit device shown in FIG. 図1に示した2ポート型非可逆回路素子の分解斜視図。FIG. 2 is an exploded perspective view of the two-port nonreciprocal circuit device shown in FIG. 1. 図1に示した2ポート型非可逆回路素子の要部を示す分解斜視図。The disassembled perspective view which shows the principal part of the 2 port type nonreciprocal circuit device shown in FIG. 図1に示した2ポート型非可逆回路素子の等価回路図。FIG. 2 is an equivalent circuit diagram of the two-port nonreciprocal circuit device shown in FIG. 1. 中心電極組立体と回路基板の接合状態を示す断面図。Sectional drawing which shows the joining state of a center electrode assembly and a circuit board. 中心電極組立体と回路基板の別の接合状態を示す断面図。Sectional drawing which shows another joining state of a center electrode assembly and a circuit board. 本発明に係る通信装置の一実施例を示すブロック図。The block diagram which shows one Example of the communication apparatus which concerns on this invention.

符号の説明Explanation of symbols

1…2ポート型アイソレータ
20…回路基板
30…中心電極組立体
31…フェライト
31a,31b…主面
31c,31d…側面
35…第1中心電極
36…第2中心電極
37,38…絶縁体膜
220…携帯電話
DESCRIPTION OF SYMBOLS 1 ... 2 port type isolator 20 ... Circuit board 30 ... Center electrode assembly 31 ... Ferrite 31a, 31b ... Main surface 31c, 31d ... Side surface 35 ... 1st center electrode 36 ... 2nd center electrode 37, 38 ... Insulator film 220 …mobile phone

Claims (4)

永久磁石と、該永久磁石により直流磁界が印加されるフェライトと、該フェライトに配置された導体膜からなる二つの中心電極と、表面に端子電極が形成された回路基板と、を備えた2ポート型非可逆回路素子において、
前記フェライトは直方体形状をなし、Agを主成分とした二つの前記中心電極が絶縁膜によって互いに絶縁された状態で交差して前記フェライトの両主面に形成され、
前記両主面と直交する一側面に前記中心電極に接続された接続用電極が形成され、
前記中心電極の全面を覆うように前記フェライトの両主面に絶縁膜が形成されており、
前記フェライトは両主面と直交する一側面にて前記回路基板上に載置されていること、
を特徴とする2ポート型非可逆回路素子。
A 2-port comprising a permanent magnet, a ferrite to which a DC magnetic field is applied by the permanent magnet, two central electrodes made of a conductor film disposed on the ferrite, and a circuit board having terminal electrodes formed on the surface Type non-reciprocal circuit element,
The ferrite has a rectangular parallelepiped shape, and the two center electrodes mainly composed of Ag intersect with each other while being insulated from each other by an insulating film, and are formed on both main surfaces of the ferrite.
A connection electrode connected to the center electrode is formed on one side surface orthogonal to the two main surfaces,
Insulating films are formed on both main surfaces of the ferrite so as to cover the entire surface of the center electrode,
The ferrite is placed on the circuit board on one side surface orthogonal to both main surfaces;
A two-port nonreciprocal circuit device characterized by the above.
前記絶縁膜は前記フェライトの両主面の全面に形成されていることを特徴とする2ポート型非可逆回路素子。   The two-port nonreciprocal circuit device, wherein the insulating film is formed on the entire surface of both main surfaces of the ferrite. 前記接続用電極が前記絶縁膜上または前記フェライトの絶縁膜が形成されていない主面部分に回り込むように形成されていることを特徴とする請求項1または請求項2に記載の2ポート型非可逆回路素子。   3. The two-port type non-contact type according to claim 1, wherein the connection electrode is formed so as to wrap around the insulating film or a main surface portion on which the ferrite insulating film is not formed. Reversible circuit element. 請求項1〜請求項3のいずれかに記載の2ポート型非可逆回路素子を備えたことを特徴とする通信装置。   A communication apparatus comprising the two-port nonreciprocal circuit device according to any one of claims 1 to 3.
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