JP2004146415A - Apparatus and method for inspecting semiconductor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To deal with pitch narrowing of a pad pitch by effectively avoiding an increase in an area of an electrode pad by applying, for example, to a test of a liquid crystal drive driver for driving a liquid crystal display panel. <P>SOLUTION: A method for inspecting a semiconductor includes the steps of sequentially stepwisely changing a relative position of a semiconductor chip, switching a contact of a sub-probe pin to a sub-electrode pad, displacing a corresponding main probe pin on a main electrode pad, switching the contact with the main and the sub-probe pins over that with the main and the sub-probe pin of the sub-electrode pad by further changing the relative position, and switching a connection to the main probe pin. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor inspection device and a semiconductor inspection method, and can be applied to, for example, a test of a liquid crystal drive driver for driving a liquid crystal display panel. The present invention changes the relative position between the semiconductor chip and the semiconductor chip in a stepwise manner to switch the contact of the sub probe pin to the sub electrode pad, and to change the corresponding main probe pin on the main electrode pad. And by changing the relative position to switch the contact of the main and sub probe pins to the main and sub electrode pads, and to switch the connection to the main probe pins to reduce the area of the electrode pads. It is possible to effectively cope with the narrowing of the pad pitch by avoiding it effectively.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, in a semiconductor manufacturing process, a semiconductor inspection apparatus is used to test an integrated circuit at a wafer stage, a TCP (Tape Career Package) stage, a COF (Chip On Flexible Tape) stage, and the like.
[0003]
Of these stages, for example, in the stage of a wafer, the semiconductor chip is sequentially connected to a power supply or the like by sequentially moving the wafer and pressing it against the probe card to execute an operation test or the like. ing. In such a test using a probe card, generally, all the electrode pads of a semiconductor chip are simultaneously probed (that is, a so-called per-pin method) and executed.
[0004]
On the other hand, in Japanese Patent Application Laid-Open No. 2002-19636, for example, an input electrode pad for supplying power required for operation and the like is formed with a large pad pitch and a large area, and an output electrode pad for outputting a processing result is formed as a small pad There has been proposed a method in which a test object is formed with a small area at a pitch and a test object is sequentially shifted at a small pad pitch with respect to a probe pin to perform a test. In the case of this method, for a small pad pitch, a probe pin on the small pad pitch side is created by a pitch times the number of times of repetition of the pad pitch, and this probe pin can be sequentially shifted to test the test object. Accordingly, the test can be performed using probe pins having a larger pitch than the pad pitch.
[0005]
[Patent Document 1]
JP-A-2002-19636, FIG. 1 and the like
[0006]
[Problems to be solved by the invention]
By the way, in recent years, for example, in a liquid crystal driving driver for driving a liquid crystal display panel of a mobile phone, the number of pins of an output terminal has been increased with an increase in the number of pixels of the liquid crystal display panel. Are designed to reduce the pad pitch.
[0007]
On the other hand, in the case of the cantilever method which is a general probing method in a probe card, the limit of the pad pitch is about 40 [μm].
[0008]
Therefore, in the near future, it will be difficult to test this kind of integrated circuit at the wafer stage by the so-called per-pin method of simultaneously probing all the electrode pads of the semiconductor chip.
[0009]
Specifically, FIG. 10 is a plan view showing an example of the layout of the electrode pads in the liquid crystal drive driver. The semiconductor chip 1 is formed in a size of 21000 [μm] × 3000 [μm], and electrode pads indicated by numerals 1 to 180 and numerals 201 to 800 are formed along upper and lower ends in the longitudinal direction. Further, electrode pads indicated by numerals 181 to 200 and numerals 801 to 820 are respectively formed along both ends on the short side. Of these electrode pads, pads indicated by numerals 201 to 800 are output electrode pads connected to the liquid crystal display panel, and are formed with a pad pitch of 28 [μm]. On the other hand, electrode pads indicated by numerals 1 to 200 and 801 to 820 are input electrode pads to which a power supply, a driving signal, and the like are input, and are created with a pad pitch of 56 [μm].
[0010]
In this type of driver, the output pad pitch gradually narrows from 40 [μm] to 38 [μm], 38 [μm] to 35 [μm], and 35 [μm] to 28 [μm]. It is changing to become.
[0011]
If an attempt is made to create a narrow pitch probe card in response to such a narrow pad pitch, the structure of the probe card becomes complicated, and it takes a long time to make the probe card, and the maintenance becomes more complicated. It takes time.
[0012]
As one method for solving this problem, it is conceivable to apply the method disclosed in Japanese Patent Application Laid-Open No. 2002-19636. However, in the case of this method, it is necessary to increase the area of the input electrode pads by the amount of the shift. Therefore, the increase of the area occupied by these input electrode pads on the semiconductor chip cannot be avoided. In a semiconductor chip, there is a problem that efficient layout becomes difficult.
[0013]
The present invention has been made in view of the above points, and proposes a semiconductor inspection apparatus and a semiconductor inspection method that can effectively avoid an increase in the area of an electrode pad and can cope with a narrower pad pitch. What you are trying to do.
[0014]
[Means for Solving the Problems]
In order to solve this problem, the invention according to claim 1 is applied to a semiconductor inspection apparatus for inspecting the characteristics of a semiconductor chip, and the relative position between the semiconductor chip and the semiconductor chip is sequentially changed in a stepwise manner. A predetermined number of the sub-electrode pads are switched with respect to the sub-electrode pads having a relatively small area, and the corresponding sub-electrode pads are switched on the main electrode pad having a relatively large area. Displacing a main probe pin, further changing a relative position between the main chip and the semiconductor chip, switching contact of the main and sub probe pins with respect to the main and sub electrode pads, and In response to the switching of the contact of the main probe pin to the pad, the connection to the main probe pin is switched, and the relative position between the main probe pin and the semiconductor chip is changed. Next, changing the contact of the sub-probe pin to the sub-electrode pad, displacing the main probe pin on the main electrode pad, At each contact, the semiconductor chip is inspected for the sub-electrode pad that is contacted by the sub-probe pin.
[0015]
Further, according to the invention of claim 2, the invention is applied to a semiconductor inspection method for inspecting characteristics of a semiconductor chip, and a relative position between the semiconductor chip and the semiconductor chip is sequentially changed in a stepwise manner so that a continuous area of the relative area is changed. A predetermined number of the sub-electrode pads are switched with respect to the small sub-electrode pads for contact with the sub-probe pins, and the corresponding main probe pins on the main electrode pad having a relatively large area are switched. And changing the relative position between the main and sub probe pads with respect to the main and sub electrode pads by changing the relative position between the main and sub electrode pads. In response to the switching of the contact of the probe pins, the connection to the main probe pin is switched, and the relative position with the semiconductor chip is sequentially changed stepwise. Switching the contact of the sub-probe pin with the sub-electrode pad, displacing the main probe pin on the main electrode pad, and, at each contact of the sub-probe pin, The semiconductor chip is inspected for the sub-electrode pad contacted by the probe pin.
[0016]
2. The configuration according to claim 1, wherein the relative position between the semiconductor chip and the semiconductor chip is sequentially changed so that a predetermined number of the sub-electrode pads are provided for each of the continuous sub-electrode pads having a relatively small area. By switching the contact of the provided sub probe pins and displacing the corresponding main probe pins on the main electrode pad having a relatively large area, even if the pad pitch of the sub electrode pads is narrow, a large The probe pins can be sequentially switched according to the pitch to make contact with the auxiliary electrode pad. Further, by changing the relative position between the main probe pin and the semiconductor chip, the contact of the main and sub probe pins with the main and sub electrode pads is switched, and the main probe pin with respect to the main electrode pad is changed. If the connection to the main probe pin is switched in response to the switching of the contact, similarly, with respect to the sub electrode pad, even if the pad pitch of the sub electrode pad is narrow, the probe pin is switched with a large pitch. Thus, the size of the main electrode pad can be limited to a size corresponding to the case where the relative position is displaced in the preceding sequential steps. Further, by changing the relative position between the semiconductor chip and the semiconductor chip in a stepwise manner, the contact of the sub probe pin with the sub electrode pad is switched, and the main electrode pad is connected to the main electrode pad. If the probe pin is displaced, the contact can be switched further sequentially by the main and sub electrode pads having such a size. Thereby, in each contact of the sub-probe pins, if the semiconductor chip is inspected for the sub-electrode pad which is in contact with the sub-probe pin, the connection on the main probe pin side is switched halfway, An increase in the area of the main electrode pad can be effectively avoided, and a reduction in the pad pitch can be handled.
[0017]
Thus, according to the second aspect of the present invention, it is possible to provide a semiconductor inspection method that can effectively avoid an increase in the area of an electrode pad and can cope with a narrower pad pitch.
[0018]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings as appropriate.
[0019]
(1) Configuration of the embodiment
FIG. 2 is a block diagram showing a semiconductor inspection device according to the embodiment of the present invention. In the semiconductor inspection apparatus 11, the table 12 holds the silicon wafer 13 and moves the silicon wafer 13 stepwise by driving the driving mechanism 14 to press the silicon wafer 13 against the probe card 15. Therefore, the drive mechanism 14 moves the table 12 up, down, left, and right under the control of the controller 16.
[0020]
The measurement unit 17 includes a power supply circuit for outputting power for operation to a semiconductor chip formed on the silicon wafer 13 to be measured, various signal output circuits for outputting various driving signals for the semiconductor chip, and an output from the semiconductor chip. The controller 16 controls the operation of these circuits to drive the semiconductor chip, and notifies the controller 16 of the measurement results.
[0021]
The relay unit 18 is a unit for setting the connection between the measurement unit 17 and the probe card 15, and various semiconductor chips can be tested by switching the setting.
[0022]
In the probe card 15, probe pins are arranged so as to correspond to the semiconductor chips on the silicon wafer 13. When the semiconductor chips are pressed by the table 12, these probe pins are connected to the corresponding electrode pads of the semiconductor chip, and a series of The test has been made available.
[0023]
The controller 16 is a computer that controls the entire operation of the semiconductor inspection apparatus 11. The controller 16 sequentially controls the operations of the driving mechanism 14, the measurement unit 17, and the like according to the processing procedure recorded in a memory (not shown), and A predetermined test is sequentially performed on the semiconductor chips.
[0024]
FIG. 3 is a plan view showing the layout of the electrode pads on the semiconductor chip formed on the silicon wafer 13. The semiconductor chip 20 is, for example, a liquid crystal drive driver. On one side, input electrode pads 21A to 21N for inputting a power supply as a main electrode pad, a driving signal, and the like are formed along the long side, and the other is formed on the other side. Output electrode pads 22A1 to 22N4 connected to the liquid crystal display panel, which are sub electrode pads, are created. Here, the input electrode pads 21A to 21N are formed with the pad pitch L, whereas the output electrode pads 22A1 to 22N4 are formed at a pitch of 1/2 of the pad pitch L of the input electrode pads 21A to 21N. It is designed to be created with a certain pad pitch L / 2. The output electrode pads 22A1 to 22N4 are provided at one end or the like where the dummy electrode pads D1 and D2 are arranged. It is set so that it becomes the number.
[0025]
On the other hand, in the input electrode pads 21A to 21N, dummy electrode pads D3 and D4 are provided at both ends of the row. The dummy electrode pads D1 to D4 are formed in the same shape, pad pitch and structure as the input electrode pads 21A to 21N and the output electrode pads 22A1 to 22N4, respectively.
[0026]
FIG. 4 is a plan view showing the relationship between the arrangement of the probe pins on the probe card 15 and the layout of the electrode pads. The probe card 15 is located at a position deviated toward the dummy electrode pad D3 from the center of each of the input electrode pads 21A to 21N and the dummy electrode pad D3 arranged at one end side of the array. Main probe pins 23A to 23N + 1 are provided for connection.
[0027]
Corresponding to this configuration, in the relay unit 18, the probe pins 23A to 23N + 1 are set so that the input can be shifted and the connection can be switched in the arrangement of the electrode pads 21A to 21N and D3. ing.
[0028]
On the other hand, as for the output electrode pads 22A1 to 22N4, auxiliary probe pins 24A to 24N are provided from the side of the dummy electrode pad D3 so as to be connected to every four output electrode pads 22A1, 22B1,.
[0029]
Thus, the probe card 15 shifts the semiconductor chip 20 from the state shown in FIG. 4 by the pad pitch L / 2 of the output electrode pads 22A1, 22B1,... In the direction in which the output electrode pads 22A1, 22B1,. Then, as shown in FIG. 5, the input electrode pads 21A to 21N and the probe pins 23A to 23N + 1 on the D3 side are again connected to the input electrode pads 21A to 21N and the dummy electrode pad D3 which have been connected up to then. On the other hand, the probe pins 24A to 24N on the side of the output electrode pads 22A1 to 22N4 are connected to the output electrode pads 22A2, 22B2,... Adjacent to the output electrode pads 22A1, 22B1,. It has been made.
[0030]
Further, when the pad pitch is further shifted by L / 2 from this state, as shown in FIG. 6, the input electrode pads 21A to 21N and the probe pins 23A to 23N + 1 on the D3 side are connected to the input electrode pad 21A which has been connected so far. -21N, connected to the input electrode pads 21A-21N adjacent to the dummy electrode pad D3, the dummy electrode pad D4, and the output electrodes previously connected to the probe pins 24A-24N on the output electrode pads 22A1-22N4 side. Are connected to output electrode pads 22A3, 22B3,... Adjacent to the pads 22A2, 22B2,.
[0031]
When the pad pitch is further shifted by L / 2 from this state, as shown in FIG. 7, the input electrode pads 21A to 21N and the probe pins 23A to 23N + 1 on the D4 side are connected to the input electrode pad 21A which has been connected so far. -21N, the output electrode pads 22A3, 22B3,... Adjacent to the output electrode pads 22A3, 22B3,. 22A4, 22B4,....
[0032]
Thus, in the semiconductor inspection device 11, the circuit blocks formed on the semiconductor chip 20 are sequentially tested by dividing them into circuit block diagrams corresponding to the output electrode pads 22A1 to 22N4. In the following description, the positional relationship between the probe card 15 and the semiconductor chip 20 shown in FIGS. 4 to 7 will be referred to as first to fourth positional relationships, respectively.
[0033]
FIG. 1 is a flowchart showing a processing procedure of the controller 16. The controller 16 executes this processing procedure for each semiconductor chip. That is, when starting the test of the semiconductor chip, the controller 16 moves from step SP1 to step SP2, and drives the drive mechanism 14 so as to have a first-stage positional relationship (FIG. 4) with respect to the semiconductor chip 20 to be tested. After the silicon wafer 13 is moved, the silicon wafer 13 is pressed against the probe card 15.
[0034]
Subsequently, the controller 16 proceeds to step SP3, controls the operation of the measuring unit 17, and measures basic test items. Here, the basic measurement items are measurement items that are completed only by applying power or the like to the input electrode pads 21A to 21N, and are measurement items related to detection of abnormality in power consumption due to, for example, a short circuit accident. At this time, the controller 16 sets the relay unit 18 to supply power or the like corresponding to the input electrode pads 21A to 21N. (Fig. 1)
[0035]
After measuring the basic measurement items in this manner, the controller 16 proceeds to step SP4, and in the first-stage positional relationship, the output electrode pads 22A1, 22B1,... To which the probe pins 24A to 24N are connected. And measure the response of the output. The measurement of the response is a test or the like in which a test signal is input from the input electrode pads 21A to 21N and the corresponding output is measured. Thus, in the semiconductor inspection apparatus 11, among all the output electrode pads 22A1, 22B1,..., The circuit block corresponding to the output electrode pads 22A1, 22B1,. It is designed to be tested.
[0036]
When the test in the first-stage positional relationship is completed in this way, the controller 16 moves to step SP5, drives the drive mechanism 14 to move the silicon wafer 13 away from the probe card 15, and then shifts by L / 2 pitch. Then, the silicon wafer 13 is pressed against the probe card 15, whereby the semiconductor chip 20 is set at the second stage position (FIG. 5).
[0037]
In this state, the controller 16 subsequently proceeds to step SP6, and outputs the probe pins 24A to 24N connected at the second stage position while maintaining the setting of the relay unit 18 at the first stage position. With respect to the electrode pads 22A2, 22B2,..., The output response is measured in the same manner as in the case of the first stage position. Accordingly, in the semiconductor inspection apparatus 11, the circuit blocks corresponding to the output electrode pads 22A2, 22B2,... To which the probe pins 24A to 24N are connected among all the output electrode pads 22A1, 22B1,. It has been done.
[0038]
When the test in the second-stage positional relationship is completed in this way, the controller 16 moves to step SP7, in which the drive mechanism 14 drives the silicon wafer 13 away from the probe card 15, and then shifts by L / 2 pitch. Then, the silicon wafer 13 is pressed against the probe card 15, whereby the semiconductor chip 20 is set at the third stage position (FIG. 6).
[0039]
Further, in the subsequent step SP8, the controller 16 switches the supply of power or the like to the adjacent probe pins 23A to 23N + 1 on the side of the input electrode pads 21A to 21N to 23A to 23N + 1 adjacent on the opposite side to the shifted side. The setting of the relay unit 18 is switched. Thereby, the controller 16 supplies power or the like to the corresponding input electrode pads 21A to 21N for the probe pins 23A to 23N + 1 on the input electrode pads 21A to 21N side whose connection has been switched from the second stage position to the third stage position. Set to
[0040]
Subsequently, the controller 16 proceeds to step SP9, where the output electrode pads 22A2, 22B2,... To which the probe pins 24A to 24N are connected at the third stage position are similar to those at the first stage position. Measure the output response. Thus, in the semiconductor inspection apparatus 11, a circuit block corresponding to the output electrode pads 22A3, 22B3,... Connected to the probe pins 24A to 24N among all the output electrode pads 22A1, 22B1,. It has been done.
[0041]
When the test in the third-stage positional relationship is completed in this way, the controller 16 moves to step SP10, in which the drive mechanism 14 drives the silicon wafer 13 away from the probe card 15, and then shifts by L / 2 pitch. Then, the silicon wafer 13 is pressed against the probe card 15, whereby the semiconductor chip 20 is set at the fourth stage position (FIG. 7).
[0042]
In this state, the controller 16 subsequently proceeds to step SP11, and outputs the probe pins 24A to 24N connected at the fourth stage position while maintaining the setting of the relay unit 18 at the third stage position. Regarding the electrode pads 22A4, 22B4,..., The response of the output is measured in the same manner as in the case of the first stage position. Accordingly, in the semiconductor inspection apparatus 11, the circuit blocks corresponding to the output electrode pads 22A4, 22B4,... Connected to the probe pins 24A to 24N among all the output electrode pads 22A1, 22B1,. , For all the output electrode pads 22A4, 22B4,...
[0043]
When the measurement of the response is completed in this way, the controller 16 proceeds from step SP11 to step SP12, and ends this processing procedure. The controller 16 determines the measurement result thus detected and determines a defective product or the like for each semiconductor chip 20.
[0044]
(2) Operation of the embodiment
In the above configuration, in the semiconductor inspection apparatus 11 (FIG. 2), when the silicon wafer 13 is mounted on the table 12, the table 12 is moved by the control of the driving mechanism 14 by the controller 16, and the silicon wafer 13 is sequentially moved in the XY direction. Moved in the direction. In addition, by moving in this manner, each semiconductor chip is pressed against the probe card 15, a power source, a drive signal, and the like are applied from the measurement unit 17, and the response is measured, whereby the characteristics of each semiconductor chip are measured. You.
[0045]
In the test of each semiconductor chip 20, the relative position between the semiconductor chip 20 and the probe card 15 is sequentially changed step by step in the semiconductor inspection apparatus 11, so that the continuous secondary electrode pads 22A1 to 22N4 having a relatively small area are changed. On the other hand, the contact of the sub probe pins 24A to 24N provided for each of the four electrode pads 22A1 to 22N4 is switched, and the corresponding main probe on the main electrode pads 21A to 21N having a relatively large area. The pins 23A to 23N are displaced (FIGS. 3 to 5).
[0046]
When the relative position is changed in two steps, the relative position between the semiconductor chip 20 and the probe card 15 is further changed (FIG. 6). In this case, the main and sub electrode pads 21A to 21N and 22A1 are used. The contact of the main and sub probe pins 23A to 23N and 24A to 24N with respect to ２２22N4 is switched. In response to the switching of the contact of the main probe pins 23A to 23N to the main electrode pads 21A to 21N, the connection of the measurement unit 17 to the main probe pins 23A to 23N is switched by setting the relay unit 18.
[0047]
Further, the relative positions of the semiconductor chip 20 and the probe card 15 are sequentially changed stepwise (FIG. 7), and the contact of the sub probe pins 24A to 24N is switched to the sub electrode pads 22A1 to 22N4 having a small area. The corresponding main probe pins 23A to 23N are displaced on the main electrode pads 21A to 21N.
[0048]
In the semiconductor inspection apparatus 11, in each contact of the sub probe pins 24A to 24N in these settings, the response of the semiconductor chip is inspected with respect to the sub electrode pad formed by the contact of the sub probe pins 24A to 24N.
[0049]
As a result, in the semiconductor inspection apparatus 11, the relative position between the semiconductor chip 20 and the probe card 15 is changed in four steps as a whole, and the output electrode pads 22A1 to 22N4 with the pad pitch L / 2, which is an auxiliary electrode pad, are changed. Thus, the response of the output electrode pads 22A1 to 22N4 can be tested using the sub probe pins 24A to 24N having a pitch of 2L provided for each of the four electrode pads 22A1 to 22N4. The semiconductor chips can be tested sufficiently in response to the narrow pitch of 22A1 to 22N4.
[0050]
On the other hand, in the input electrode pads 21A to 21N, which are main electrode pads, the input electrode pads are formed by the pad pitch L, and the subsequent input electrode pads are formed in the third stage of the change in the relative position between the semiconductor chip 20 and the probe card 15. The contact of the main probe pins 23A to 23N is switched to the side, and the connection between the probe pins 23A to 23N and the measurement unit 17 is switched by the relay unit 18 in response to the switching, so that, as before, A power supply or the like corresponding to the input electrode pads 21A to 21N is supplied.
[0051]
Thus, in the semiconductor chip, the relative positions of the semiconductor chip 20 and the probe card 15 are changed in such four steps, and the sizes of the input electrode pads 21A to 21N are changed to correspond to the change in the relative position in two steps. By setting the characteristics, the characteristics of the semiconductor chip 20 can be inspected, thereby effectively avoiding an increase in the area of the electrode pad and responding to a narrower pad pitch.
[0052]
In fact, according to the present embodiment, the pad pitch can be reduced by simply changing the processing program of the probe card 15 and the controller 16 without changing the hardware configuration of the semiconductor inspection apparatus 11. Therefore, existing equipment can be effectively used. Further, since the pitch of the probe pins can be widened, the configuration of the probe card can be simplified accordingly, and the reliability can be improved.
[0053]
In testing the semiconductor chip 20 in this manner, in this embodiment, dummy electrode pads D1 to D4 are provided, and these probe pins 23A to 23N and 24A to 24N which are not used By contacting and holding the electrode pads D1 to D4, damage to the probe pins 23A to 23N and 24A to 24N can be effectively avoided.
[0054]
(3) Effects of the embodiment
According to the above configuration, the relative position with respect to the semiconductor chip is sequentially changed in a stepwise manner to switch the contact of the sub probe pin with the sub electrode pad, and the main electrode pad corresponding to the main electrode pad. By displacing the probe pins and changing the relative positions to switch the contact of the main and sub probe pins to the main and sub electrode pads, and by switching the connection to the main probe pins, the area of the electrode pad is changed. Can be effectively avoided, and it is possible to cope with a narrower pad pitch.
[0055]
(4) Other embodiments
In the above-described embodiment, the case where the main and sub electrode pads are provided along the long side of the semiconductor chip has been described. However, the present invention is not limited to this. For example, as shown in FIG. When the main and sub electrode pads are provided, and when the main and sub electrode pads are mixed along one end face, the arrangement of the main and sub electrode pads is variously set as necessary. can do.
[0056]
Further, in the above-described embodiment, the case where the electrode pads are arranged in one direction has been described. However, the present invention is not limited to this. For example, as shown in FIG. When arranging, for example, various arrangement methods can be widely applied as necessary.
[0057]
Further, in the above-described embodiment, the case where the relative position between the semiconductor chip and the semiconductor chip is changed in four steps and the connection of the probe pins is switched in the third step has been described. However, the present invention is not limited to this. The number of steps for changing the relative position and the step for switching the connection of the probe pins can be variously set.
[0058]
Further, in the above-described embodiment, the case where the present invention is applied to the test of the liquid crystal driving driver has been described. However, the present invention is not limited to this, and can be widely applied to various semiconductor tests.
[0059]
【The invention's effect】
As described above, according to the present invention, the relative position between the semiconductor chip and the semiconductor chip is gradually changed to switch the contact of the sub probe pin to the sub electrode pad, and to change the contact on the main electrode pad. By displacing the corresponding main probe pin and further changing the relative position to switch the contact of the main and sub probe pins to the main and sub electrode pads, and to switch the connection to the main probe pin, An increase in the pad area can be effectively avoided, and the pad pitch can be reduced.
[Brief description of the drawings]
FIG. 1 is a flowchart showing a processing procedure of a controller in a semiconductor inspection device according to an embodiment of the present invention.
FIG. 2 is a block diagram showing a semiconductor inspection device according to the embodiment of the present invention.
FIG. 3 is a plan view showing a test target of the semiconductor inspection device of FIG. 2;
FIG. 4 is a plan view showing an arrangement of probe pins of the semiconductor inspection device of FIG. 2;
FIG. 5 is a plan view showing a positional relationship in a second stage.
FIG. 6 is a plan view showing a positional relationship in a third stage.
FIG. 7 is a plan view showing a positional relationship in a fourth stage.
FIG. 8 is a plan view showing an arrangement of electrode pads according to another embodiment.
FIG. 9 is a plan view showing an arrangement of electrode pads according to another embodiment different from FIG.
FIG. 10 is a plan view showing a conventional arrangement of electrode pads.
[Explanation of symbols]
1, 20 semiconductor chip, 11 semiconductor inspection device, 13 silicon wafer, 15 probe card, 16 controller, 18 relay unit, 21A to 21N input electrode pads, 22A1 to 22N4 …… Output electrode pads, D1 to D4 …… Dummy electrode pads

Claims (2)

In a semiconductor inspection device for inspecting characteristics of a semiconductor chip,
By changing the relative position between the semiconductor chip sequentially step by step,
The contact of the sub probe pins provided for each of the predetermined number of the sub electrode pads with respect to the continuous sub electrode pads having a relatively small area is switched, and the contact is performed on the main electrode pad having a relatively large area. To displace the corresponding main probe pin,
Further, by changing the relative position between the semiconductor chip,
Switching the contact of the main and sub probe pins to the main and sub electrode pads, and connecting to the main probe pins in response to the switching of the contact of the main probe pins to the main electrode pad Switch,
Furthermore, by changing the relative position between the semiconductor chip and the semiconductor chip in a stepwise manner,
Switching the contact of the sub probe pin with respect to the sub electrode pad, displacing the main probe pin on the main electrode pad,
A semiconductor inspection device for inspecting the semiconductor chip with respect to the sub-electrode pad formed by the contact of the sub-probe pin at each contact of the sub-probe pin. In a semiconductor inspection method for inspecting characteristics of a semiconductor chip,
By changing the relative position between the semiconductor chip sequentially step by step,
The contact of the sub probe pins provided for each of the predetermined number of the sub electrode pads with respect to the continuous sub electrode pads having a relatively small area is switched, and the contact is performed on the main electrode pad having a relatively large area. To displace the corresponding main probe pin,
Further, by changing the relative position between the semiconductor chip,
Switching the contact of the main and sub probe pins to the main and sub electrode pads, and connecting to the main probe pins in response to the switching of the contact of the main probe pins to the main electrode pad Switch,
Furthermore, by changing the relative position between the semiconductor chip and the semiconductor chip in a stepwise manner,
Switching the contact of the sub probe pin with respect to the sub electrode pad, displacing the main probe pin on the main electrode pad,
A semiconductor inspection method for inspecting the semiconductor chip with respect to the sub-electrode pad which is contacted by the sub-probe pin at each contact of the sub-probe pin.

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