JP2006196711A - Semiconductor integrated circuit, testing method thereof and probe card - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize a semiconductor integrated circuit, a probe card, and a testing method of the semiconductor integrated circuit that can make the testing of the semiconductor integrated circuit performed at a low cost. <P>SOLUTION: Respective measured chips 109, 110 which are the two respective semiconductor integrated circuit chips tested at the same time on a semiconductor wafer 189 are so provided that the output-terminal pads 111, 112 of the chip 109 and the output-terminal pads 115, 116 of the chip 110 are disposed symmetrically and adjacent to each other. There are provided pattern wirings 190, whereby the individual output-terminal pads 111, 112 of the one measured chip 109 and the individual output-terminal pads 115, 116 of the other measured chip 110 which are adjacent to and correspond to the output-terminal pads 111, 112 respectively, are short-circuited, respectively. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor integrated circuit having a plurality of semiconductor integrated circuit chips formed on a semiconductor wafer and a probe card used when performing a wafer test process on each of the semiconductor integrated circuit chips. The present invention relates to a test method for a semiconductor integrated circuit, a probe card, and a semiconductor integrated circuit suitable for simultaneous measurement of a plurality of rectangular semiconductor integrated circuit chips in which output terminals are arranged on the long side of the semiconductor integrated circuit chip.

  In the manufacturing process of a semiconductor integrated circuit having a plurality of semiconductor integrated circuit chips on a semiconductor wafer, a wafer test process is performed in which a pass / fail judgment of each semiconductor integrated circuit chip is performed as a test after the wafer manufacturing process called the wafer first half process is completed. Has been. In the wafer test process, each manufactured semiconductor integrated circuit chip is electrically inspected in units of one chip.

  In the wafer test process, when a semiconductor integrated circuit chip is inspected, an IC tester called a test system determines whether or not the semiconductor integrated circuit chip is inspected. However, a prober that transports a semiconductor wafer in order to inspect the semiconductor integrated circuit chip with the IC tester. And a probe card for electrically joining a measurement target chip to be tested on an prober and an IC tester.

  FIG. 14 is a configuration diagram of a general semiconductor integrated circuit chip for driving a liquid crystal. The mainstream of semiconductor integrated circuit chips for driving liquid crystals is to use a rectangular plate-shaped chip body, and the input / output terminal pads 2 are arranged along the long side portion on one long side portion of the rectangular plate shape. . The input / output terminal pad 2 includes m power supply terminal pads for input / output terminals (hereinafter, the input / output terminal pads including the power supply terminal pads are referred to as input / output terminal pads). When such m power supply terminal pads are provided, m pads are arranged on the same side of the chip from the input / output terminal pad 2 to the input / output terminal pad 4.

  In the case where the liquid crystal driving output terminal pad 3 and the liquid crystal driving output terminal pad 5 are arranged on the other long side portion and have n output terminals, n liquid crystal driving outputs are provided on the same side. Terminal pads are arranged. The liquid crystal driving data input from the input / output terminal pad is converted into display data in the internal circuit 6 and output from the liquid crystal driving output terminal pad, thereby driving the liquid crystal panel. In the semiconductor integrated circuit for driving liquid crystal, about 100 input / output terminal pads are mainstream, whereas about 500 to 800 output terminal pads are mainstream, and output terminal pads tend to increase further.

  FIG. 15 is a schematic diagram of a probe card in a semiconductor integrated circuit chip for driving a liquid crystal. A probe card having a structure called a cantilever system, which is currently mainstream, includes an opening 9 having a shape in which a central portion of a circular probe card substrate 7 is opened. The opening 9 is provided with probe needles 11 to 14 which are metal needles that come into contact with pads of the chip to be measured attached to the probe card, and the probe needles 11 to 14 are in contact with pads of the chip to be measured. A reinforcing plate 8 is installed to prevent deformation of the probe card substrate 7 due to the pressure generated at the time.

  In a probe card for a liquid crystal driving semiconductor integrated circuit having m input / output terminal pads and n output terminal pads, probe needles 11 to 14 are connected to individual pads of the chip 10 to be measured. The total number of probe needles attached to the probe card is (m + n).

  The probe card has a structure having probe needles that come into contact with individual pads in order to input / output electric signals to / from all pads of the semiconductor integrated circuit chip or to supply power, for example, a liquid crystal having 1000 pads. The probe card in the driving semiconductor integrated circuit chip has 1000 probe needles.

  Also, when two semiconductor integrated circuit chips for driving a liquid crystal having 1000 pads are measured simultaneously, the probe card requires 2000 probe needles corresponding to the total number of pads of 2 chips to be measured. Tungsten alloy, copper alloy or palladium alloy is used as the probe needle material, but the probe needle made of tungsten alloy has a price of about 1000 yen per one and is driven by liquid crystal. The probe needles of palladium-based alloys, which are often introduced in semiconductor integrated circuit chips for industrial use, are expensive at a price of about 2000 yen per unit, and two of these made of palladium-based alloys are used for the same measurement. A probe card having probe needles is expensive, exceeding 4 million yen.

  2. Description of the Related Art In recent years, as represented by liquid crystal televisions and the like, liquid crystal driving semiconductor integrated circuits have been improved in function by increasing the size of a liquid crystal panel and increasing the number of liquid crystal panels. Due to the increase in the screen size of the liquid crystal panel, semiconductor integrated circuit chips for driving liquid crystals are now mainly used in models with 500 to 800 output terminals, and development of models with more than 1000 output terminals is also under development. It is done.

  In addition, the pad pitch, which is the distance between pads, has become smaller due to the increase in the number of output terminals of the semiconductor integrated circuit chip for driving liquid crystal. Currently, development of a semiconductor integrated circuit chip for driving a liquid crystal with a pad pitch of 30 μm or less is underway, and as the pad pitch becomes smaller, it becomes difficult to manufacture a probe card, repair a probe needle, and adjust the needle position. .

  The current mainstream cantilever type probe card has a pad pitch of up to 25 μm, but for pad pitches of less than 25 μm, the cantilever type cannot be manufactured. Therefore, a micro-cantilever type can be used as an alternative to the cantilever type. Photolithographic probe cards are being developed.

  In addition, liquid crystal driving semiconductor integrated circuit chips have become more prominent due to the increased color of liquid crystal panels. Test functions per chip tend to increase as the functionality of semiconductor integrated circuit chips for driving liquid crystals increases. Further, while the chip size has been reduced due to the miniaturization of the semiconductor integrated circuit manufacturing process, the wafer size has been increased, and wafers having about 3000 chips on one wafer have been mass-produced. The increase in test time per chip and the increase in the number of chips formed on a single wafer due to higher functionality have significantly increased the processing time in the wafer test process, which has lowered productivity.

  Therefore, in the wafer test process of the semiconductor integrated circuit chip for driving a liquid crystal, two simultaneous measurements for simultaneously testing two chips to be measured are becoming mainstream.

  FIG. 16 is a schematic diagram of two probe cards for simultaneous measurement in a liquid crystal driving semiconductor integrated circuit chip. Similar to the probe card of FIG. 15, the circular probe card base 15 has a shape with an opening at the center, and a reinforcing plate 16 is installed around the opening 17. Probe needles 20 to 27 are attached to the probe card base 15 with respect to individual pads of the chip 18 to be measured and the chip 19 to be measured.

  FIG. 17 is a schematic diagram of the needle holders of two probe cards for simultaneous measurement in a liquid crystal driving semiconductor integrated circuit chip having n output terminal pads and m input / output terminal pads. Since the number of probe needles needs to be the same as the number of pads on the chip to be measured, two probe cards for the same measurement have (2m + 2n) probe needles twice the number of probes of the probe card for measurement. This is necessary and causes the probe card to be expensive.

  Further, the number of input / output signal pads is mainly 100 or less, whereas the number of output signal pads is 500 or more, and the probe needle for the output signal pad is the output signal. Since the same number of pads as the number of pads is required, the probe card for the output signal is produced by a multi-layered needle stand as shown in FIG.

  18 is a cross-sectional view of the probe card shown in FIG. As a configuration of a probe card for performing the same wafer test of two chips to be measured 38 and 39 to be measured, a reinforcing plate 42 is attached to the upper part of the probe card substrate 43, and probes 44 to 47 fixed by spacers 40 and 41 are provided. Contact the pads of the chips to be measured 38 and 39.

  Since the probe needles that come into contact with the output terminal pads have a large number of pads, they are manufactured in a multi-layer structure as shown by the output terminal probes 44 and 46, and currently have more than 500 output terminals built-in semiconductor integrated circuits for liquid crystal driving The chip probe card is manufactured by a needle holder having a structure of 6 to 8 layers.

  The increase in the number of output terminals of a semiconductor integrated circuit and the reduction of the pad pitch have been dealt with by manufacturing a probe card having a multilayer structure. However, in the future, a semiconductor integrated circuit chip with a pad pitch of less than 25 μm will be conventionally developed. It is becoming difficult to manufacture probe cards in the cantilever system. Furthermore, the two probe cards for measurement are difficult to manufacture the probe card, repair the probe needle, and adjust the needle position compared to the probe card for single measurement shown in FIG. It is becoming difficult to stand up the pads arranged on the side to be.

  Further, in the wafer test process, there is a problem of foreign matter generated when the pads of the semiconductor integrated circuit chip are scraped off when the probe needle of the probe card comes into contact with the pads of the semiconductor integrated circuit chip during the inspection of the semiconductor integrated circuit chip. This foreign matter may cause a short circuit between a plurality of probe needles when inspecting the semiconductor integrated circuit chip, which causes a problem that the inspection of the semiconductor integrated circuit chip cannot be performed normally. Normally, these foreign objects are removed by removing the probe card from the prober and cleaning with a brush. However, the foreign objects attached to the adjacent probe needles at the same time are measured within a short distance. Since it is concentrated, there is a problem that it is difficult to remove.

  FIG. 19 is a schematic view of the needle stand portion of two measurement probe cards for a liquid crystal driving semiconductor integrated circuit chip in which the short sides of two chips to be measured 155 and 156 are arranged adjacent to each other. When the short sides are adjacent to each other, there is no pad on the adjacent side, so that the manufacture of the probe card, the repair of the probe needle, and the needle position adjustment can be easily performed. Further, in the inspection of the semiconductor integrated circuit chip in the wafer test process, when the probe needle of the probe card comes into contact with the pad of the semiconductor integrated circuit chip, the foreign matter generated by scraping off the pad of the semiconductor integrated circuit chip is detected by the probe needle of the probe card. Even when it adheres to the surface, foreign matter can be easily removed.

  However, since the size of the opening of the probe card needs to be at least twice as long as the long side of the chip, two chips with the short side adjacent to each other can be used for the same measurement. The probe card cannot be manufactured.

  Patented as a method to facilitate the removal of foreign matter adhering to the probe needle while facilitating the needle stand of the adjacent side, the repair of the probe needle and the adjustment of the needle position in the manufacturing process of two probe cards for the same measurement Document 1 has been proposed and a schematic diagram is shown in FIG. When two semiconductor integrated circuit chips for driving a liquid crystal having n output terminal pads and m input / output terminal pads are measured at the same time, the measured chip 48 and the measured chip 49 have a small number of pads. Two chips are mirror-inverted so that the side on which the input / output terminal pad having a large distance between the pads is arranged is adjacent. The (2m + 2n) probe needles 50 to 57 are erected so as to come into contact with all the pads of the two chips to be measured.

  FIG. 21 is a cross-sectional view of the probe card shown in FIG. As a configuration of a probe card for performing the same wafer test of two chips to be measured 58 and 59 to be measured, a reinforcing plate 62 is attached to the upper part of the probe card substrate 63 and probes 64 to 67 fixed by spacers 60 and 61 are provided. It contacts the pads of the chips 58 and 59 to be measured. By arranging the output terminal pads with a large number of pads and narrow pad pitches on the non-adjacent sides, two probe needles on the adjacent sides in the manufacturing process of the same probe card In addition to facilitating the repair and adjustment of the needle position and the position of the probe needle, the pad of the semiconductor integrated circuit chip when the probe needle of the probe card contacts the pad of the semiconductor integrated circuit chip in the inspection of the semiconductor integrated circuit chip in the wafer test process. Even when the foreign matter generated by scraping off adheres to the probe needle of the probe card, it is possible to easily remove the foreign matter.

The method shown in FIG. 20 makes it easy to set up the probe needles on the adjacent side, repair the probe needles and adjust the position of the needles in the manufacturing process of the two probe cards for the same measurement, and remove foreign substances adhering to the probe needles. However, the increase in the manufacturing cost of the probe card due to the increase in the number of outputs of the semiconductor integrated circuit chip for driving the liquid crystal cannot be suppressed. Further, it is impossible to manufacture a conventional cantilever type probe card for a narrow pad pitch of 25 μm or less.
JP-A-2004-304132 (release date: October 28, 2004)

  In the above-mentioned conventional probe card for measuring two semiconductor integrated circuits, since the number of probe needles is the same as the number of pads, the number of probe needles increases in proportion to the increase in the number of output terminals. There is a problem of becoming higher.

  Further, since it is not possible to cope with the narrow pad pitch due to the limitation in the manufacture of the probe card, there is a problem that the pad pitch of the semiconductor integrated circuit chip is restricted and the chip size cannot be minimized. Narrow pad pitch compatible micro cantilever type probe cards and photolithographic type probe cards are R & D stage probe card manufacturing methods, so they are expensive and not suitable for mass production due to problems with maintainability and durability. It is.

  In order to solve the above problems, a semiconductor integrated circuit according to the present invention includes a plurality of semiconductor integrated circuit chips that are simultaneously tested on a semiconductor wafer and arranged symmetrically so that the output terminal sides are adjacent to each other. It is characterized in that a pattern wiring for short-circuiting each output terminal of the chip and each output terminal of the other adjacent semiconductor integrated circuit chip is provided.

  In the semiconductor integrated circuit, a control function unit that can arbitrarily control the output terminal to a high resistance output state may be provided. In the semiconductor integrated circuit, the pattern wiring is preferably provided so as to straddle a dividing line for individually dividing a plurality of semiconductor integrated circuit chips. In the semiconductor integrated circuit, the plurality of semiconductor integrated circuit chips may be two.

  In order to solve the above problems, a probe card according to the present invention is a probe card for co-measurement for simultaneously testing a plurality of semiconductor integrated circuit chips on a semiconductor wafer in any of the semiconductor integrated circuits described above. The first probe portion is provided so that the pads of the output terminals on the adjacent side of the plurality of semiconductor integrated circuit chips are provided on all the pads of only one of the semiconductor integrated circuit chips, and the input / output pads on the non-adjacent side are provided. Only the second probe part is provided so as to perform needle stand on all pads of both chips.

  According to another probe card of the present invention, in order to solve the above-described problem, in the semiconductor integrated circuit according to any one of the above, a plurality of semiconductor integrated circuit chips can be simultaneously tested on a semiconductor wafer. In the probe card, in the pads of the output terminals on the adjacent side of the plurality of semiconductor integrated circuit chips, a first probe unit is provided so as to perform needle standing only on one side of the pads short-circuited by the pattern wiring, The input / output pads on the non-adjacent side are characterized in that the second probe portion is provided so as to perform needle stand on all the pads of both chips.

  Still another probe card according to the present invention is provided for the same measurement for simultaneously testing a plurality of semiconductor integrated circuit chips on a semiconductor wafer in the semiconductor integrated circuit according to any one of the above, in order to solve the above problems. In the probe card of the present invention, the first probe part is provided so that the pads short-circuited by the pattern wiring are alternately arranged at the output terminal pads on the adjacent side of the plurality of semiconductor integrated circuit chips. The input / output pad is characterized in that a second probe portion is provided so as to perform needle stand on all pads of both chips.

  In order to solve the above-described problem, a semiconductor integrated circuit test method according to the present invention performs a plurality of simultaneous measurements on any of the above semiconductor integrated circuits using the probe card described above. It is characterized by implementation.

  As described above, according to the present invention, the individual output terminals (pads) of a plurality of, for example, two semiconductor integrated circuit chips arranged so that the sides on the output terminal side are adjacent to each other are short-circuited by the pattern wiring. Since the probe card needle holder can be applied only to one pad short-circuited by pattern wiring, it is possible to reduce the number of probe card needle holders and greatly increase the probe card manufacturing cost. Can be reduced.

  Also, a semiconductor integrated circuit chip having each output terminal with a pad pitch of about ½ by alternately performing probe needle stands on a plurality of, for example, two semiconductor integrated circuit chips. Therefore, it is possible to develop a semiconductor integrated circuit chip with a narrow pad pitch, thereby reducing the chip size and reducing the chip cost.

  As described above, according to the present invention, it is possible to facilitate the manufacture of a plurality (two) of probe cards for semiconductor integrated circuit chips and to reduce the number of probe needles. Can be greatly reduced. In addition, since it is easy to manufacture a probe card of a semiconductor integrated circuit chip having a narrow pad pitch which is difficult to manufacture, it is possible to develop an inexpensive semiconductor integrated circuit chip having a small chip size and adopting a narrow pad pitch. Cost can be reduced.

  Therefore, by using the semiconductor integrated circuit, the probe card, and the semiconductor integrated circuit testing method of the present invention, the cost of two probe cards for measuring a semiconductor integrated circuit such as a liquid crystal driving device incorporating a multi-output terminal can be reduced. Since a semiconductor integrated circuit chip having a narrow pad pitch can be produced, the chip cost can be reduced, and the manufacturing (testing) cost of the semiconductor integrated circuit can be reduced.

  Embodiments of a semiconductor integrated circuit, a probe card, and a semiconductor integrated circuit testing method according to the present invention will be described below with reference to FIGS.

(First embodiment)
Hereinafter, an embodiment of a semiconductor integrated circuit according to the present invention will be described with reference to FIG. In the present embodiment, an example for driving a liquid crystal is given, but it can also be used for other display devices with a large number of terminals. Examples of such other display devices include a plasma display (PDP) and an electroluminescence display. (EL) is a flat panel display.

  In the semiconductor integrated circuit, as shown in FIG. 1, a plurality of, for example, two liquid crystal driving semiconductor integrated circuit chips are formed on the semiconductor wafer 189 as the chips to be measured 109 and 110, respectively. . Each of the chips 109 and 110 to be measured has a rectangular plate shape having n output terminal pads and m input / output terminal pads. Further, each of the chips 109 and 110 to be measured has n output terminal pads 111 and 112 of the chip to be measured 109 on one side at the time of measuring the two, and n output terminals of the other chip to be measured 110. It arrange | positions so that the edge | side of the side which has arrange | positioned the pad 115,116 may mutually face and adjoin (adjacent). n and m are each a positive integer, and usually n> m.

  Each of the two chips to be measured 109 and 110 has their n output terminal pads and m input / output terminal pads arranged in a mirror (mirror image) inverted form. For this reason, when each output terminal pad is short-circuited by the pattern wiring 190, the first output terminal pad 112 of the chip to be measured 109 and the nth output terminal pad 116 of the chip to be measured 110 are scribed later. You can face each other across the line. Thereby, it is possible to easily short-circuit the two facing each other by the pattern wiring 190.

  Similarly, the nth output terminal pad 111 of the chip to be measured 109 is short-circuited by the first output terminal pad 115 of the chip to be measured 110 and the pattern wiring 190, and the n output terminal pads of the chip to be measured 109 are short-circuited. The n corresponding output terminals of the other chip under test 110 are short-circuited by the pattern wiring 190, respectively.

  FIG. 2 is an enlarged view of a semiconductor integrated circuit chip in which output terminal pads are arranged. A scribe line 121 is virtually assumed between one measured chip 119 and one measured chip 120. In the manufacturing process of the semiconductor integrated circuit, the chips to be measured 119 and 120 adjacent to each other for cutting the chips to be measured 119 and 120 which are semiconductor integrated circuit chips in a process called dicing in which the chips are separated from the semiconductor wafer one by one. A virtual boundary line (breaking line) between them is a scribe line 121. Since the pattern wiring 190 for short-circuiting the two pads is formed so as to straddle the scribe line 121, the pattern wiring 190 for short-circuiting is cut during dicing, and the two chips to be measured 119 and 120 are short-circuited. Each of the output terminal pads is completely separated from each other.

  As shown in FIG. 2, the n-th output terminal pad 122 of the chip to be measured 119 and the first output terminal pad 125 of the chip to be measured 120 are connected using a short-circuit pattern wiring 128 between the pads. Each pattern wiring 128 to 130 for short-circuiting between pads may be formed of metal wiring such as aluminum wiring or copper wiring, or polysilicon wiring. Similarly, the <n-1> -th output terminal pad 123 of the chip to be measured 119 and the second output terminal pad 126 of the chip to be measured 120 are connected by the short-circuit pattern wiring 129 between the pads, and the chip to be measured 119 is connected. The <n-2> -th output terminal pad 124 and the third output-terminal pad 127 of the chip 120 to be measured are connected by a short-circuit pattern wiring 130 between the pads. In this way, the liquid crystal driving semiconductor integrated circuit chip having n output terminal pads is connected between the corresponding output terminal pads using a total of n short-circuit pattern wirings.

  The short-circuit pattern wiring between the two output terminal pads is shown in FIG. 3 depending on the positional relationship between the two output terminal pads to be short-circuited in addition to the straight wiring as shown in FIG. As described above, a bent pattern wiring having a portion along the scribe line 121 on the scribe line 121 may be used.

  FIG. 4 shows an example of a configuration diagram of an output circuit in the semiconductor integrated circuit for driving a liquid crystal according to the present invention. In a liquid crystal driving semiconductor integrated circuit having n output terminals, a total of n output terminal pads are arranged in a row from the first output terminal pad 143 to the nth output terminal pad 148. ing. The output terminal pads may be arranged in a staggered manner in two rows or a plurality of rows on the same side. A total of n output terminal pads are connected to the corresponding output circuits 149 to 154, and the output circuits 149 to 154 output the corresponding liquid crystal panel driving signals.

  The output circuits 149 to 154 may be configured by a tri-state buffer output circuit or the like that can be arbitrarily set to a high resistance output (cutoff) state. In addition, the high-resistance output control signal of the tri-state buffer can be controlled by an input signal from a dedicated input terminal provided on the input / output terminal side of each chip to be measured. When HIGH level is input to the dedicated input terminal provided on the output terminal side, the output circuits 149 to 154 are in the high resistance output state, and when LOW level is input to the dedicated input terminal provided on the input / output terminal side. A circuit configuration may be employed in which signals for driving the liquid crystal panel are output from the output circuits 149 to 154.

  FIG. 5 shows an example of a configuration diagram in the first embodiment of the needle holder of the probe card used for inspecting each measured chip of the semiconductor integrated circuit for driving a liquid crystal according to the present invention. The chip to be measured 68 and the chip to be measured 69 having m input / output terminal pads and n output terminal pads are arranged so that the sides on which the output terminal pads are arranged are adjacent to each other.

  There are a total of m probe needles from the first input / output terminal pad probe needle 73 of the measured chip 68 to the mth input / output terminal probe needle 72, and the first input / output terminal pad of the measured chip 69. This is a total of m needles from the probe needle 74 to the m-th input / output terminal probe needle 75. The input / output terminal pad probe needles 72 to 75 are the second probe portions.

  On the other hand, the probe needle for the output terminal is provided only to the pad for the output terminal of the chip 69 to be measured, and from the first output terminal probe needle 70 to the nth output terminal probe needle 71. It consists of a total of n probe needles. Output terminal probe needles 70 to 71 are first probe portions.

  Two probes to be measured having m input / output terminal pads and n output terminal pads, the total number of probes required for the same measurement probe card is (2m + n). As shown in FIG. 1, the output terminal pads of the measured chip 68 and the measured chip 69 include the first output terminal pad of the measured chip 68 and the nth output terminal pad of the measured chip 69. Similarly, the second output terminal pad of the chip to be measured 68, the <n-1> th output terminal pad of the chip to be measured 69, and the third output of the chip to be measured 68 are short-circuited by the pattern wiring. The n pads corresponding to the terminal pad and the <n-2> -th output terminal pad of the chip to be measured 69 are short-circuited with each other by the wiring pattern.

  Therefore, the n output terminal probes 70 to 71 are set up only on the output terminal pads of the chip 69 to be measured, but are also connected to all the output terminal pads of the chip 68 to be measured. All output signals of chip 68 can be tested.

  FIG. 6 is a cross-sectional view of the probe card shown in FIG. A reinforcing plate 80 is attached to the upper part of the probe card substrate 81 (the side opposite to the side facing each measured chip 76), and the probe needles 82 to 84 are fixed by spacers 79 and 80. The measured tip 76 has probe needles only on the input / output terminal pads, and the measured tip 77 has probe needles on all of the input / output terminal pads and output terminal pads. It is done. Probe needles are not concentrated on the adjacent sides of the two measured tips, making probe needles easy to manufacture, repair, and adjust. In addition, the number of probe needles used to be (2m + 2n) in the past. However, since the number is reduced to (2m + n), the manufacturing cost of the probe card can be reduced.

  That is, in a liquid crystal driving semiconductor integrated circuit having 100 input / output terminal pads and 800 output terminal pads, a probe material with a probe needle unit price of 1200 yen is used, and a material other than the probe needle, such as a probe card substrate. When the cost and the manufacturing cost are 200,000 yen, the manufacturing cost of two probe cards for simultaneous measurement is greatly reduced from 2.36 million yen to 1.4 million yen.

  Further, in the inspection of the semiconductor integrated circuit chip in the wafer test process, when the probe needle of the probe card comes into contact with the pad of the semiconductor integrated circuit chip, the foreign matter generated by scraping off the pad of the semiconductor integrated circuit chip is detected by the probe needle of the probe card. Even when adhering to the probe, since the number of adjacent probe needles on the side is small, it is possible to easily remove foreign substances adhering to the probe needle.

(Second embodiment)
FIG. 7 shows an example of a configuration diagram in the second embodiment of the needle holder of the probe card used for the inspection of the semiconductor integrated circuit chip for driving a liquid crystal according to the present invention. The chip to be measured 85 and the chip to be measured 86 each having m input / output terminal pads and n output terminal pads are arranged such that the sides on which the output terminal pads are disposed are adjacent to each other.

  There are a total of m probe needles from the first input / output terminal pad probe needle 92 of the chip to be measured 85 to the mth input / output terminal probe needle 91, and the first input / output terminal pad of the chip to be measured 86. A total of m output probe needles from the probe needle 93 to the m-th input / output terminal probe needle 94, and the output terminal probe needles are alternately raised against the output terminal pads of the measured chip 85 and the measured chip 86. It is composed of a total of n probe needles from the first output terminal probe needle 87 to the nth output terminal probe needle 90, for m input / output terminal pads and n output terminals. The total number of probes required in a probe card for measuring two chips to be measured having pads is (2m + n).

  Since the needle stand for the output terminal pad is twice as long as the pad pitch, the needle stand for the semiconductor integrated circuit chip having a pad pitch of about 1/2 times that of the conventional method can be achieved for the narrow pad pitch. It becomes. The conventional cantilever type probe card can handle a pad pitch of 25 μm, but in this embodiment, the probe for the output terminal pad is alternately placed on two measured chips for each pad. Therefore, a liquid crystal driving semiconductor integrated circuit chip having a narrow pad pitch up to a pad pitch of 12.5 μm can be supported.

  The needle stand is alternately performed for each two pads to be measured, and each output pad of the chip to be measured 85 and the chip to be measured 86 is the same as that of the chip to be measured 85 as shown in FIG. The first output terminal pad and the nth output terminal pad of the chip 86 to be measured are short-circuited to each other by the pattern wiring. Similarly, the second output terminal pad of the chip 85 to be measured and the chip 86 to be measured 86 N sets of pads corresponding to the <n-1> output terminal pad, the third output terminal pad of the measured chip 85, and the <n-2> th output terminal pad of the measured chip 86 Are short-circuited by the wiring pattern. For this reason, the n output terminal probes 87 to 90 are connected to all output terminal pads of the chips to be measured 85 and 86, and the all output signals of the chip to be measured 85 and all the output signals of the chip to be measured 86 are electrically connected. Can be tested.

  FIG. 8 is a cross-sectional view of the probe card shown in FIG. A reinforcing plate 99 is attached to the top of the probe card substrate 100, and the probe needles 101 to 104 are fixed by spacers 97 and 98. In the measured chip 95 and measured chip 96, probe pads are set up on all pads with respect to the input / output terminal pads, whereas the output terminal pads are connected to the two measured chips 95 and 96. Since the probe needles are alternately raised, the number of multilayer structures of the probe needles in the output terminal pad is reduced to half.

  Therefore, the probe card can be easily manufactured by reducing the number of probe stand stages of the probe card. Further, as in the first embodiment, the probe needle needle stand is not concentrated on the adjacent sides of the two chips to be measured, so that the probe needle can be easily manufactured, repaired and adjusted. However, in this embodiment, since the number can be reduced to (2m + n), the probe card cost can be reduced.

  That is, in a liquid crystal driving semiconductor integrated circuit having 100 input / output terminals and 800 output terminals, a material having a probe needle unit price of 1200 yen is used, and material costs and manufacturing costs other than probe needles such as a probe card substrate are reduced. In the case of 200,000 yen, the cost of two simultaneous probe cards is greatly reduced from 2.36 million yen to 1.4 million yen.

  Also, as in the first embodiment, the semiconductor integrated circuit chip pad is scraped when the probe needle of the probe card contacts the pad of the semiconductor integrated circuit chip in the inspection of the semiconductor integrated circuit chip in the wafer test process. Even when the foreign matter that adheres to the probe needles of the probe card, since the number of probe needles on the sides adjacent to each other is small, the foreign matter attached to the probe needles can be easily removed.

  In FIGS. 5 to 8, two simultaneous measurement probe cards used for the inspection of a semiconductor integrated circuit chip for driving a liquid crystal have been described as the respective embodiments. However, four or more simultaneous measurement probe cards are used. Also good. FIG. 9 shows an example of an embodiment in which four liquid crystal driving semiconductor integrated circuit chips are measured simultaneously. In the measured chips 105 to 108, the probe needles are set up for all the pads of the four measured chips 105 to 108 in the input / output terminal pads. Only the needle stand of the number of pads of the measuring chips 105 to 108 is halved.

  Hereinafter, a description will be given of an implementation procedure in a test method for measuring two units using a liquid crystal driving semiconductor integrated circuit and a probe card according to the present invention. FIG. 10 is a schematic diagram of an output circuit portion and output terminal pads of each liquid crystal driving semiconductor integrated circuit chip shown in FIG. FIG. 11 is a timing chart of the function test of the output circuit in the case where the two semiconductor integrated circuit chips for driving the liquid crystal shown in FIG. 1 are measured simultaneously. FIG. 12 is a flowchart in the function test of the output circuit in the case where the two semiconductor integrated circuit chips for driving the liquid crystal shown in FIG. 1 are measured simultaneously.

  When performing a functional test of an output circuit, a test is performed by determining whether or not the output signal of the chip under test is being output correctly with respect to the signal input from the input terminal using a logic comparator called a digital comparator of the IC tester. .

  As a function test procedure regarding the output circuit of each liquid crystal driving semiconductor integrated circuit chip, first, power is supplied to each of the measured chips 165 and 166 which are the respective liquid crystal driving semiconductor integrated circuit chips, and then the measured chip. The high resistance control signal 167 of 165 and the high resistance control signal 168 of the chip to be measured 166 are set by the input from the high resistance control input terminals of the individual chips to be measured 165 and 166 so as to be LOW level. By setting the high resistance control signals 167 and 168 of the two measured chips 165 and 166 to the LOW level, the outputs 169 to 174 of the measured chip 165 and the outputs 175 to 180 of the measured chip 166 are all high resistance outputs. It becomes a state.

  Next, the chip to be measured 165 required for the function test of the output circuit in the high resistance output period in which the outputs 169 to 174 of the chip to be measured 165 and the outputs 175 to 180 of the chip to be measured 166 are all held at the high resistance output, The internal state setting of 166 is performed. Since the internal state is set to the same internal state by the two chips to be measured 165 and 166, they can be set simultaneously (step 1 shown in FIG. 12, hereinafter, step is abbreviated as S).

  Subsequently, test input data for testing the output circuit is input from the input / output terminal pad. Also in this case, since the same test input data is input by the two measured chips 165 and 166, the input can be performed simultaneously by the two measured chips 165 and 166.

  As shown in FIGS. 5 and 7, the probe needles of the probe card have a total of n because needles are raised only on one output terminal pad of the two output terminal pads short-circuited by the pattern wiring. The probe needles are in contact with the output terminal pad.

  After inputting the test input data for performing the test of the output circuit, the input from the high resistance control input terminal of the measured chip 165 is switched by switching the input from the high resistance control input terminal 167 of the measured chip 165. Is set to HIGH level (S2).

  At this time, the output of the measured chip 165 becomes active, and n output signals from the output signal <1> to the output signal <n> from the measured chip 165 are output from the output terminal pads, respectively. The probe needles of the n probe cards in contact with the output terminal pads supply n output signals of the chip to be measured 165 to the IC tester side.

  The IC tester tests the measured chip 165 by comparing whether the output signal of the measured chip 165 is normally output with the expected value data by the digital comparator, and the logic of the expected value data and the output signal match. If it does, the non-defective product is determined, and if they do not match, the defective product is determined (S3).

  After the test of the chip to be measured 165 is completed, the input from the high resistance control input terminal of the chip to be measured 165 is switched to set the high resistance control signal 167 to the LOW level, and the output of the chip to be measured 165 is in the high resistance output state. To. Next, in order to test the chip to be measured 166, the input from the high resistance control input terminal of the chip to be measured 166 is switched to set the high resistance control signal 168 to the HIGH level (S2).

  At this time, the output of the measured chip 166 becomes active, and n output signals from the output signal <1> to the output signal <n> from the measured chip 166 are output from the output terminal pads, respectively. The probe needles of the n probe cards in contact with the output terminal pads supply n output signals of the chip to be measured 166 to the IC tester side.

  The IC tester tests the measured chip 166 by comparing whether or not the output of the measured chip 166 is normally output with the expected value data using a digital comparator, and the logic of the expected value data and the output signal match. If it does not match, a defective product is determined (S4).

  After the test of the measured chip 166 is completed, the input from the high resistance control input terminal of the measured chip 166 is switched to set the high resistance control signal 168 to the LOW level, and the output of the measured chip 166 is set to the high resistance output state. To.

  As described above, as shown in the flowchart of FIG. 12, the function test of the output circuit in each of the two chips to be measured 165 and 166 is continuously performed while switching the output valid (enable) period of the chip to be measured 165 and the chip to be measured 166. And implement. Since the output circuit is alternately tested in the same measurement of each of the two chips to be measured 165 and 166, the test time is increased as compared with the two measurements in the conventional method.

  FIG. 13 is a list of test items of a general liquid crystal driving semiconductor integrated circuit. The test items that require the output to be valid in the test of the semiconductor integrated circuit for liquid crystal drive are some items such as the output circuit function test, and for other test items, the output should be tested in the high resistance output state. Can do. With respect to test items that can be tested in a high-resistance output state, two chips to be measured can be completely measured simultaneously. Further, regarding test items that need to be tested with the output of the semiconductor integrated circuit for driving the liquid crystal enabled, the internal state setting of the two chips to be measured described in the timing chart of the function test of the output circuit shown in FIG. Since data setting can be performed simultaneously on two chips to be measured, even if the output circuit function test is performed while switching the output, the total test time is 10 times compared to the conventional two wafer test process. Only increases by about%.

  The semiconductor integrated circuit according to the present invention can reduce the number of probe needles of the probe card used for the test and can widen the interval between the probe needles. Since the test cost can be suppressed, it can be suitably used in the field of image display such as a liquid crystal display device.

1 is a schematic view of a semiconductor integrated circuit for driving a liquid crystal according to the present invention. It is the schematic of an example regarding the pad for output terminals of the semiconductor integrated circuit for a liquid crystal drive concerning this invention. It is the schematic of another example regarding the pad for output terminals of the semiconductor integrated circuit for a liquid crystal drive concerning this invention. It is the schematic of an example in the pad for output terminals of the semiconductor integrated circuit for a liquid crystal drive concerning this invention, and an output circuit. It is the schematic of the needle stand part of the probe card of the semiconductor integrated circuit for a liquid crystal drive which concerns on 1st embodiment of this invention. FIG. 6 is a cross-sectional view of the probe card of the liquid crystal driving semiconductor integrated circuit shown in FIG. 5. It is the schematic of the needle stand part of the probe card of the semiconductor integrated circuit for liquid crystal drive which concerns on 2nd Embodiment of this invention. It is sectional drawing of the probe card of the semiconductor integrated circuit for a liquid crystal drive shown in FIG. It is the schematic of the needle stand part of the probe card for four measurement of the semiconductor integrated circuit for a liquid crystal drive based on 2nd Embodiment of this invention shown in FIG. It is the schematic which shows an example regarding the output circuit of the semiconductor integrated circuit for a liquid crystal drive concerning this invention, and the pad for output terminals. 11 is a timing chart showing an example when a functional test is performed in the liquid crystal driving semiconductor integrated circuit shown in FIG. 10. 4 is a flowchart showing an example of an output circuit function test in the semiconductor integrated circuit for driving a liquid crystal according to the present invention. It is a list of main test items of the semiconductor integrated circuit for driving the liquid crystal. It is the schematic which shows an example of a structure of the conventional semiconductor integrated circuit for a liquid crystal drive. It is the schematic of the probe card of the semiconductor integrated circuit for a liquid crystal drive shown in FIG. FIG. 15 is a schematic diagram of two probe cards for measuring two liquid crystal driving semiconductor integrated circuits shown in FIG. 14; It is the schematic of the needle stand part of the probe card for two measurement of the semiconductor integrated circuit for a liquid crystal drive shown in FIG. FIG. 17 is a cross-sectional view of two probe cards for measuring two liquid crystal driving semiconductor integrated circuits shown in FIG. 16; It is the schematic which shows an example at the time of making the short side of the needle stand part of the probe card | curd for the same measurement in two conventional liquid crystal drive semiconductor integrated circuits adjoin. It is the schematic of the needle stand part of the probe card of the semiconductor integrated circuit for a liquid crystal drive in a prior art. FIG. 21 is a cross-sectional view of the probe card of the semiconductor integrated circuit for driving liquid crystal shown in FIG. 20.

Explanation of symbols

1: Liquid crystal driving semiconductor integrated circuit 2: First input / output terminal pad of liquid crystal driving semiconductor integrated circuit 3: First output terminal pad of liquid crystal driving semiconductor integrated circuit 4: Liquid crystal driving semiconductor integrated circuit m-th input / output terminal pad 5: n-th output terminal pad of liquid crystal driving semiconductor integrated circuit 6: liquid crystal driving circuit portion 7 of liquid crystal driving semiconductor integrated circuit 7: probe card substrate 8: probe card reinforcing plate 9 : Probe card opening 10: Chip to be measured 11: Probe needle for the first output terminal of the semiconductor integrated circuit for driving liquid crystal 12: Probe needle for the nth output terminal of the semiconductor integrated circuit for driving liquid crystal 13: For driving the liquid crystal 1st input / output terminal probe needle 14 of a semiconductor integrated circuit: m-th input / output terminal probe needle 15 of a liquid crystal driving semiconductor integrated circuit 15: probe card substrate 16: probe Reinforcement plate 17: Probe card opening 18: First two measured chips 19 when measuring two: Second measured chip 20 when measuring two: First measured chip First output terminal probe needle 21: nth output terminal probe needle 22 of the first measured chip 22: first input / output terminal probe needle 23 of the first measured chip 23: 1 M-th input / output terminal probe needle 24 of the second measured chip: first output terminal probe needle 25 of the second measured chip 25: n-th output terminal probe of the second measured chip Needle 26: The first input / output terminal probe needle 27 of the second measured tip 27: The mth input / output terminal probe needle 28 of the second measured tip 28: The first one at the same time Of the second measured chip 29: the second measured chip 30 at the same time: the first measured chip 30: The first output terminal probe needle 31 of the chip: the nth output terminal probe needle 32 of the first measured chip 32: the first input / output terminal probe needle 33: 1 of the first measured chip M-th input / output terminal probe needle 34 of the second measured chip: first output terminal probe needle 35 of the second measured chip 35: for the nth output terminal of the second measured chip Probe needle 36: first input / output terminal probe needle 37 of the second measured tip 37: m-th input / output terminal probe needle 38 of the second measured tip 38: two at the same time Chip to be measured 39: Second chip to be measured 40-41 at the same time: Probe card spacer 42: Probe card reinforcing plate 43: Probe card substrate 44: Output of the first chip to be measured Terminal probe needle 45: 1st measurement Fixed tip I / O terminal probe needle 46: Second measuring tip output terminal probe needle 47: Second measuring tip I / O terminal probe needle 48: Two, one at the same time Measurement tip 49 for eye 49: Second measurement tip 50 at the same time: First probe needle 51 for output terminal of first measurement tip 51: nth measurement for first measurement tip 51 Output terminal probe needle 52: first input / output terminal probe needle 53 of the first measured chip 53: mth input / output terminal probe needle 54 of the first measured chip: second N-th output terminal probe needle 55 of the measured chip 55: first output terminal probe needle 56 of the second measured chip 56: m-th input / output terminal probe needle 57 of the second measured chip : Probe needle 58 for the first input / output terminal of the second chip to be measured First measured chip 59 when measuring two: Second measured chip 60 to 61 when measuring two: Probe card spacer 62: Probe card reinforcing plate 63: Probe card substrate 64: 1 Probe needle 65 for the output terminal of the first chip to be measured: Probe needle for input / output terminal 66 of the first chip to be measured 66: Probe needle 67 for input / output terminal of the second chip to be measured 67: Second needle Probe needle 68 for output terminal of measured tip: first measured tip 69 when measuring two: second measured tip 70 when measuring two: n of first measured tip The probe needle 71 shared by the first output terminal and the first output terminal of the second measured chip: the first output terminal of the first measured chip and the nth of the second measured chip Probe needle 72 shared by output terminals: 1st measurement Probe needle 73 for the m-th input / output terminal of the chip: First probe needle 74 for the first input / output terminal of the first measured chip: Probe needle 75 for the first output terminal of the second measured chip: The m-th output terminal probe needle 76 of the second measured chip 76: the first measured chip 77 at the time of measuring two: the second measured chips 78 to 79 at the time of measuring two: Probe card spacer 80: Probe card reinforcing plate 81: Probe card substrate 82: Probe needle 83: shared by the output terminal of the first measured chip and the output terminal of the second measured chip I / O terminal probe needle 84 of the measurement chip: I / O terminal probe needle 85 of the second measured chip 85: The first measured chip 86 at the time of two measurements: Two at the same measurement Eye to be measured 87: n of the first chip to be measured Probe needle 88 shared by the first output terminal and the first output terminal of the second measured chip: <n-1> output terminal and second measured chip of the first measured chip The probe needle 89 shared by the second output terminal of the first: The probe needle 90 shared by the second output terminal of the first measured chip and the <n−1> th output terminal of the second measured chip. : Probe needle 91 shared by the first output terminal of the first measured chip and the nth output terminal of the second measured chip: For the mth input / output terminal of the first measured chip Probe needle 92: First input / output terminal probe needle 93 of the first measured tip 93: First output terminal probe needle 94 of the second measured tip 94: m of the second measured tip The first output terminal probe needle 95: 2 at the same time Chip to be measured 96: the second chip to be measured 97 to 98 at the time of two measurements: probe card spacer 99: probe card reinforcing plate 100: probe card substrate 101: input / output of the first chip to be measured Probe needles 102 to 103 for terminals: Probe needle 104 shared by the output terminal of the first measured tip and the output terminal of the second measured tip 104: Probe needle for the input / output terminals of the second measured tip 105: Four chips measured at the same time 106: First measured chip 106: Four chips measured at the same time 107: Four chips measured at the same time 107: Four chips measured at the same time 108: Four chips measured at the same time 4th measured chip 109 at the time of measurement: 2nd measured chip 110 at the same time: 2nd measured chip 111 at the same time 2nd measured chip 111: 1st measured chip nth output terminal pad 112: 1st chip to be measured First output terminal pad 113: m-th input / output terminal pad 114 of the first measured chip 114: first input / output terminal pad 115 of the first measured chip 115: second First output terminal pad 116 of the chip to be measured 116: nth output terminal pad 117 of the second chip to be measured 117: First input / output terminal pad 118 of the second chip to be measured 118: 2 M-th input / output terminal pad 119 of the measured chip of the eye 119: the first measured chip 120 when measuring two: the second measured chip 121 when measuring two: 121: the scribe line 122: Nth output terminal pad 123 of the first measured chip 123: <n-1> th output terminal pad 124 of the first measured chip 124: <n-2 of the first measured chip > First output terminal pad 125: second measured chip First output terminal pad 126: second output terminal pad 127 of second chip to be measured 127: third output terminal pads 128 to 130 of second chip to be measured 128: 130 for pad short circuit Wiring 131: First chip to be measured 132 when measuring two simultaneously 132: Second chip to be measured 133 when simultaneously measuring two: Scribing line 134: nth output terminal of the first chip to be measured Pad 135: <n-1> th output terminal pad 136 of the first measured chip 136: <n-2> th output terminal pad 137 of the first measured chip 137: second First output terminal pad 138 of the chip to be measured: Second output terminal pad 139 of the second chip to be measured 139: Third output terminal pads 140 to 142 of the second chip to be measured 140 to 142: Pads Short-circuit wiring 143: first output terminal Pad 144: second output terminal pad 145: third output terminal pad 146: fourth output terminal pad 147: <n-1> th output terminal pad 148: nth output terminal Pads 149 to 154: Output circuit 155: First measured chip 156 at the time of two simultaneous measurements 156: Second measured chip 157 at the same time of two measurements: First of the first measured chips Input / output terminal probe needle 158: m-th input / output terminal probe needle 159 of the first measured chip 159: first input / output terminal probe needle 160 of the second measured chip 160: second Probe needle 161 for the m-th input / output terminal of the measured chip 161: Probe needle for the first output terminal 162 of the first measured chip 162: Probe needle 163 for the n-th output terminal of the first measured chip : Second chip to be measured First output terminal probe needle 164: n-th output terminal probe needle 165: two first measurement tips 166: two first measurement tips 166: two second measurement tips 2 The first measured chip 167: a signal for switching the output of the first measured chip between the high resistance state and the data output state 168: the output of the second measured chip is switched between the high resistance state and the data output state Switching signal 169: n-th output terminal pad 170 of the first measured chip 170: <n-1> th output terminal pad 171 of the first measured chip 171: 1st measured chip <N-2> first output terminal pad 172: first measured chip <n-3> first output terminal pad 173: second output terminal pad 174 of first measured chip : First output terminal of the first chip to be measured Pad 175: The first output terminal pad 176 of the second measured chip 176: The second output terminal pad 177 of the second measured chip 177: The third output of the second measured chip Terminal pad 178: Fourth output terminal pad 179 of the second measured chip 179: <n-1> th output terminal pad 180 of the second measured chip 180: Second measured chip N-th output terminal pad 190: pattern wiring

Claims (8)

In a plurality of semiconductor integrated circuit chips arranged symmetrically so that the output terminal sides are adjacent to each other to be tested simultaneously on the semiconductor wafer,
1. A semiconductor integrated circuit, comprising: a pattern wiring that short-circuits each output terminal of one semiconductor integrated circuit chip and each output terminal of the other adjacent semiconductor integrated circuit chip. The semiconductor integrated circuit according to claim 1,
A semiconductor integrated circuit, wherein a control function unit capable of arbitrarily controlling the output terminal to a high resistance output state is provided. The semiconductor integrated circuit according to claim 1 or 2,
2. The semiconductor integrated circuit according to claim 1, wherein the pattern wiring is provided so as to straddle a dividing line for individually dividing a plurality of semiconductor integrated circuit chips. The semiconductor integrated circuit according to any one of claims 1 to 3,
2. A semiconductor integrated circuit, wherein the plurality of semiconductor integrated circuit chips is two. In the semiconductor integrated circuit of any one of Claim 1 thru | or 4, In the probe card for the same measurement for testing simultaneously several semiconductor integrated circuit chips on a semiconductor wafer,
In the pad of the output terminal on the adjacent side of the plurality of semiconductor integrated circuit chips, a first probe portion is provided so as to perform needle stand on all pads of only one semiconductor integrated circuit chip,
A probe card characterized in that a second probe portion is provided so that only the input / output pads on the non-adjacent side have needles placed on all pads of both chips. In the semiconductor integrated circuit of any one of Claim 1 thru | or 4, In the probe card for the same measurement for testing simultaneously several semiconductor integrated circuit chips on a semiconductor wafer,
In the pads of the output terminals on the adjacent side of the plurality of semiconductor integrated circuit chips, a first probe unit is provided so as to perform needle standing only on one side of the pads short-circuited by the pattern wiring,
A probe card characterized in that a second probe part is provided so that needle pads are provided on all pads of both chips in the non-adjacent input / output pads. In the semiconductor integrated circuit of any one of Claim 1 thru | or 4, In the probe card for the same measurement for testing simultaneously several semiconductor integrated circuit chips on a semiconductor wafer,
In the pads of the output terminals on the adjacent side of the plurality of semiconductor integrated circuit chips, a first probe unit is provided so as to alternately perform needle raising on the pads short-circuited by the pattern wiring,
A probe card characterized in that a second probe part is provided so that needle pads are provided on all pads of both chips in the non-adjacent input / output pads. A semiconductor, wherein a plurality of simultaneous measurements are performed on the semiconductor integrated circuit according to any one of claims 1 to 4 using the probe card according to any one of claims 5 to 7. Integrated circuit testing method.

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