JP2004144975A5 - - Google Patents

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Publication number
JP2004144975A5
JP2004144975A5 JP2002309416A JP2002309416A JP2004144975A5 JP 2004144975 A5 JP2004144975 A5 JP 2004144975A5 JP 2002309416 A JP2002309416 A JP 2002309416A JP 2002309416 A JP2002309416 A JP 2002309416A JP 2004144975 A5 JP2004144975 A5 JP 2004144975A5
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2002309416A
Other languages
Japanese (ja)
Other versions
JP2004144975A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2002309416A priority Critical patent/JP2004144975A/ja
Priority claimed from JP2002309416A external-priority patent/JP2004144975A/ja
Priority to US10/442,960 priority patent/US7033925B2/en
Priority to CNB031548423A priority patent/CN100336197C/zh
Publication of JP2004144975A publication Critical patent/JP2004144975A/ja
Publication of JP2004144975A5 publication Critical patent/JP2004144975A5/ja
Priority to US11/360,384 priority patent/US20060141774A1/en
Withdrawn legal-status Critical Current

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JP2002309416A 2002-10-24 2002-10-24 パターン転写マスク、半導体装置の製造方法、及び、マスクパターン作成用コンピュータプログラム Withdrawn JP2004144975A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2002309416A JP2004144975A (ja) 2002-10-24 2002-10-24 パターン転写マスク、半導体装置の製造方法、及び、マスクパターン作成用コンピュータプログラム
US10/442,960 US7033925B2 (en) 2002-10-24 2003-05-22 Pattern transfer mask related to formation of dual damascene structure and method of forming dual damascene structure
CNB031548423A CN100336197C (zh) 2002-10-24 2003-08-15 图案复制掩模、半导体装置制造方法及掩模图案制作用程序
US11/360,384 US20060141774A1 (en) 2002-10-24 2006-02-24 Pattern transfer mask related to formation of dual damascene structure and method of forming dual damascene structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002309416A JP2004144975A (ja) 2002-10-24 2002-10-24 パターン転写マスク、半導体装置の製造方法、及び、マスクパターン作成用コンピュータプログラム

Publications (2)

Publication Number Publication Date
JP2004144975A JP2004144975A (ja) 2004-05-20
JP2004144975A5 true JP2004144975A5 (enExample) 2005-12-22

Family

ID=32105266

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002309416A Withdrawn JP2004144975A (ja) 2002-10-24 2002-10-24 パターン転写マスク、半導体装置の製造方法、及び、マスクパターン作成用コンピュータプログラム

Country Status (3)

Country Link
US (2) US7033925B2 (enExample)
JP (1) JP2004144975A (enExample)
CN (1) CN100336197C (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006095915A1 (ja) * 2005-03-09 2006-09-14 Nec Corporation 多層配線構造、半導体装置、パターン転写マスク、及び多層配線構造の製造方法
KR100898222B1 (ko) * 2007-08-30 2009-05-18 주식회사 동부하이텍 반도체 소자 및 그 제조 방법
CN102683876B (zh) * 2012-04-28 2016-01-06 深圳光启创新技术有限公司 超材料的制备工艺
CN103019042B (zh) * 2012-11-29 2015-01-07 上海华力微电子有限公司 改善高透光率掩膜板套刻精度稳定性的方法
CN107505811B (zh) * 2017-09-11 2020-05-05 深圳市华星光电技术有限公司 光罩
US10481487B2 (en) 2017-09-11 2019-11-19 Shenzhen China Star Optoelectronics Technology Co., Ltd Mask
CN112711173A (zh) * 2020-12-31 2021-04-27 苏州科阳半导体有限公司 一种光罩

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0450943A (ja) * 1990-06-15 1992-02-19 Mitsubishi Electric Corp マスクパターンとその製造方法
JPH0844038A (ja) 1994-08-03 1996-02-16 Matsushita Electron Corp マスターマスク作成装置及び半導体装置の製造方法
JPH1012543A (ja) * 1996-06-20 1998-01-16 Mitsubishi Electric Corp 位相シフトマスクを用いたパターンの形成方法
JPH11307426A (ja) 1998-04-22 1999-11-05 Toshiba Corp マスクパターンの補正方法と補正システム、及びこれらを用いた露光用マスクと半導体装置
JP2000058647A (ja) 1998-08-17 2000-02-25 Toshiba Corp 半導体装置の製造方法
JP2000077524A (ja) * 1998-09-03 2000-03-14 Matsushita Electronics Industry Corp パターン形成方法
US6355399B1 (en) * 2000-01-18 2002-03-12 Chartered Semiconductor Manufacturing Ltd. One step dual damascene patterning by gray tone mask
JP2001351924A (ja) * 2000-06-08 2001-12-21 Mitsubishi Electric Corp 半導体装置の製造方法
JP3760086B2 (ja) * 2000-07-07 2006-03-29 株式会社ルネサステクノロジ フォトマスクの製造方法
US6436810B1 (en) * 2000-09-27 2002-08-20 Institute Of Microelectronics Bi-layer resist process for dual damascene
KR100475074B1 (ko) * 2002-05-16 2005-03-10 삼성전자주식회사 반도체 소자의 커패시터의 스토리지 전극 제조 방법

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