JP2004071852A - Multilayer substrate - Google Patents

Multilayer substrate Download PDF

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Publication number
JP2004071852A
JP2004071852A JP2002229521A JP2002229521A JP2004071852A JP 2004071852 A JP2004071852 A JP 2004071852A JP 2002229521 A JP2002229521 A JP 2002229521A JP 2002229521 A JP2002229521 A JP 2002229521A JP 2004071852 A JP2004071852 A JP 2004071852A
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Japan
Prior art keywords
conductor pattern
laminated substrate
conductor
multilayer substrate
deformation
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JP2002229521A
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JP4099756B2 (en
Inventor
Shuichi Watanabe
渡辺 修一
Mitsuhiro Azumaguchi
東口 光博
Yuichi Nishi
西 雄一
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Proterial Ltd
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Hitachi Metals Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer substrate without deformation even after monolithic sintering. <P>SOLUTION: The multilayer substrate is adapted such that a plurality of ceramic green sheets each having a conductor pattern printed and formed thereon are laminated into a plate-shaped molding, and the conductor pattern and the ceramic green sheets are sintered in a monolithic manner. In the multilayer substrate, there are provided a plurality of first parting grooves in a principal surface of the multilayer substrate in parallel to each other, a plurality of second parting grooves perpendicular to the first parting grooves, internal circuit components on a plurality of individual laminates parted along the first and second parting grooves by making use of a conductor pattern, and a deformation suppressing conductor layer comprising the conductor pattern around an individual laminate formation region on the multilayer substrate. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、誘電体や磁性体のセラミックスグリーンシートとインダクタやコンデンサなどの回路素子を構成する導体パターンと一体焼結した積層基板に関し、その焼結時の反り、変形の抑制に関する。
【0002】
【従来の技術】
近年、各種の電子機器や電子装置等に対して小型化,薄型化,高機能化等の要求が高まっており、それに伴ってチップコンデンサ、チップインダクタといった単機能の面実装型部品は言うに及ばず、前記コンデンサやインダクタを多数複合・集積化した複合積層部品にも同様の要求がある。
前記複合積層部品における個片積層体(セラミック基板片)の製造に用いる積層基板は、以下の製造方法によって得られる。例えば低温焼成が可能なセラミック誘電体材料粉末に有機バインダー、可塑剤及び有機溶剤をボールミルにより混合し、粘度調整後、ドクターブレード、パイプドクター等の公知のシート成形方法によりセラミックグリーンシートを形成する。次に各グリーンシートにインダクタやコンデンサ、これらをつなぐ接続線路を構成する導体パターンをCuやAg等の導電性ペーストにより印刷する。また前記グリーンシートには層間の導体パターンを接続するビアホールが形成される。得られた導体パターン付きグリーンシートを適宜重ねあわせて、80℃の温度で、12MPaの圧力で熱圧着して板状成形体とし、この板状成形体の主面に鋼刃で2方向に切断溝を形成し、これを積み重ねた状態で焼成炉に入れ、例えば900℃〜1000℃で2〜8時間焼結することによって製造される。
【0003】
【発明が解決しようとする課題】
ところで、前記積層基板のセラミック層と導体パターンとは、その収縮特性が異なるため、焼結時に積層基板が変形することがあった。前述のように、導体パターンはAgやCuなどで構成され、セラミック層は例えばAlを主成分とし、SiO、SrO、CaO、PbO、NaO及びKOの少なくとも1種を複成分とする低温焼結可能な誘電体材料であり、また他の例では、Alを主成分とし、MgO、SiO及びGdOの少なくとも1種を複成分として含む低温焼結可能な誘電体材料であり、また他の例では、Bi、Y、CaCO、Fe、In及びVの少なくとも1種を含む低温焼結可能な磁性セラミック材料であって、セラミックス成分を工夫して低温焼結化させている。
このため、互いの焼結収縮率が非常に大きく、また互いの収縮特性が異なり、一般に導体パターンが早く収縮を開始するが、セラミック層の収縮時には、既に導体パターン部分の収縮は終了しており、セラミック層の均一な収縮を阻害することにより積層基板の変形が招じると考えられる。
とりわけ、積層基板内における導体パターンの配置が積層方向に非対称になっているときに変形量が大きくなる。以下図5(a)及び(b)の積層基板断面図を用いて説明する。図5(a)は、導体パターン7が積層方向に対称に形成される場合であって、この場合には変形量を少なくすることが出来るが、図5(b)に示すように導体パターン7が積層方向に非対称に形成されている場合、導体パターン7が集中している側の収縮と、集中していない側の収縮に差が生じ変形を生じていた。
積層基板に形成される導体パターンは、内蔵される回路素子の増加に伴って複雑化するとともに、導体パターン間での浮遊容量や電磁気的な結合干渉を極力排除し、電気的特性を維持しながら積層基板の積層方向に対称に配置してその変形を抑止することは実質困難であった。
【0004】
また、板状成形体の状態で切断溝を刻設し、これを焼結すると、一方の主面にのみ切断溝を刻設した場合には、積層基板の両主面のうち切断溝を刻設しない側の主面が、切断溝を刻設した側の主面より大きく収縮する傾向を呈して、積層基板が変形するといった問題や、両主面に切断溝を刻設する場合であっても、その深さが異なる場合に、浅い切断溝を有する主面側が他方より大きく収縮する傾向を呈して、積層基板が変形するといった問題があった。
【0005】
そこで本発明は、板状成形体内に形成された導体パターンが積層方向で非対称な状態にあっても、また切断溝を前記板状成形体の両主面に均等に刻設しない場合でも、一体焼結後に変形のない積層基板を提供することを目的とする。
【0006】
【課題を解決するための手段】
本発明は、導体パターンが印刷形成されたセラミックグリーンシートを複数積層して板状成形体となし、前記導体パターンとセラミックグリーンシートとを一体焼結した積層基板において、前記積層基板の主面には互いに平行な複数の第1の分割溝と前記第1の分割溝と直交する複数の第2の分割溝を有し、前記第1及び第2の分割溝に沿って分割してなる複数の個片積層体には、前記導体パターンにより内部回路素子が形成されており、前記積層基板の個片積層体形成領域の周囲に前記導体パターンからなる変形抑止導体層を形成した積層基板である。
【0007】
【発明の実施の形態】
グリーンシートと、その表面に形成した導体パターンを一体焼成する際、まずAg,Cuなどの導体パターンを構成する導体が、そのガラス転移点に達した時点より収縮を開始する。続いてグリーンシートのセラミックスが、そのガラス転移点に達した時点より収縮を開始する。
このように収縮は一般に導体パターンの方が先行し、導体が結晶化ピーク点を抑えると、その収縮はほぼ完了する。一方、セラミックスはその結晶化ピーク点が導体よりも更に高いため引き続き収縮し、結晶化ピーク点を迎えて収縮はほぼ完了する。
積層基板に用いられるセラミック材料は、一般に比較的低温で焼結が可能となるように、焼結の途中でガラスとなり易い成分、あるいは液相を形成しやすい成分を含んでいるため、焼結過程の後半における高密度化が進行する段階で、セラミック材料自体が柔らかくなり、前記セラミックと導体パターンの収縮特性の異なりによる焼結時の積層基板内における応力の不均一な分布によって変形が生じる。
そこで本発明者等は、積層基板の製造時に前記積層基板の個片積層体形成領域の周囲に前記導体パターンと同一の導体材料を用いて変形抑止導体層を形成することで変形を抑制することを見出した。
図1は、本発明の一実施例に係る積層基板の分解斜視図である。
前記変形抑止導体層4は、積層基板の外縁部近傍に製品となる個片積層体全体を囲むように形成され、平面視パターンや層数、形成位置などは個片積層体部2の導体パターン(図示せず)とセラミック層の非対称性による積層基板1内の応力不均一を解消するように適宜設定される。前記変形抑止導体層4は、回路素子を構成する導体パターンと同じ導体を用いるので、両者は当然同様の収縮特性を示し、変形抑止導体層4が回路素子を構成する導体パターンの収縮を阻害することがない。そして、先に収縮が完了した導体パターンにより、焼結過程の後半における高密度化が進行する段階でも、変形が少ない状態が維持され、その結果、極めて変形が小さい積層基板1を得ることが出来る。
前記変形抑止導体層を形成する前記領域は個片積層体部2とは異なり、一般に製品として供するものでなく廃棄される部分であって、この領域に変形抑止のための導体パターンを積極的に形成する思想は従来なかった。
【0008】
また、積層基板に刻設される切断溝3により生じる応力の不均一も前記変形抑止導体層4により、解消することが出来、もって極めて変形が小さい積層基板を得ることが出来る。
【0009】
【実施例】
本発明に係る積層基板の製造方法の一実施例を説明する。
まず、セラミックグリーンシート準備工程を説明する。ドクターブレード法により、誘電体セラミックス粉末、バインダ、及び可塑剤よりなるセラミックスラリーを、ポリエチレンテレフタレートフィルムからなるキャリアフィルム上に均一な厚さで塗布し、数十μmから数百μmのグリーンシートを形成する。そして乾燥後のグリーンシートを、キャリアシートが付いたまま所定の寸法に裁断する。
次に導体パターン形成工程を説明する。スクリーン印刷法などにより、キャリアシートの反対面であるグリーンシートの主面の製品部分となる所定箇所に、回路素子を構成する導体パターンを印刷形成する。印刷用ペーストは回路として作用するAg金属粉と、これを印刷面に定着するための粘着剤を有している。
一部のグリーンシートには図2に示すようにグリーンシート5の外縁近傍で複数の個片積層体部2を取り囲むように、平面視で導体パターンが枠状に形成された変形抑止導体層4を形成している。この変形抑止導体層4とともに回路素子(図示せず)を構成する導体パターンを印刷形成するグリーシート5や、変形抑止導体層4のみ形成したグリーシート5を準備する。
図3(a)〜(f)に変形抑止導体層の他の例を示す。ここでは、変形抑止導体層の平面視パターンを拡大して図示している。例示するように非連続パターンを形成しても良く、また積層方向における形成位置は、積層方向全体にわたって形成したり、積層基板の上下面近傍のみに形成したりしてもよく、回路素子を構成する導体パターンや切断溝の深さ等の形成条件、セラミック層の収縮特性や物性性等により、本発明の技術思想を逸脱しない限り、図1や図2に例示するものに限定されるものではなく自由に構成できる。
【0010】
次に、グリーンシートを所定の順序に積層・圧着し、厚さがほぼ0.8mmの平板状成形体とする。前記グリーンシートにはビアホールが形成されており、セラミック層間の導体パターンが適宜接続され、回路素子として機能するように構成される。
その後、平板状成形体の主面に互いに平行な複数の第1の分割溝と前記第1の分割溝と直交する複数の第2の分割溝を、それぞれほぼ0.1mmの深さとなるように鋼刃で刻設する。その後、平板状成形体を脱脂・焼結して80mm×75mm×0.8mmの積層基板とした。
前記分割溝の深さは、分割のし易さや取り扱い易さ等から、50μm〜300μmの範囲で適宜設定される。
【0011】
また変形抑止導体層を有さない以外は、前記実施例と同様な工程を経た積層基板を得て、比較例の試料とした。
【0012】
上記により選られた積層基板をそれぞれ10枚準備し、三次元測定器のワークテーブルに配置し、レーザー変位計により積層方向(三次元測定器のZ軸方向)の変位量を計測し、これを例えば2mmピッチで繰り返して、積層基板の一主面全体の変位を得て、コンピュータ処理して積層基板をワークテーブルに配置したときの傾きを補正し、得られた最大測定値と最小測定値の差を変形量として定義して評価した。その結果、比較例の変形量の平均値は361μmであるのに対し、実施例の変形量は40μmと変形量を著しく抑制することが出来た。
【0013】
なお、前記変形抑止導体層が切断溝と積層方向に重複する部位に複数層にわたって形成されていると、個片積層体に分割する際に、割れの進行を阻害する場合があるが、そのような場合には、例えば図2(a)に示すように変形抑止導体層を不連続となるようにし、変形抑止導体層の切断溝と積層方向に重複する部位には、導体層を形成しないようにすれば良い。
また、前記変形抑止導体層が複数層にわたって形成されていると、導体パターンとグリーンシートの圧力に対する変形能の差から、圧着性が劣化する場合もあるが、変形抑止導体層の導体パターンを適宜形成し、図4に示す積層基板断面図のように隣り合うセラミック層5に形成された変形抑止導体層4が積層方向に極力重ならないように形成すれば良い。
【0014】
【発明の効果】
本発明によれば、内部に複数の回路素子を構成する導体パターンを有する積層基板において、前記導体パターン構造が積層方向に非対称であったり、切断溝により変形を生じ易い構造であっても、積層基板の変形を抑制することが出来るものであり、積層基板の品質を向上させるものである。
【図面の簡単な説明】
【図1】本発明の一実施例に係る積層基板の分解斜視図である。
【図2】本発明の一実施例に用いる変形抑止導体層が形成されたセラミックグリーンシートの平面図である。
【図3】(a)〜(f) 本発明の他の実施例に係る変形抑止導体層の形成パターン拡大図である。
【図4】本発明の一実施例に係る積層基板の変形抑止導体層部の断面図である。
【図5】(a)、(b) 従来の積層基板の断面図である。
【符号の説明】
1 積層基板
2 個片積層体部
3 分割溝
4 変形抑止導体層
5 セラミックグリーンシート
6 セラミック層
7 導体パターン
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a laminated substrate formed by integrally sintering a dielectric or magnetic ceramic green sheet and a conductor pattern constituting a circuit element such as an inductor or a capacitor, and relates to suppression of warpage and deformation during sintering.
[0002]
[Prior art]
In recent years, there has been an increasing demand for miniaturization, thinning, and high functionality of various electronic devices and electronic devices. Accordingly, single-function surface mount components such as chip capacitors and chip inductors, needless to say. However, there is a similar demand for a composite laminated component in which a large number of the capacitors and inductors are composited and integrated.
A laminated substrate used for producing an individual laminated body (ceramic substrate piece) in the composite laminated component is obtained by the following production method. For example, an organic binder, a plasticizer, and an organic solvent are mixed with a ceramic dielectric material powder that can be fired at a low temperature by a ball mill, and after adjusting the viscosity, a ceramic green sheet is formed by a known sheet forming method such as a doctor blade or a pipe doctor. Next, on each green sheet, a conductor pattern forming an inductor, a capacitor, and a connection line connecting these is printed with a conductive paste such as Cu or Ag. Also, via holes for connecting conductive patterns between layers are formed in the green sheet. The obtained green sheets with a conductor pattern are appropriately laminated, and thermocompression-bonded at a temperature of 80 ° C. and a pressure of 12 MPa to form a plate-like molded body, and the main surface of the plate-like molded body is cut in two directions with a steel blade. It is manufactured by forming grooves, stacking them in a firing furnace, and sintering them at, for example, 900 ° C. to 1000 ° C. for 2 to 8 hours.
[0003]
[Problems to be solved by the invention]
By the way, since the ceramic layer and the conductor pattern of the laminated substrate have different shrinkage characteristics, the laminated substrate may be deformed during sintering. As described above, the conductor pattern is made of Ag, Cu, or the like, and the ceramic layer has, for example, Al 2 O 3 as a main component and at least one of SiO 2 , SrO, CaO, PbO, Na 2 O, and K 2 O. A low-temperature sinterable dielectric material having multiple components. In another example, low-temperature sinterable dielectric material containing Al 2 O 3 as a main component and at least one of MgO, SiO 2 and GdO as a multiple component. A dielectric material, and in another example, low temperature sinterable comprising at least one of Bi 2 O 3 , Y 2 O 3 , CaCO 3 , Fe 2 O 3 , In 2 O 3 and V 2 O 5 It is a magnetic ceramic material, which is sintered at a low temperature by devising a ceramic component.
For this reason, the sintering shrinkage rates of each other are very large, and the shrinkage characteristics of each other are different. Generally, the conductor pattern starts to shrink quickly, but when the ceramic layer shrinks, the shrinkage of the conductor pattern portion has already ended. It is considered that the uniform shrinkage of the ceramic layer is hindered, thereby causing deformation of the laminated substrate.
In particular, when the arrangement of the conductor patterns in the laminated substrate is asymmetric in the laminating direction, the amount of deformation increases. This will be described below with reference to the cross-sectional views of the laminated substrate shown in FIGS. FIG. 5A shows a case where the conductor pattern 7 is formed symmetrically in the stacking direction. In this case, the amount of deformation can be reduced, but as shown in FIG. Are formed asymmetrically in the stacking direction, a difference occurs between the shrinkage on the side where the conductor pattern 7 is concentrated and the shrinkage on the side where the conductor pattern 7 is not concentrated, resulting in deformation.
The conductor pattern formed on the laminated board becomes complicated with the increase of the built-in circuit elements, and the stray capacitance and the electromagnetic coupling interference between the conductor patterns are eliminated as much as possible while maintaining the electrical characteristics. It is substantially difficult to arrange the laminated substrates symmetrically in the laminating direction to suppress the deformation.
[0004]
Also, when cutting grooves are cut in the form of a plate-shaped molded body and sintered, when cutting grooves are cut on only one main surface, the cutting grooves are cut on both main surfaces of the laminated substrate. The main surface on the side where the cutting groove is not provided has a tendency to shrink more than the main surface on the side where the cutting groove is carved, and there is a problem that the laminated substrate is deformed, or the case where the cutting groove is carved on both main surfaces. However, when the depths are different, there is a problem that the main surface having the shallow cut groove tends to shrink more than the other, and the laminated substrate is deformed.
[0005]
Therefore, the present invention provides a method for integrally forming a conductive pattern formed in a plate-shaped molded body even when the conductive grooves are asymmetrical in the laminating direction, and when the cut grooves are not equally formed on both main surfaces of the plate-shaped molded body. An object of the present invention is to provide a laminated substrate that does not deform after sintering.
[0006]
[Means for Solving the Problems]
The present invention provides a plate-shaped molded body by laminating a plurality of ceramic green sheets on which a conductor pattern is printed and formed, and in a laminated substrate obtained by integrally sintering the conductor pattern and the ceramic green sheet, the main surface of the laminated substrate Has a plurality of first division grooves parallel to each other and a plurality of second division grooves orthogonal to the first division grooves, and a plurality of divisions formed along the first and second division grooves. An internal circuit element is formed in the individual laminate by the conductor pattern, and a deformation suppressing conductor layer formed of the conductor pattern is formed around an individual laminate formation region of the multilayer substrate.
[0007]
BEST MODE FOR CARRYING OUT THE INVENTION
When the green sheet and the conductor pattern formed on the surface of the green sheet are integrally fired, first, the conductor constituting the conductor pattern such as Ag or Cu starts shrinking from the time when the glass transition point is reached. Subsequently, the ceramic of the green sheet starts shrinking when the glass transition point is reached.
As described above, the contraction generally precedes the conductor pattern. When the conductor suppresses the crystallization peak point, the contraction is almost completed. On the other hand, the ceramic has a crystallization peak point higher than that of the conductor, and thus contracts continuously.
The ceramic material used for the laminated substrate generally contains a component that easily becomes glass during sintering or a component that easily forms a liquid phase so that sintering can be performed at a relatively low temperature. In the later stage of high density, the ceramic material itself becomes soft, and deformation occurs due to uneven distribution of stress in the laminated substrate during sintering due to the difference in shrinkage characteristics between the ceramic and the conductor pattern.
Therefore, the present inventors have proposed to suppress deformation by forming a deformation suppressing conductor layer using the same conductor material as the conductor pattern around the individual laminated body forming region of the laminated substrate during the production of the laminated substrate. Was found.
FIG. 1 is an exploded perspective view of a laminated substrate according to one embodiment of the present invention.
The deformation suppressing conductor layer 4 is formed in the vicinity of the outer edge of the laminated substrate so as to surround the entire individual laminated body as a product, and the pattern in plan view, the number of layers, the formation position, and the like are the conductor patterns of the individual laminated body part 2. (Not shown) and the non-uniformity of the stress in the laminated substrate 1 due to the asymmetry of the ceramic layer. Since the deformation suppressing conductor layer 4 uses the same conductor as the conductor pattern forming the circuit element, both naturally exhibit the same shrinkage characteristics, and the deformation suppressing conductor layer 4 inhibits the contraction of the conductor pattern forming the circuit element. Nothing. Then, the conductor pattern that has been contracted earlier maintains a state where little deformation occurs even in a stage where densification progresses in the latter half of the sintering process, and as a result, it is possible to obtain a laminated substrate 1 with extremely small deformation. .
The area where the deformation suppressing conductor layer is formed is different from the individual laminated body part 2 and is generally a part which is not provided as a product but is discarded. There has never been a thought to form.
[0008]
Further, the unevenness of the stress caused by the cut grooves 3 cut in the laminated substrate can be eliminated by the deformation suppressing conductor layer 4, and a laminated substrate with extremely small deformation can be obtained.
[0009]
【Example】
An embodiment of the method for manufacturing a laminated substrate according to the present invention will be described.
First, a ceramic green sheet preparation step will be described. By doctor blade method, ceramic slurry consisting of dielectric ceramic powder, binder and plasticizer is applied on carrier film consisting of polyethylene terephthalate film with uniform thickness to form green sheet of several tens μm to several hundred μm. I do. Then, the dried green sheet is cut into a predetermined size with the carrier sheet attached.
Next, the conductor pattern forming step will be described. By a screen printing method or the like, a conductor pattern constituting a circuit element is formed by printing on a predetermined portion which is a product portion on the main surface of the green sheet opposite to the carrier sheet. The printing paste has an Ag metal powder acting as a circuit and an adhesive for fixing the metal powder to a printing surface.
As shown in FIG. 2, some of the green sheets surround the plurality of individual laminate portions 2 in the vicinity of the outer edge of the green sheet 5, and the deformation suppressing conductor layer 4 has a conductor pattern formed in a frame shape in plan view. Is formed. A grease sheet 5 for printing and forming a conductor pattern constituting a circuit element (not shown) together with the deformation suppressing conductor layer 4 and a grease sheet 5 on which only the deformation suppressing conductor layer 4 is formed are prepared.
3A to 3F show other examples of the deformation suppressing conductor layer. Here, the plan view pattern of the deformation suppressing conductor layer is shown in an enlarged manner. As illustrated, a non-continuous pattern may be formed, and the formation position in the stacking direction may be formed over the entire stacking direction, or may be formed only near the upper and lower surfaces of the stacked substrate. Due to the formation conditions such as the depth of the conductor pattern and the cut groove to be formed, the shrinkage characteristics and the physical properties of the ceramic layer, etc., unless limited to the technical idea of the present invention, the materials are not limited to those illustrated in FIGS. It can be configured freely without any.
[0010]
Next, the green sheets are laminated and pressed in a predetermined order to obtain a flat molded body having a thickness of approximately 0.8 mm. Via holes are formed in the green sheet, and conductor patterns between ceramic layers are appropriately connected to each other so as to function as circuit elements.
Then, the plurality of first division grooves parallel to each other and the plurality of second division grooves orthogonal to the first division groove on the main surface of the flat molded body are each formed to have a depth of approximately 0.1 mm. Carved with a steel blade. Thereafter, the flat molded body was degreased and sintered to obtain a laminated substrate of 80 mm × 75 mm × 0.8 mm.
The depth of the division groove is appropriately set in the range of 50 μm to 300 μm from the viewpoint of ease of division and ease of handling.
[0011]
In addition, a laminated substrate having undergone the same process as in the above-described embodiment except that it did not have the deformation suppressing conductor layer was used as a sample of the comparative example.
[0012]
Ten laminated substrates selected as described above are prepared, placed on a work table of a three-dimensional measuring device, and a displacement amount in a laminating direction (Z-axis direction of the three-dimensional measuring device) is measured by a laser displacement meter. For example, by repeating at a pitch of 2 mm, the displacement of the entire main surface of the laminated substrate is obtained, the inclination when the laminated substrate is arranged on the work table is corrected by computer processing, and the maximum measured value and the minimum measured value obtained are corrected. The difference was defined as the amount of deformation and evaluated. As a result, while the average value of the deformation amount in the comparative example was 361 μm, the deformation amount in the example was 40 μm, and the deformation amount was significantly suppressed.
[0013]
In addition, when the deformation suppressing conductor layer is formed over a plurality of layers at a portion overlapping the cutting groove in the laminating direction, when dividing into individual laminations, it may hinder the progress of cracks. In such a case, for example, as shown in FIG. 2A, the deformation suppressing conductor layer is made discontinuous, and the conductor layer is not formed at a portion overlapping the cut groove of the deformation suppressing conductor layer in the laminating direction. You can do it.
Further, when the deformation suppressing conductor layer is formed over a plurality of layers, the crimpability may be deteriorated due to a difference in deformability of the conductor pattern and the green sheet with respect to pressure, but the conductor pattern of the deformation suppressing conductor layer may be appropriately changed. It may be formed so that the deformation suppressing conductor layers 4 formed on the adjacent ceramic layers 5 do not overlap in the laminating direction as much as possible, as shown in the cross-sectional view of the laminated substrate shown in FIG.
[0014]
【The invention's effect】
According to the present invention, in a laminated substrate having a conductor pattern constituting a plurality of circuit elements therein, even if the conductor pattern structure is asymmetric in the lamination direction or a structure that is easily deformed by a cut groove, It can suppress deformation of the substrate and improve the quality of the laminated substrate.
[Brief description of the drawings]
FIG. 1 is an exploded perspective view of a laminated substrate according to one embodiment of the present invention.
FIG. 2 is a plan view of a ceramic green sheet on which a deformation suppressing conductor layer used in one embodiment of the present invention is formed.
3 (a) to 3 (f) are enlarged views of formation patterns of a deformation suppressing conductor layer according to another embodiment of the present invention.
FIG. 4 is a cross-sectional view of a deformation suppressing conductor layer portion of the laminated substrate according to one embodiment of the present invention.
FIGS. 5A and 5B are cross-sectional views of a conventional laminated substrate.
[Explanation of symbols]
REFERENCE SIGNS LIST 1 laminated substrate 2 individual laminated body 3 divided groove 4 deformation suppressing conductor layer 5 ceramic green sheet 6 ceramic layer 7 conductor pattern

Claims (1)

導体パターンが印刷形成されたセラミックグリーンシートを複数積層して板状成形体となし、前記導体パターンとセラミックグリーンシートとを一体焼結した積層基板において、
前記積層基板の主面には互いに平行な複数の第1の分割溝と前記第1の分割溝と直交する複数の第2の分割溝を有し、
前記第1及び第2の分割溝に沿って分割してなる複数の個片積層体には、前記導体パターンにより内部回路素子が形成されており、
前記積層基板の個片積層体形成領域の周囲に前記導体パターンからなる変形抑止導体層を形成したことを特徴とする積層基板。
A conductor pattern is formed by laminating a plurality of ceramic green sheets printed and formed into a plate-shaped molded body, and the conductor pattern and the ceramic green sheet are integrally sintered in a laminated substrate.
The main surface of the laminated substrate has a plurality of first division grooves parallel to each other and a plurality of second division grooves orthogonal to the first division grooves,
An internal circuit element is formed by the conductor pattern on the plurality of individual laminates divided along the first and second division grooves,
A laminate substrate, wherein a deformation suppressing conductor layer made of the conductor pattern is formed around an individual laminate body forming region of the laminate substrate.
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