JP2004048061A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve a high density interconnection in sequentially stacked thin film layers of an insulating film and a copper film formed outside through-holes for through-hole plating formed in a multilayer interconnection board, and realize production of a multilayer interconnection board that is produced at low cost and has excellent heat radiation property and high frequency property. <P>SOLUTION: In this semiconductor device, vias for connecting with an outside interconnection layer are formed on a partially extended area of lands of filled through-holes with through-hole plating in a double-sided printed board; and sequentially stacked thin film layers are formed thereon. Columnar copper bodies are formed on the through-holes, and connected with other semiconductors using a conductor having high heat conductivity. Furthermore, the interconnection area of the substrate is shielded with an insulator and a ground layer. In these production methods, filler-containing solvent-free fluid polymer precursor is heated and molten, and then supplied on the substrate using a precise constant-volume dispenser. <P>COPYRIGHT: (C)2004,JPO

Description

The present invention relates to a multilayer wiring board, a semiconductor device using the same, and a method for manufacturing the multilayer wiring board. The present invention relates to a high-density multilayer wiring board and a multi-chip module used for a computer, a digital exchange, a wireless information terminal, and the like, and its substrate. In addition, a multilayer wiring board which is used for a semiconductor package and its substrate, etc., and is particularly excellent in heat radiation characteristics and high frequency characteristics, a semiconductor device using the same, and a multilayer wiring board capable of manufacturing a low-cost and highly reliable multilayer wiring board And a method for producing the same.

で は In a conventional method of manufacturing a multilayer printed wiring board, a technique is known in which both sides of the printed circuit board are connected by through-plated through holes.

As a method for manufacturing a high-density multilayer printed wiring board, for example, as described in Patent Documents 1 and 2, an insulating film and copper are sequentially laminated on the outside of a double-sided printed wiring board, and a thin-film interlayer is formed in a via hole. There is a build-up method that takes a connection.

On the other hand, heat generated from the LSI is generally released from the LSI package or bare chip to the substrate through solder for electrical connection. In recent years, with the increase in the amount of heat generated, heat radiation fins are attached to the LSI package or the chip itself. It has become like. However, the outer shape of the radiating fins is large, and from the viewpoint of high-density mounting, it is necessary to reduce the size of the fins. It has become. As such a technique, for example, there is a multilayer printed wiring board having a so-called thermal via as described in Patent Literature 3, Patent Literature 4, and Patent Literature 5.

Furthermore, in the pattern design of a multilayer wiring board, it is very important to consider electrical performance such as impedance and crosstalk. Deterring adverse side effects is becoming an increasingly important issue. Therefore, a wiring design using a microstrip line or a strip line in which a signal wiring is brought close to a ground layer has been performed. Patent Literature 6 discloses a method of covering the periphery of a wiring formed on a substrate surface with a ground. Patent Literature 7 discloses that ground conductors are provided along both sides of a wiring formed in a substrate. The method is shown.

In Patent Documents 8 and 9 cited as conventional methods for manufacturing a high-density multilayer printed wiring board, a base conductive film for forming a conductor is formed on an organic insulating film by electroless plating.

JP-A-4-148590

JP-A-1-53497 JP-A-4-279097 JP-A-5-343821 JP-A-5-304223 JP-A-2-116190 JP-A-4-142975 JP-A-4-148590 JP-A-1-53497

In the above-described conventional method for manufacturing a multilayer printed wiring board, the through-plated through holes are formed in the final stage of the multilayer printed wiring board manufacturing process. In the end, the through-hole grids connecting the layers have the same grid pitch at the same position.

(4) Therefore, if the through holes are formed so densely that the wiring cannot be formed on the surface of the double-sided printed wiring board serving as the core, there is a problem that the wiring cannot be formed on the conductor layer outside the through hole.

Conversely, if the through hole pitch is determined so that wiring can be formed on the outer conductor layer, there arises a problem that the through hole pitch cannot be further reduced.

In addition, the techniques described in Patent Documents 1 and 2 that are methods for manufacturing a high-density multilayer printed wiring board have an advantage that high-density wiring and via holes can be formed in a thin film layer by this method.

However, if through-holes are formed at the final stage to connect both sides of the double-sided printed wiring board as a core, it is difficult to perform high-density wiring due to the effects of the through-holes. The merit of a multilayer wiring board having a configuration of a thin film layer on which a density wiring can be formed is drastically reduced.

す る と Also, when vias are formed on the through-hole lands by the sequential lamination method, the width of the through-hole lands increases, and the through-hole pitch increases accordingly. The minimum lattice pitch formed by the vias is the same as the through-hole pitch, and there is a problem that there is a limit in increasing the density.

Furthermore, since the through-holes are not filled, it is difficult to form successively laminated layers, and the reliability of the substrate is also lacking.

従 来 In this way, the conventional multilayer printed wiring board in which both sides are connected by through-plated through holes has a limit in increasing the density due to the through-plated through holes.

(4) This adverse effect is remarkable when a multi-pin narrow-pitch LSI package or an LSI bare chip is mounted on a multilayer printed wiring board. In some cases, even if the LSI can be connected to the board, the wiring cannot be routed.

On the other hand, if the wiring board is designed to allow the wiring to be routed, mismatching occurs in that the terminal pitch of the LSI cannot be matched with the pad pitch of the board, or the wiring board has to be extremely multi-layered for wiring. There was something.

On the other hand, if the through-plated through-holes on the board are not filled, the LSI bare chip mounted on the board will only be cut off from the outside world by an extremely thin sealing material, resulting in lack of reliability. The problem arises.

Next, regarding the technology of the multilayer printed wiring board described in Patent Literature 3, Patent Literature 4, and Patent Literature 5 for heat dissipation, these boards all use plated through holes penetrating both sides of the board. However, forming the through-plated through-hole only in the final stage of the substrate manufacturing only for the thermal via has a problem that the cost increases.

Next, in the method of covering the periphery of the wiring formed on the substrate surface with the ground described in Patent Document 6, which is conscious of a high-frequency circuit, the structure is not manufactured at the final stage of the substrate manufacturing only to surround the wiring with the ground. However, there is a problem that the manufacturing cost is increased.

(4) In the method described in Patent Document 7 in which the ground conductor is provided along both sides of the wiring formed in the substrate, the ground conductor is a through-hole conductor, and there is a problem that the shielding effect is small.

Next, regarding the techniques described in Patent Documents 8 and 9, in this method, the surface of the organic insulating film is roughened with chromic sulfuric acid or a permanganate salt, and the underlying conductive film is bonded by the anchor effect. However, this method has a problem that it is difficult to secure sufficient adhesive strength.

In addition, a method in which a resin filler that is more soluble in an oxidizing agent than an organic insulating material is included, and the filler on the surface of the insulating film is removed with the oxidizing agent, and the underlying conductive film is adhered by the anchor effect, has a large adhesion. Although the organic filler has high strength, the organic filler, which is more easily oxidized than the organic insulating film, naturally has lower physical properties such as heat resistance than the organic insulating film material, resulting in a problem that the physical properties of the entire insulating film deteriorate.

The present invention has been made in order to solve the above-mentioned problems of the prior art, and a first object of the present invention is to form a through-plated through-hole for connecting both sides of a double-sided printed wiring board serving as a core. Provided is a multilayer wiring board having a structure for maximizing the ability to form wiring at high density in an insulating film and a successively laminated thin film layer of copper formed outside thereof, and a semiconductor device using the same. Is to do. In particular, even if through holes are formed so densely that wiring cannot be formed on the surface of the double-sided printed wiring board serving as a core, multilayer wiring having a structure in which wiring can be formed on a conductor layer of a sequentially laminated thin film layer formed outside the through hole It is to provide a substrate and a semiconductor device using the same.

Another object of the present invention is to provide a multilayer wiring board having a structure excellent in heat dissipation and a semiconductor device using the same.

A third object is to provide a multilayer wiring board having excellent high-frequency characteristics and a semiconductor device using the same.

Still another object of the present invention is to provide a method for manufacturing the above-mentioned substrate at a low cost with high reliability, and in particular, to provide a method for manufacturing a multilayer wiring board having excellent adhesion strength between an insulating film and a base conductive film. It is in.

In order to achieve the above object, a multilayer wiring board according to the present invention has a double-sided printed board serving as a core, and a multilayer wiring board having a wiring layer formed thereon or below. The double-sided printed circuit board is provided with a through-plated through-hole filled in, the land existing on the periphery of the filled-through plated-through hole is expanded to form an extended land portion, and the surface of the extended land portion is formed. And vias for making connections with the wiring layers formed above or below.

More specifically, in the multilayer wiring board, the double-sided printed board serving as the core has at least four filled through plated through holes, and a lattice formed at the center of the four filled through plated through holes. The extended land portion is extended up to the center position of.

More specifically, in the wiring layer formed on or below the double-sided printed board serving as the core, the via pad position is the center position of the through-plated through-hole filled with four holes, and the center of the grid formed by the center position. Either one of the positions or both of them.

Next, in order to achieve the above object, according to a configuration of the invention relating to a semiconductor device of the present invention, a pad is provided on a lattice on both sides of the multilayer wiring board, and one pad is provided on a pad on one side of the multilayer wiring board. The above semiconductor or semiconductor package is connected, and a conductor for connecting to another multilayer wiring board is formed on a pad on the other side of the multilayer wiring board, or pads on both sides of the multilayer wiring board are formed. As described above, one or more semiconductors or semiconductor packages are connected to each one side, and a conductor for connecting to another multilayer wiring board is formed on a pad on one side of the multilayer wiring board. It was done.

Further, another configuration of the invention relating to the multilayer wiring board of the present invention is such that a pillar-shaped copper body is formed on the land of the through-hole plated through hole filled in the double-sided printed board and on the filled portion. .

More specifically, a column-shaped copper body is formed on the surface copper in a region including a plurality of through-hole plated through holes filled in the hole of the double-sided printed board and on the hole filling portion.

Further, in order to achieve the above object, another configuration of the invention according to the semiconductor device of the present invention is that, in any one of the above multilayer wiring boards, the columnar copper body and the semiconductor or the semiconductor package have good thermal conductivity. Connected with a heat conductor, and the filled through-plated through hole is connected to a power supply layer or a ground layer, or to the columnar copper body opposite to the copper body connected to the semiconductor or semiconductor package, Either one or both of forming a heat conductor having good heat conductivity for connecting to another multilayer wiring board is performed.

According to another embodiment of the present invention, there is provided a multi-layer wiring board according to the present invention, wherein in the semiconductor device, an insulating layer is formed around a wiring in a region having at least one wiring included in the substrate. , And at least two of the three directions of up, down, left, right, front and back of the area are surrounded by the ground layer.

Furthermore, in order to achieve the above object, another configuration of the invention according to the semiconductor device of the present invention is to form a plurality of electric circuit systems by using the above-mentioned multilayer wiring board, and mutually connect them by the ground layer. It is as if separated.

Next, in order to achieve the above object, the configuration of the invention according to the method for manufacturing a multilayer wiring board of the present invention,
(1) Drilling a double-sided copper-clad printed board and plating the entire surface with copper;
(2) a step of forming a resist removal pattern in a desired shape, plating copper for vias, and removing the resist;
(3) a step of patterning a surface copper layer after forming a resist remaining pattern in a desired shape, and stripping the resist;
(4) placing a mold having a flat surface on both surfaces of the substrate, and supplying a filler-containing solventless fluid polymer precursor between the substrate and the mold;
(5) exhausting the space between the mold and the substrate;
(6) a step of moving the mold in the direction of the substrate to fill a gap between the copper conductors on the substrate with the filler-containing solventless fluid polymer precursor;
(7) applying a predetermined hydrostatic pressure to the precursor;
(8) curing the precursor under hydrostatic pressure;
(9) exposing the via copper conductor surface;
(10) forming a base conductive film connected to the via copper conductor;
(11) forming a resist removal pattern in a desired shape, and then forming a wiring copper conductor by plating;
(12) a step of forming a via copper conductor by plating after forming a resist removal pattern in a desired shape;
(13) removing two layers of resist,
(14) a step of etching an unnecessary underlying conductive film,
The method (A) wherein the steps (1) to (3) are performed in this order, and then the steps (4) to (14) are repeated in this order to form a multilayer wiring board Or
(1) Drilling a double-sided copper-clad printed board and copper plating the entire surface;
(2) a step of etching a surface layer copper and removing the resist after forming a resist remaining pattern in a desired shape;
(3) placing a mold having a flat surface on both surfaces of the substrate, and supplying a filler-containing solventless fluid polymer precursor between the substrate and the mold;
(4) exhausting the space between the mold and the substrate;
(5) a step of moving the mold in the direction of the substrate to fill the space between the copper conductors on the substrate with the filler-containing solventless fluid polymer precursor;
(6) applying a predetermined hydrostatic pressure to the precursor;
(7) curing the precursor under hydrostatic pressure;
(8) a step of exposing a surface copper conductor surface;
(9) forming a via hole at a desired position on the insulating film after forming the insulating film;
(10) forming a via copper conductor and a wiring copper conductor by plating;
And the steps (1) to (8) are performed in this order, and thereafter, the steps (9) to (10) are repeated in this order to form a multilayer wiring board (method B). Wherein the filler-containing solvent-free fluid polymer precursor is melted by heating and supplied onto a substrate by a precise quantitative discharge device.

More specifically, in the method of manufacturing a multilayer wiring board, in the method A- (9) and the method B- (8), which is a step of exposing the copper conductor surface of the method A or the method B, the filler is decomposed by a chemical solution. Alternatively, the insulating film is dissolved to roughen the surface of the insulating film.

More specifically, the filler is a polyimide, the solvent-free fluid polymer precursor is a composition of a polyfunctional epoxy resin and a novolak resin, and the chemical solution comprises: (a) an alkaline aqueous solution,
(B) a mixed solution of ethylenediamine and hydrazine hydrate,
(C) one of N-methyl-2-pyrrolidone and a halogenated phenol, or both of them, which is one selected from the above (a) to (c). . A method for manufacturing a multilayer wiring board according to claim 11.

Specifically, an insulating substrate is used in place of the double-sided copper-clad printed board.

More specifically, in the above-described method for manufacturing a multilayer wiring board, the insulating substrate is a substrate obtained by curing a prepreg material.

The multilayer wiring board according to the present invention is characterized in that a via is formed in a part of a double-sided printed wiring board in which a land of a through-hole plated through hole is partially extended, and a via is formed between the land and the wiring layer of the sequentially laminated thin film layer outside the via. Make a connection. Therefore, even if through holes are formed densely so that no wiring can be formed on the surface of the double-sided printed wiring board, the density is high enough that the wiring can be formed on the conductor layer of the sequentially laminated thin film layer formed outside the through hole. There is an effect that a simple wiring becomes possible.

Further, if wiring positions are provided at both the center position of the four filled through-plated through holes and the center position of the grid formed by the center positions of these filled through plated through holes, the wiring position is formed. Since the pitch of the grid to be formed can be made smaller than the pitch of the grid formed by the center position of the through hole, higher-density wiring becomes possible.

構造 The structure of such a multilayer wiring board can be manufactured by filling the through-plated through-holes of the double-sided printed wiring board serving as a core and forming a sequentially laminated thin film layer thereon.

Further, in the semiconductor device according to the present invention, pads are provided on lattices on both surfaces of such an ultra-high-density multilayer wiring substrate, and one or more semiconductors or semiconductor packages are connected to the pads on one surface of the substrate. A conductor for connecting to another multi-layer wiring board is formed on a pad on the other side of the board, or one or more semiconductors or semiconductor packages are provided on each side of the board on pads on both sides of the board. And a conductor for connection to another multilayer wiring board is formed on the pad on one side of the board.

Therefore, even a multi-pin narrow-pitch LSI package or LSI bare chip, which is difficult with a conventional printed wiring board, can be connected to the board and the wiring can be routed, and the number of wiring layers on the board can be reduced. Can be reduced. Further, since the through-holes are filled, the LSI bare chip in the package is cut off from the outside by the insulating resin, and the reliability is improved.

Further, in the semiconductor device according to the present invention, the surface copper on the land and the filled portion of the filled through-plated through-hole of the double-sided printed board, or in the region including a plurality of filled through-plated through-holes of the double-sided printed board. And form a columnar copper on the filled portion, connect the columnar copper and the semiconductor or semiconductor package with a heat conductor having good thermal conductivity, and connect the filled through plated through hole with the power supply layer or the ground layer. Either connect, or form a thermal conductor with good thermal conductivity for connecting to another multilayer wiring board on the columnar copper on the opposite side of the semiconductor or semiconductor package, or both. I am doing it.

(4) Since the heat generated in the LSI can be easily transmitted to the outside, there is an effect that the heat dissipation is excellent. Further, since the thermal via can be manufactured in the process of manufacturing a substrate, which will be described later, and is not formed in the final stage of manufacturing the substrate, it is expected that such a structure does not significantly increase the cost. be able to.

Further, in the multilayer wiring board according to the present invention, the periphery of the region having at least one or more wirings included in the substrate is covered with an insulating layer, and the region is formed in three directions of up, down, left, right, front and back. , At least two directions are surrounded by the ground layer. Further, in the semiconductor device according to the present invention, a plurality of electric circuit systems are separated from each other by using the multilayer wiring board.

By doing so, the source of electromagnetic waves can be covered by the insulating layer and the ground layer, so that interference of electric signals and generation of noise can be suppressed, and an effect of excellent high-frequency characteristics can be obtained. Further, since the wall via can be manufactured in the process of manufacturing a substrate, which will be described later, and is not formed in the final stage of manufacturing the substrate, it is expected that such a structure does not significantly increase the cost. be able to.

Further, as a method for manufacturing a multilayer wiring board according to the present invention, in the above-described methods A and B, a filler-containing solvent-free fluid polymer precursor is heated and melted, and is precision-discharged on a substrate by a precise quantitative discharge device. After the filler is decomposed or dissolved by a chemical solution from the cured insulating film to roughen the insulating film surface, electroless plating is performed.

に す る By doing so, it became possible to form a base conductive film having excellent adhesiveness using a simple process. Here, if polyimide is used as a filler, and a composition of a polyfunctional epoxy resin and a novolak resin is used as a solvent-free fluid polymer precursor, the filler does not deteriorate the physical properties of the insulating film. Can be improved in physical properties.

When manufacturing a double-sided printed wiring board serving as a core, if an insulating material obtained by thermosetting a prepreg is used instead of a double-sided copper-clad printed board, the cost in the manufacturing process can be further reduced.

According to the present invention, even when a through-plated through-hole for forming a connection on both sides of a double-sided printed wiring board serving as a core is formed, an insulating film and a copper successively laminated thin film formed outside thereof are formed. It is possible to provide a multilayer wiring board having a structure that maximizes the ability to form wiring at a high density in layers and a semiconductor device using the same. In particular, even if through holes are formed so densely that wiring cannot be formed on the surface of the double-sided printed wiring board serving as a core, multilayer wiring having a structure in which wiring can be formed on a conductor layer of a sequentially laminated thin film layer formed outside the through hole A substrate and a semiconductor device using the same can be provided.

According to the present invention, it is possible to provide a multilayer wiring board having a structure excellent in heat dissipation and a semiconductor device using the same.

According to the present invention, it is possible to provide a multilayer wiring board having excellent high-frequency characteristics and a semiconductor device using the same.

Further, according to the present invention, it is an object of the present invention to provide a method for manufacturing the above-mentioned substrate with good reliability and low cost, and in particular, to provide a method for manufacturing a multilayer wiring board having excellent adhesion strength between an insulating film and a base conductive film. be able to.

Hereinafter, embodiments of the present invention will be described with reference to FIGS.

[Structure of multilayer wiring board according to the present invention capable of high-density wiring and semiconductor device using the same]
The structure of the multilayer wiring board of the present invention is used for connecting the wiring layer of the successively laminated thin film layer outside the land to a part of the land of the through-hole plated through hole filled in the hole of the double-sided printed wiring board. This is a multilayer wiring board formed with vias. In the structure of a semiconductor device using this, pads are provided on a lattice of vias formed in the multilayer wiring board, and semiconductors or semiconductor packages are connected.

{Circle around (1)} With the multilayer wiring board and the semiconductor device using the same, the first object of the present invention, that is, high density, is achieved.

Hereinafter, this will be described in detail with reference to FIGS.

First, the basic structure of the lands and vias of the multilayer wiring board according to the present invention will be described with reference to FIG.

FIGS. 1A and 1B are diagrams showing the structure of lands and vias of a multilayer wiring board according to the present invention. FIG. 1A is a perspective view of the lands and vias, and FIG. is there.

As shown in FIG. 1A, a lands 101 formed on a peripheral edge of a through-plated through-hole in which a hole is filled in a double-sided printed wiring board is partially extended to an end portion of an extended land portion 102, and a sequential laminated type outside the extended land portion 102 is formed. A via 103 for forming a connection with the wiring layer of the thin film layer is formed.

As the shape of the via, there can be used two, a stud via 104 as shown in an AA ′ sectional view of FIG. 1B and a conformal via 105 as shown in an AA ′ sectional view of FIG. However, the stud via 104 shown in FIG. 1B is more preferable because a finer via can be formed, and since the via is not a mortar but a pillar.

Next, the structure of the printed wiring board according to the present invention will be described with reference to FIG. FIG. 2 schematically shows a top view of a surface layer of a double-sided printed wiring board serving as a core.

構造 The structure of the printed wiring board according to the present invention is one in which the above-described through holes and lands are effectively arranged. That is, one extended land 206 of the through-plated through-hole 201 is located at the center of the grid formed by the four through-holes 201, 202, 203, and 204 filled with four holes of the double-sided printed wiring board serving as the core of the wiring. Is occupied, and a via 206 is formed at the center of the lattice to connect to the wiring layer of the successively laminated thin film layer outside the printed wiring board.

With such a structure, even if through holes are formed so densely that wiring cannot be formed on the surface of the double-sided printed wiring board, wiring is formed on the conductor layer of the sequentially laminated thin film layer formed outside the through holes. can do.

Next, the wiring in the wiring layers formed above and below the printed wiring board according to the present invention will be described in detail with reference to FIGS.

FIG. 3 schematically shows a top view of one example of a wiring pattern of a wiring layer formed above and below a surface layer of a double-sided printed wiring board serving as a core.

FIG. 4 schematically shows a top view of one example of a wiring pattern of a wiring layer formed above and below a surface layer of a double-sided printed wiring board serving as a core.

{Circle over (3)} 301 in FIG. 3 denotes a wiring, and 302 denotes a pad on which a via for interlayer connection is formed. The lattice formed by the pad 302 includes the central position of the four through-hole plated through holes 303, 304, 305, and 306 on the inner side, that is, the position of the pad 302.

With such a structure, the lattice β of the sequentially laminated thin film layer is a lattice obtained by shifting the through-hole lattice α of the double-sided printed wiring board serving as the core by １ ／ lattice in the XY directions, and the lattice pitch is It can be the same as the lattice pitch of the holes.

(4) Another wiring method of the multilayer wiring board according to the present invention will be described with reference to FIG. This is achieved by providing a pad on the surface of the extension land where a via is formed and a pad on which a via is also formed at the center of the through-plated through-hole, and wiring with both to reduce the wiring density. It has been improved. That is, the wiring positions are the center positions of the four through-hole plated through-holes 401, 402, 403, and 404 filled with the holes, and the center of the grid formed by the center positions of the four holes. The pitch of the grid γ formed by the wiring positions at this time can be set to 1 / √2 of the pitch of the through-hole grid α of the double-sided printed wiring board serving as the core.

と す る With such a multilayer wiring board structure, it is possible to provide a printed wiring board capable of ultra-high-density wiring that cannot be achieved by a conventional printed wiring board.

Although the above-described wiring positions have been described in a basic manner, various irregularities can be taken in accordance with the gist of the present invention.

Next, a semiconductor device using the multilayer wiring board will be described with reference to FIGS. It is to be noted that the semiconductor device referred to here is a semiconductor device which can be grasped by a concept classified as a so-called single-chip package, a multi-chip package, a multi-chip module, or the like.

FIG. 5 is a cross-sectional view of a semiconductor device using the multilayer wiring board of the present invention having two semiconductors or semiconductor packages mounted on the upper surface.

FIG. 6 is a cross-sectional view of a semiconductor device in which a lead frame is mounted using the multilayer wiring board of the present invention in which one semiconductor or one semiconductor package is mounted on each of the upper surface and the lower surface.

That is, in this semiconductor device, pads are provided on the lattice of the sequentially laminated thin film layers using the multilayer wiring board, and the semiconductor or the semiconductor package is connected, so that the number of I / O terminals of the semiconductor or the semiconductor package increases. It is also possible to manufacture a semiconductor device that can be mounted.

In the example of the structure of the semiconductor device shown in FIG. 5, pads 502 and 503 are provided on lattices on both surfaces of a multilayer wiring substrate 501, and two semiconductors or semiconductor packages 504 and 505 are provided on the pads 502 on one surface of the substrate 501. Are connected by solder balls 506, and solder balls 507 for connecting to another multilayer wiring board are formed on pads 503 on the other side of the substrate 501.

In this example, there are two semiconductors or semiconductor packages on one side, but one or more suitable numbers of semiconductors or semiconductor packages can be mounted. In this example, solder balls are used as conductors for connecting the semiconductor or the semiconductor package to the multilayer wiring board and for connecting the multilayer wiring board to another multilayer wiring board. However, wires, lead frames, conductive films, etc. Can be used.

In the example of the structure of the semiconductor device shown in FIG. 6, pads 602 and 603 are provided on lattices on both sides of a multilayer wiring board 601, and two semiconductors or semiconductor packages 604 are provided on the pads 602 and 603 on both sides of the board 601. , 605 are connected by solder balls 606, and a lead frame for connection to another multilayer wiring board is formed on a pad 603 on one side of the board.

In this example, the number of semiconductors or semiconductor packages is one on each side, but one or more appropriate numbers of semiconductors or semiconductor packages can be placed on one side. In this example, a normal conductor such as a wire, a lead frame, or a conductive film can be used instead of a solder ball as a conductor for connection between a semiconductor or a semiconductor package and the multilayer wiring board 601. It is the same as described in.

It is desirable to use a lead frame for connection between the multilayer wiring board 601 and another multilayer wiring board due to the thickness of the semiconductor or semiconductor package. The above-described semiconductor device such as a single-chip package or a multi-chip package can be assembled in a normal sealing step, a molding step, a radiating fin attaching step, and the like, to obtain a final package form.

[Multilayer wiring board according to the present invention excellent in heat dissipation characteristics and semiconductor device using the same]
In another structure of the multilayer wiring board of the present invention, a pillar-shaped copper body is formed on the land and the filled portion of the filled through plated through hole. Further, in the structure of a semiconductor device using the same, a heat conductor having good heat conductivity is placed on the columnar copper body to connect with another semiconductor or a multilayer wiring board.

{Circle around (2)} With the multilayer wiring board and the semiconductor device using the same, it is possible to achieve the second object of the present invention to obtain excellent heat dissipation characteristics.

Hereinafter, this will be described in detail with reference to FIGS.

First, the basic structure of the multilayer wiring board according to the present invention having excellent heat dissipation characteristics will be described with reference to FIGS.

(7) FIG. 7 is a cross-sectional view of a multilayer wiring board having excellent heat radiation characteristics, in which one through-hole corresponds to one columnar copper body.

FIG. 8 is a cross-sectional view of a multilayer wiring board having excellent heat radiation characteristics, in which one columnar copper body is made to correspond to a plurality of through holes.

例 The example shown in FIG. 7 has a structure in which a columnar copper body 705 is formed on the land 703 and the filled portion 704 of the through-plated through-hole 702 in the double-sided printed board 701 filled with holes. 7A and 7B are different in the shape of the columnar copper body 705, FIG. 7A shows a structure in which holes are filled, and FIG. There are parts, but this difference is due to the difference in structure due to the manufacturing method.

In the example shown in FIG. 8, the basic idea is the same as the example shown in FIG. 7, but the surface copper body 803 in the region including the plurality of through-plated through-holes 802 filled in the double-sided printed board 801. This is an example in which a columnar copper body 805 is formed on the filling portion 804. 8 (a) and 8 (b) are also differences in structure due to the manufacturing method.

Next, a semiconductor device using the multilayer wiring board will be described with reference to FIG.

FIG. 9 is a cross-sectional view of a semiconductor device formed by using the substrate of FIG.

The columnar copper body 901 of the substrate and the semiconductor or the semiconductor package 902 are connected by a heat conductor 903 having good heat conductivity, and the filled through plated through holes 904 are connected to a power supply layer or a ground layer, or Either a thermal conductor 906 having good thermal conductivity for connecting to another multilayer wiring board is formed on the columnar copper body 905 on the opposite side of the semiconductor or the semiconductor package, or both are formed. . As a material of the heat conductor having good heat conductivity, solder, silver paste, or the like can be used.

(7) When the structure shown in FIG. 7 is used as a substrate, a heat radiation path can be formed at any place one by one. In addition, when the structure shown in FIG. 8 is used, a heat radiation path is concentrated at a specific place. Such a structure is particularly effective when it is formed at the center of a semiconductor or a semiconductor package, so that the wiring area can be used more effectively. it can.

[Multilayer wiring board according to the present invention having excellent high-frequency characteristics and semiconductor device using the same]
In another structure of the multilayer wiring board of the present invention, the periphery of the wiring area of the multilayer wiring board is covered with an insulating layer, and at least three of the areas are surrounded by a ground layer. Further, the structure of a semiconductor device using the same is such that a plurality of such substrates are separated from each other by a ground layer.

{Circle around (3)} With the multilayer wiring board and the semiconductor device using the same, it is possible to achieve the third object of the present invention, namely, to obtain excellent high-frequency characteristics.

Hereinafter, this will be described with reference to FIGS. 10 and 11.

First, the basic structure of the multilayer wiring board according to the present invention having excellent high-frequency characteristics will be described with reference to FIG.

FIG. 10 is a perspective view of a multilayer wiring board according to the present invention having excellent high-frequency characteristics.

In the example shown in FIG. 10, a structure in which the periphery of a region having at least one or more wirings 1001 included in the substrate is covered with an insulating layer 1002 and at least three sides of the region are surrounded by a ground layer 1003. I have. With such a multilayer wiring board structure, interference of electric signals and generation of noise can be suppressed.

(4) The side portion of the ground layer 1003 along the wiring has a so-called wall via form. The ground layer 1004 above the wiring may be attached later as a mounting component.

Next, a semiconductor device using the multilayer wiring board will be described with reference to FIG.

FIG. 11 is a top view of a semiconductor device having excellent high-frequency characteristics.

The example shown in FIG. 11 is a semiconductor device in which a plurality of electric circuit systems 1102 on a substrate 1101, for example, a receiving system and a transmitting system such as a mobile wireless terminal, and a logical system and a wireless system are separated from each other by a ground 1103. It is.

[Production method of multilayer wiring board according to the present invention]
The method for producing a multilayer wiring board according to the present invention is characterized by using a filler-containing solvent-free fluid polymer precursor, and using any one of the following method A and method B is there. As a result, the fourth object of the present invention, that is, the production of a low-cost, high-density, high-reliability multilayer wiring board can be achieved.

Hereinafter, this will be described in detail with reference to FIGS.

First, a manufacturing method based on the manufacturing process of the method B will be described with reference to FIG.

FIG. 12 is a diagram showing a cross-sectional view of a multilayer wiring board for each of the manufacturing steps of Method B of the method for manufacturing a multilayer wiring board according to the present invention.

First, a hole 1202 is made in the double-sided copper-clad printed board 1201 (FIGS. 12A and 12B), and copper plating is performed on the entire surface (FIG. 12C).

Next, a resist remaining pattern is formed in a desired shape, the surface copper is patterned by etching, and the resist is peeled off to obtain a structure shown in FIG.

金 Then, a mold having a flat surface is placed on both sides of the substrate, and a filler-containing solventless fluid polymer precursor is supplied between the substrate and the mold. Thereafter, the space between the mold and the substrate is evacuated, the mold is moved toward the substrate, and the supplied precursor is filled in the copper conductor gap on the substrate.

Next, a predetermined hydrostatic pressure is applied to the precursor, the precursor is cured under the hydrostatic pressure, and the gap between the copper conductors including the through holes is filled with the insulating film 1205.

(4) After filling the gap between the copper conductors including the through holes with the insulating film 1205, the copper conductor surface 1206 is exposed (FIG. 12E).

After that, an interlayer insulating film 1207 is formed, and a via hole 1208 is formed at a desired position of the insulating film (FIG. 12F). Next, a via copper conductor and a wiring copper conductor are formed by plating (FIG. 12 (g)). 12 (f) and 12 (g) are repeated to form a multilayer.

Here, as a method for filling the copper conductor gap including the through hole with the insulating film 1205, a method using a mold is preferable. Methods for exposing the copper conductor surface 1206 include etching and polishing. Further, the conductive paste may be filled in the holes at the stage of FIG. 12B or FIG. 12C, and then the surface copper foil may be patterned. 12 (f) and 12 (g) are ordinary build-up processes, and via holes are formed by photolithography or laser ablation of a photosensitive insulating resin.

Next, a method of manufacturing a multilayer wiring board according to the present invention by a method A, which is another method of manufacturing a multilayer wiring board, will be described with reference to FIG.

FIG. 13 is a diagram showing a cross-sectional view of a multilayer wiring board for each of the manufacturing steps of the method A of the method for manufacturing a multilayer wiring board according to the present invention.

穴 Drill holes 1302 in the double-sided copper-clad printed board 1301 (FIGS. 13A and 13B), and perform copper plating on the entire surface (FIG. 13C).

Next, a pattern for removing a resist for a via is formed in a desired shape, copper is plated for the via, and then the resist is peeled off to obtain a structure shown in FIG. 13D.

Furthermore, after forming a resist remaining pattern in a desired shape, the surface copper is patterned by etching, and the resist is peeled off to obtain a structure of FIG. 13E.

金 Then, a mold having a flat surface is placed on both sides of the substrate, and a filler-containing solventless fluid polymer precursor is supplied between the substrate and the mold. Thereafter, the space between the mold and the substrate is evacuated, the mold is moved toward the substrate, and the supplied precursor is filled in the copper conductor gap on the substrate.

Next, a predetermined hydrostatic pressure is applied to the precursor, the precursor is cured under the hydrostatic pressure, and the gap between the copper conductors including the through holes is filled with the insulating film 1306. Thereafter, the via copper conductor surface 1307 is exposed to obtain the structure shown in FIG.

(4) Thereafter, a base conductive film (not shown) connected to the via copper conductor is formed, a resist removal pattern is formed in a desired wiring shape, and then a wiring copper conductor 1308 is formed by plating. Further, after forming a resist removal pattern in a desired via shape, a via copper conductor 1309 is formed by plating, the two layers of resist are peeled off, an unnecessary underlying conductive film is etched, and the wiring copper conductor 1308 and the via The structure shown in FIG. 13G in which the copper conductor 1309 is formed is adopted.

Then, after filling the copper conductor gap with the insulating film 1310 in the same manner as described above, the via copper conductor surface 1311 is exposed to obtain the structure shown in FIG. In the case of multilayering, the steps of FIGS. 13G and 13F are repeated.

Next, the point of the manufacturing method of the above-described method A and method B will be described with reference to FIG.

FIG. 14 is a cross-sectional view showing an aspect of the insulating film, the filler, and the underlying conductive film.

In the methods A and B, it is difficult to form the filler-containing solvent-free fluid polymer precursor into a sheet or film, so that the precursor is heated and melted, and is supplied by a precision quantitative discharge device. It is desirable to supply.

Further, a method for forming a base conductive film 1403 formed on an insulating film as shown in FIG.

(4) The filler 1402 in the insulating film 1401 obtained by curing the solventless fluid polymer precursor as shown in FIG. 14A is decomposed or dissolved by a chemical. Then, as shown in FIG. 14B, the surface of the insulating film is roughened, and then electroless plating is performed to form a base conductive film 1403 of FIG. 14C connected to the via copper conductor. Thereby, a base conductive film having excellent adhesion strength to the insulating film can be formed.

Alternatively, in the method B, in the step of exposing the surface of the surface copper conductor surface, the surface of the insulating film is roughened in the same manner, so that the adhesiveness to the copper in the upper layer, particularly, the through-hole plating filled in when forming the thermal vias The adhesiveness between the insulating film on the through hole and the copper can be enhanced.

Here, when the filler is polyimide and the solvent-free fluid polymer precursor is a composition of a polyfunctional epoxy resin and a novolak resin, the chemical solution is an alkaline aqueous solution, a mixed solution of ethylenediamine and hydrazine hydrate, N-methyl One selected from -2-pyrrolidone and a halogenated phenol can be used.に は In the case of an alkaline aqueous solution, an alkaline permanganate etching solution used for exposing the surface of the via copper conductor may be used instead. As described above, when polyimide is used as the filler, physical properties such as heat resistance, electric characteristics, and mechanical characteristics of the entire insulating film are not impaired.

In the methods A and B, an insulating material may be used instead of the double-sided copper-clad printed board. As the insulating material, for example, an insulating material obtained by curing a prepreg material can be used.

According to the method for manufacturing a multilayer wiring board described above, a high-density multilayer wiring board with high reliability, which is the above problem, can be manufactured at low cost, and a structure excellent in heat dissipation and high-frequency characteristics can be manufactured. In the process, it can be built into the multilayer wiring board.

[Material, structure scale, and specific example of manufacturing method of multilayer wiring board and semiconductor device using the same according to the present invention]
Hereinafter, each embodiment of the present invention will be specifically described with reference to FIGS. 12, 13 and 15 based on the description of the above structure and the description of the manufacturing method. It is not limited to these.

Here, FIG. 15 is a top view for displaying each scale of the multilayer wiring board.

<Example 1>
A double-sided copper-clad printed board (manufactured by Mitsubishi Gas Chemical) of BT resin was drilled to form through holes in a grid pattern (FIGS. 12 (a) and 12 (b)), and the entire surface was subjected to chemical copper plating (FIG. 12 ( c)).

(5) Next, a film resist was formed, and after leaving a pattern in a desired shape by exposure and development, the surface layer copper was patterned by etching and the resist was peeled off (FIG. 12 (d)).

Thereafter, a filler-free, solvent-free, flowable polymer precursor composed of a polyimide filler, a tetrafunctional epoxy resin, and a novolak resin is applied to the gap between the copper conductors including the through-holes by using a precise quantitative discharge device, and is then placed in the mold. After heating under reduced pressure, pressure was applied from above and below with a flat plate.

Next, the precursor is heated and cured while applying a hydrostatic pressure to form an insulating film. Then, since the insulating film is slightly left on the copper conductor surface, the precursor is removed with an alkaline permanganate-based etching solution, and the copper conductor surface is removed. And the surface of the insulating film was roughened.

Thereafter, a photosensitive interlayer insulating resin was formed, and via holes were formed at desired positions by exposure and development (FIG. 12 (f)). Next, post-heating was applied to roughen the interlayer insulating film with an alkaline permanganate-based roughening solution, subjected to chemical copper plating and electrolytic copper plating, and post-heat-cured. After that, a film resist was formed, and a pattern was formed by leaving it in a desired shape by exposure and development. Then, the surface copper was patterned by etching, and the resist was peeled off (FIG. 12 (g)).

Then, the steps from the formation of the photosensitive interlayer insulating resin to the removal of the resist are repeated again, and finally, a solder resist is formed, and two laminated thin film layers are sequentially formed on both sides of the double-sided copper-clad printed board, for a total of 6 layers. A multi-layered wiring board having layers was manufactured.

As shown in FIG. 15 (a), the double-sided printed wiring board serving as the core has a lattice pitch dp of 700 μm at the highest density portion, and a through-plated through hole has a drill diameter dr of 300 μm and a land width wld of 100 μm. In the center of the four through-plated through holes, a distance dq apart from the three lands was set to about 100 μm to extend one land. Then, a photo via hole having a bottom diameter db100 μm is formed on the land, that is, the pad, the land width whld of the photo via hole in the outer wiring layer is 50 μm, the pad diameter on which the photo via hole rides is 300 μm, the pad pitch dlp is 700 μm, and the pad is Three wirings having a line width wl of 57 μm and a space width ws of 57 μm were formed therebetween, and the interlayer connection was in a staggered structure.

In the process of manufacturing the multilayer wiring board, a thermal via as shown in FIG. 8B is formed, and the bare chip and the board on one side are connected with silver paste, and the bare chip and the pad of the board are connected with solder balls. Then, solder balls were formed on the thermal via portion and the pad portion on the back surface, and the structure as shown in FIG. 5 was introduced into the multi-chip module and the semiconductor package.

<Example 2>
13 (c), a through-hole was drilled in a lattice shape by drilling on a double-sided copper-clad printed board (manufactured by Mitsubishi Gas Chemical) of BT resin (FIGS. 13 (a) and 13 (b)), and chemical copper plating was applied to the entire surface. )).

(5) Next, a film resist was formed, and a punched pattern for a via was formed in a desired shape by exposure and development. Then, a via was formed by electrolytic copper plating, and the resist was peeled off (FIG. 13D).

{Circle around (3)} Further, an electrodeposition resist was formed into a film, a resist remaining pattern was formed in a desired shape by exposure and development, and then the surface copper was patterned by etching, and the resist was peeled off (FIG. 13E).

Thereafter, a filler-free, solvent-free, flowable polymer precursor composed of a polyimide filler, a tetrafunctional epoxy resin, and a novolak resin is applied to the gap between the copper conductors including the through-holes by using a precise quantitative discharge device, and is then placed in the mold. After heating under reduced pressure, pressure was applied from above and below with a flat plate.

Next, the precursor is heated and cured while applying hydrostatic pressure to form an insulating film.After that, the surface of the via copper conductor is slightly etched with an alkaline permanganate-based etching solution because the insulating film is slightly applied. The surface of the copper conductor was exposed and the surface of the insulating film was roughened (FIG. 13F).

Thereafter, an underlying copper conductive film (not shown) was formed by flash plating. Then, a film resist is formed, a pattern for wiring is formed in a desired shape by exposure and development, copper is formed by electrolytic copper plating, and a film resist is formed thereon, and the film is exposed and developed. A copper pattern is formed in a desired shape, copper is formed by copper electroplating, the two-layer resist is peeled off, the unnecessary underlying conductive film is removed by etching, and the copper wiring and the via are removed. It was formed (FIG. 13 (g)).

Then, after the steps from the deposition of the filler-containing solventless fluid polymer precursor to the etching formation of the underlying copper conductive film are repeated, the deposition of the filler-containing solventless fluid polymer precursor is further performed. Through to the exposure of the copper surface, and a multilayer wiring board having a total of six layers was prepared by sequentially forming two laminated thin film layers on both sides of the double-sided copper-clad printed board.

As shown in FIG. 15B, the double-sided printed wiring board serving as a core has a lattice pitch dp of 635 μm and a through-plated through hole with a drill diameter dr of 300 μm and a land width wld of 100 μm at the highest density portion. In the center of the four through-plated through holes, a distance dq apart from the three lands was set to about 100 μm to extend one land. Then, a columnar via having a diameter dpld of 55 μm is formed on the land, that is, the pad, the pad diameter on which the via in the outer wiring layer rides is 145 μm, the pad pitch dlp is 635 μm, and the line width wl is 55 μm and the space width ws is between these pads. Four 55 μm wires were formed, and the interlayer connection was in a staggered structure.

In the process of manufacturing the multilayer wiring board, a thermal via as shown in FIG. 8A is formed, and the bare chip and the board on one side are connected with silver paste, and the bare chip and the pad of the board are connected with solder balls. Then, solder balls were formed on the thermal via portion and the pad portion on the back surface, and the structure as shown in FIG. 5 was introduced into the multi-chip module and the semiconductor package.

<Example 3>
In the same manner as in Example 2, the double-sided printed wiring board serving as the core has the highest density, the lattice pitch dp is 600 μm, and the through-plated through-hole has a drill diameter dr of 300 μm and a land width Wld of 100 μm. One land was expanded by taking a distance dq away from the three lands of about 100 μm at the center of the two through plated through holes. Then, a column-shaped via having a diameter of 55 μm is formed on the land, that is, the pad, and the pad diameter on which the via in the outer wiring layer rides is 145 μm, and the pad pitch is 424 μm. A grid formed by both of the center positions of the grids formed by these center positions, and formed as a sequentially laminated thin film layer in which two wirings having a line width wl of 55 μm and a space width ws of 55 μm are formed between the pads. A similar multichip module and semiconductor package were formed.

<Example 4>
In the manufacturing process of the multilayer wiring board similar to the first embodiment, a wall via as shown in FIG. 10B is formed, and a receiving system and a transmitting system, a logical system and a wireless system of a mobile wireless terminal as shown in FIG. Was manufactured.

<Example 5>
In the manufacturing process of the multilayer wiring board similar to the second embodiment, a wall via as shown in FIG. 10A is formed, and a receiving system and a transmitting system, a logical system and a wireless system of a mobile wireless terminal as shown in FIG. Was manufactured.

<Example 6>
Instead of a BT resin double-sided copper-clad printed board (manufactured by Mitsubishi Gas Chemical), a BT resin prepreg heat-cured material was used as a base substrate, and a multilayer wiring board similar to that of Example 1 was manufactured in the same manner as Example 1. Produced.

<Example 7>
Instead of a BT resin double-sided copper-clad printed board (manufactured by Mitsubishi Gas Chemical), a BT resin prepreg heat-cured material was used as a base substrate, and a multilayer wiring board similar to that of Example 2 was manufactured in the same manner as Example 2. Produced.

<Example 8>
In place of BT resin double-sided copper-clad printed board (Mitsubishi Gas Chemical), a BT resin prepreg thermoset material was used for the base substrate, and direct plating was used instead of chemical copper plating on the entire surface. A multilayer wiring board similar to that of Example 1 was manufactured in the same manner as in Example 1.

<Example 9>
In place of BT resin double-sided copper-clad printed board (Mitsubishi Gas Chemical), a BT resin prepreg thermoset material was used for the base substrate, and direct plating was used instead of chemical copper plating on the entire surface. A multilayer wiring board similar to that of Example 2 was manufactured in the same manner as in Example 2.

<Example 10>
In Example 1, the insulating film slightly remaining on the copper conductor surface was removed with an alkaline permanganate-based etchant, exposing the copper conductor surface. Thereafter, the resultant was immersed in a mixture of ethylenediamine and hydrazine hydrate to decompose the polyimide filler and roughen the surface of the insulating film.

<Example 11>
In Example 2, the insulating film slightly remaining on the surface of the via copper conductor was removed with an alkaline permanganate-based etchant to expose the copper conductor surface. Thereafter, the resultant was immersed in a mixture of ethylenediamine and hydrazine hydrate to decompose the polyimide filler and roughen the surface of the insulating film.

<Example 12>
In Example 1, the insulating film slightly remaining on the copper conductor surface was removed with an alkaline permanganate-based etchant, exposing the copper conductor surface. Then, it was immersed in a mixed solution of N-methyl-2-pyrrolidone and halogenated phenol to dissolve the polyimide filler and roughen the surface of the insulating film.

<Example 13>
In Example 2, the insulating film slightly remaining on the surface of the via copper conductor was removed with an alkaline permanganate-based etchant to expose the copper conductor surface. Then, it was immersed in a mixed solution of N-methyl-2-pyrrolidone and halogenated phenol to dissolve the polyimide filler and roughen the surface of the insulating film.

1A is a perspective view of a land and a via, and FIG. 1B is a cross-sectional view of the multilayer wiring board according to the present invention, taken along line AA ′ of FIG. FIG. 2 schematically shows a top view of a surface layer of a double-sided printed wiring board serving as a core. FIG. 3 schematically shows a top view of one example of a wiring pattern of a wiring layer formed above and below a surface layer of a double-sided printed wiring board serving as a core. FIG. 3 schematically shows a top view of one example of a wiring pattern of a wiring layer formed above and below a surface layer of a double-sided printed wiring board serving as a core. FIG. 1 is a cross-sectional view of a semiconductor device using a multilayer wiring board of the present invention having two semiconductors or semiconductor packages mounted on an upper surface. 1 is a cross-sectional view of a semiconductor device having a lead frame attached thereto using a multilayer wiring board of the present invention in which one semiconductor or one semiconductor package is mounted on each of an upper surface and a lower surface. FIG. 3 is a cross-sectional view of a multilayer wiring board having excellent heat radiation characteristics, in which one through-hole is associated with one columnar copper body. FIG. 3 is a cross-sectional view of a multilayer wiring board having excellent heat radiation characteristics, in which one columnar copper body is made to correspond to a plurality of through holes. FIG. 9 is a cross-sectional view of a semiconductor device having excellent heat radiation characteristics formed using the substrate of FIG. It is a perspective view of the multilayer wiring board concerning the present invention which was excellent in high frequency characteristics. FIG. 3 is a top view of a semiconductor device having excellent high-frequency characteristics. It is the figure which showed the sectional view of the multilayer wiring board in the manufacturing process of the method B of the manufacturing method of the multilayer wiring board concerning this invention for every process. It is the figure which showed the cross section of the multilayer wiring board for the manufacturing process of the method A of the manufacturing method of the multilayer wiring board concerning this invention for every process. FIG. 3 is a cross-sectional view illustrating aspects of an insulating film, a filler, and a base conductive film. FIG. 4 is a top view for displaying each scale of the multilayer wiring board.

Explanation of reference numerals

101, 703: land 102, 205 of the filled through plated through hole land 102, 205: extended portion 103, 206 of the filled through plated through hole land: via 201, 202, 203, 204, 303, 304, 305, 306, 702 ,
802, 904: Filled through-plated through-holes 301: Wirings 302, 401, 402, 403, 404, 405, 502, 503, 602 of successively laminated thin film layers
603: pad α: through-hole grids β, γ of double-sided printed wiring board to be cores, grids 501, 601 of multi-layered thin film layers: multilayer wiring boards 504, 505, 604, 605, 902: semiconductor or semiconductor package 506 507, 606: Solder ball 607: Lead frame 701: Double-sided printed board 704, 804: Filled portion 705, 803, 805, 901, 905 of filled through plated through hole Copper 903, 906: Good heat conductor 1001 ... Wiring 1002... Insulating layers 1003, 1004 and 1103... Ground layer 1101. Substrate 1102... 1
309 Copper bodies 1205, 1306, 1310, 1401 Insulating films 1206, 1307, 1311 Copper conductor surface 1207 Interlayer insulating film 1208 Via hole 1402 Filler 1403 Underlying conductive film dp Through-hole lattice pitch dr Drill diameter wld ... Land width dq. Distance db from three lands. Dia. Dlp at bottom of photo via hole. Pad pitch dpld. Stud via diameter wl. Line width ws. Space width.

Claims (1)

A double-sided printed board that becomes the core,
A multilayer wiring board having a wiring layer formed thereon or below,
The double-sided printed board serving as the core includes a through-plated through-hole filled with holes,
The land existing on the periphery of the filled through-plated through hole is expanded to form an expanded land part,
A multilayer wiring board, wherein a via is formed on a surface of the extended land portion for making connection with the wiring layer formed above or below.

Images