KR20070079794A - Manufacturing method of printed circuit board - Google Patents

Manufacturing method of printed circuit board Download PDF

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Publication number
KR20070079794A
KR20070079794A KR1020060010769A KR20060010769A KR20070079794A KR 20070079794 A KR20070079794 A KR 20070079794A KR 1020060010769 A KR1020060010769 A KR 1020060010769A KR 20060010769 A KR20060010769 A KR 20060010769A KR 20070079794 A KR20070079794 A KR 20070079794A
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South Korea
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manufacturing
copper foil
printed circuit
circuit board
copper
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KR1020060010769A
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Korean (ko)
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KR100752017B1 (en
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최종민
신영환
오창열
김영선
문경돈
조영웅
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삼성전기주식회사
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/421Blind plated via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/423Plated through-holes or plated via connections characterised by electroplating method

Abstract

A method for manufacturing a printed circuit board is provided to reduce the manufacturing cost and process by using only an electric copper plating process. In a method for manufacturing a printed circuit board, a circular plate including an insulation layer(111) and a first copper foil and a second copper foil on both planes of the insulation layer is prepared. A blind via hole is formed for electrical conduction of the circular plate. A plated resist(115) is deposited on the bottom of the second copper foil located on the bottom of the insulation layer. A copper plated layer(116) is formed in the blind via hole by applying a current to the second copper foil.

Description

인쇄회로기판의 제조방법{Manufacturing Method of Printed Circuit Board}Manufacturing Method of Printed Circuit Board

도 1a 내지 도 1e는 종래의 인쇄회로기판의 제조방법을 나타내는 단면도.1A to 1E are cross-sectional views illustrating a conventional method for manufacturing a printed circuit board.

도 2a 내지 도 2c는 종래 기술에 따른 비아홀 제조방법을 나타내는 단면도.2A to 2C are cross-sectional views showing a method for manufacturing a via hole according to the prior art.

도 3a 내지 도 3g는 본 발명의 실시 예에 따른 인쇄회로기판의 제조방법을 나타내는 단면도.3A to 3G are cross-sectional views illustrating a method of manufacturing a printed circuit board according to an exemplary embodiment of the present invention.

<도면의 주요부분에 대한 부호의 간단한 설명><Brief description of symbols for the main parts of the drawings>

10, 100 : 원판 11, 111 : 절연층10, 100: 11, 111: insulating layer

12, 112a, 112b : 동박 13, 113 : 블라인드 비아홀12, 112a, 112b: copper foil 13, 113: blind via hole

14, 1114 : 솔더 레지스트 패턴 15, 117 : 도금층14, 1114: solder resist pattern 15, 117: plating layer

115 : 도금 레지스터 116 : 동 도금층115: plating resistor 116: copper plating layer

본 발명은 인쇄회로기판 및 그 제조방법에 관한 것으로, 보다 상세하게는 동 도금 공정 시간 및 제조 비용을 줄일 뿐만 아니라 비아홀 내부의 동 도금층 충진율을 향상시켜 열 방출 특성을 향상시킬 수 있는 인쇄회로기판의 제조방법에 관한 것이다.The present invention relates to a printed circuit board and a method of manufacturing the same. More particularly, the present invention relates to a printed circuit board which can improve the heat dissipation characteristics by improving the copper plating layer filling rate in the via hole, as well as reducing the copper plating process time and manufacturing cost. It relates to a manufacturing method.

인쇄회로기판(Printed Circuit Borad; PCB)이란 전자부품 상호 간의 전기배선을 회로설계에 기초하여, 절연기판 위에 도체를 형성하는 프린트 배선판으로 PCB기판, 프린트회로판 또는 인쇄배선기판(Printed Wiring Board)이라고 한다.Printed Circuit Board (PCB) is a printed wiring board that forms conductors on insulating boards based on circuit design. The electrical wiring between electronic components is called a PCB board, printed circuit board, or printed wiring board. .

일반적으로 인쇄회로기판은 페놀수지 절연판 또는 에폭시수지 절연판 등의 표면에 구리 박판을 부착시킨 후, 회로의 배선패턴에 따라 에칭하여 필요한 회로를 구성하고 그 위에 IC, 콘덴서, 저항 등의 여러 가지 전기전자부품을 조밀하게 탑재할 수 있게 하는 절연평판이다.In general, a printed circuit board is formed by attaching a copper thin plate to a surface of a phenol resin insulator or an epoxy resin insulator, and then etching it according to the wiring pattern of the circuit to form a necessary circuit, and various electrical and electronic devices such as IC, capacitor, and resistor thereon. It is an insulating flat plate that allows compact mounting of parts.

즉, 각 전자부품 상호 간을 연결하는 회로를 절연판의 표면에 배선모양으로 형성시킨 것이다. 인쇄회로기판은 배선회로판의 면수에 따라 단면기판, 양면기판, 다층기판 등으로 분류되고 있으며, 층수가 많을수록 부품의 실장력이 우수하고 고정밀제품에 사용된다.That is, a circuit for connecting the electronic components with each other is formed in the shape of a wiring on the surface of the insulating plate. Printed circuit boards are classified into single-sided boards, double-sided boards, and multilayer boards according to the number of printed circuit boards. The higher the number of layers, the better the mounting force of the parts and the high-precision products.

이러한, 인쇄회로기판의 제조방법은 홀을 가공하는 드릴(Drill) 공정, 가공된 홀의 전도성을 부여하는 동도금 공정 및 회로를 형성하는 회로공정으로 나누어진다.The method of manufacturing a printed circuit board is divided into a drill process for processing holes, a copper plating process for imparting conductivity of the processed holes, and a circuit process for forming a circuit.

도 1a 내지 도 1e는 종래의 인쇄회로기판의 제조방법을 나타내는 단면도이다.1A to 1E are cross-sectional views illustrating a method of manufacturing a conventional printed circuit board.

종래의 인쇄회로기판 제조방법은 먼저, 도 1a와 같이 절연층(11) 및 절연층 (11)의 양면에 동박(12)을 포함하는 동박적층판인 원판(10)을 준비한다.In the conventional method of manufacturing a printed circuit board, first, as shown in FIG. 1A, an original plate 10, which is a copper foil laminated plate including a copper foil 12 on both surfaces of an insulating layer 11 and an insulating layer 11, is prepared.

이후, 도 1b와 같이 레이저를 이용하여 원판(10)의 전기적인 도통을 위한 블라인드 비아홀(Blind Via Hole; 이하 "BVH"라 함)(13)을 형성한다.Thereafter, as shown in FIG. 1B, a blind via hole (hereinafter referred to as “BVH”) 13 for electrical conduction of the original plate 10 is formed by using a laser.

이후, 화학 동 도금 즉, 무 전해 동 도금 공정과 전해 동 도금 공정으로 도 1c와 같이 원판(10)이 전기적으로 도통되도록 BVH(13) 내벽에 동 도금층을 형성함과 아울러 회로패턴(12a, 12b)을 형성한다.Subsequently, a copper plating layer is formed on the inner wall of the BVH 13 so as to electrically conduct the original plate 10 as shown in FIG. 1C through chemical copper plating, that is, an electroless copper plating process and an electrolytic copper plating process, and also the circuit patterns 12a and 12b. ).

회로패턴(12a, 12b)을 형성한 후에는 솔더 레지스트(Solder Resist)를 회로패턴(12a, 12b) 상에 도포한 후에는 노광, 현상 및 건조 공정을 거쳐 전원의 공급 및 신호의 교환을 위해 외부 단자와 연결되는 부분을 제외한 나머지 영역에 도 1d와 같이 솔더 레지스트 패턴(14)을 형성한다.After the circuit patterns 12a and 12b are formed, a solder resist is applied onto the circuit patterns 12a and 12b and then exposed, developed, and dried to externally supply power and exchange signals. The solder resist pattern 14 is formed in the remaining region except for the portion connected to the terminal as illustrated in FIG. 1D.

이후, 외부 단자와 연결되는 부분 즉, 와이어 본딩 패드(Wire Bonding Pad)와 솔더볼 패드(Solder Ball Pad)에는 도 1e에 도시된 바와 같이 금, 니켈, 로듐 등과 같이 경도가 높고 도전성이 좋은 금속으로 도금층(15)을 형성한다.Subsequently, a portion of the wire bonding pad and the solder ball pad connected to the external terminal, that is, a plating layer made of metal having high hardness and good conductivity, such as gold, nickel, and rhodium, as shown in FIG. 1E. (15) is formed.

도 2a 내지 도 2c는 종래의 기술에 따른 비아홀 제조방법을 나타내는 도면이다.2A to 2C are diagrams illustrating a method of manufacturing a via hole according to the related art.

도 2a에 도시된 바와 같이 레이저에 의해 BVH(13)가 형성되면 디버링(Deburring) 및 디스미어(Desmear) 공정으로 BVH(13) 가공 중 발생하는 각종 오염과 이물질을 제거한다.As shown in FIG. 2A, when the BVH 13 is formed by a laser, various debris and foreign substances generated during the BVH 13 processing are removed by a deburring and desmear process.

이후, 도 2b에 도시된 바와 같이 BVH(13) 내의 전도성을 부여하기 위해 무 전해 동 도금 공정으로 BVH(13) 내벽에 대략 0.2㎛ 내지 0.4㎛ 정도로 무 전해 동 도금층(20)을 형성한다.Thereafter, as shown in FIG. 2B, the electroless copper plating layer 20 is formed on the inner wall of the BVH 13 by about 0.2 μm to 0.4 μm in order to impart conductivity in the BVH 13.

무 전해 동 도금층(20)을 형성한 후에는 절연층(11)의 상부 및 하부에 위치한 동박(12)에 전류를 인가하여 도 2c와 같이 균일한 전해 도금층(22)을 형성한다.After the electroless copper plating layer 20 is formed, a current is applied to the copper foil 12 positioned above and below the insulating layer 11 to form a uniform electroplating layer 22 as shown in FIG. 2C.

그러나, 이와 같이 무 전해 동 도금 공정을 이용하는 종래의 인쇄회로기판의 제조방법은 무 전해 동 도금 시 도금액 관리가 어려운 뿐만 아니라 동 도금 공정 전체에서 차지하는 비용이 가장 크기 때문에 비용이 증가하는 문제가 있다.However, the conventional method of manufacturing a printed circuit board using the electroless copper plating process has a problem in that the cost is increased because it is difficult to manage the plating solution during electroless copper plating and the cost of the entire copper plating process is the largest.

또한, 무 전해 동 도금 공정으로 인해 많은 공정 시간이 요구될 뿐만 아니라 원하는 두께의 전해 도금층(22)을 형성할 경우 전해 도금층(22)이 BVH(13) 홀 내부를 완전히 메우지 못하기 때문에 동박(12)의 열 방출 특성이 저하되는 문제가 있다.In addition, the electroless copper plating process requires a lot of processing time, and when the electroplating layer 22 having a desired thickness is formed, the electroplating layer 22 does not completely fill the inside of the BVH 13 hole. There is a problem that the heat release characteristic of 12) is lowered.

본 발명은 상기와 같은 문제점을 해결하기 위해 창안된 것으로서, 전기 동 도금 공정만을 이용하여 제조 비용을 줄임과 아울러 제조 공정을 단축할 수 있는 인쇄회로기판의 제조방법을 제공하는 것을 목적으로 한다.The present invention has been made to solve the above problems, and an object of the present invention is to provide a method for manufacturing a printed circuit board which can reduce the manufacturing cost and shorten the manufacturing process using only the electroplating process.

또한, 전해 동 도금만을 이용하여 충진율을 향상시킴으로써 동박의 열 방출 특성을 향상시킬 수 있는 인쇄회로기판의 제조방법을 제공하는 것을 목적으로 한다.In addition, an object of the present invention is to provide a method for manufacturing a printed circuit board which can improve heat dissipation characteristics of copper foil by improving the filling rate using only electrolytic copper plating.

상기 목적을 달성하기 위하여, 본 발명은 절연층 및 절연층의 양면에 제 1 동박 및 제 2 동박을 포함하는 원판을 준비하는 단계; 상기 원판의 전기적인 도통을 위해 블라인드 비아홀을 형성하는 단계; 상기 절연층의 하부에 위치한 상기 제 2 동박 하부에 도금 레지스터를 증착하는 단계; 및 상기 제 2 동박에 전류를 인가하여 상기 블라인드 비아홀 내부에 동 도금층을 형성하는 단계를 포함하여 이루어진 것을 특징으로 한다.In order to achieve the above object, the present invention comprises the steps of preparing a disc including an insulating layer and a first copper foil and a second copper foil on both sides of the insulating layer; Forming a blind via hole for electrical conduction of the disc; Depositing a plating resistor under the second copper foil under the insulating layer; And forming a copper plating layer in the blind via hole by applying a current to the second copper foil.

이하 첨부된 도면을 참조하여 본 발명의 바람직한 실시 예를 상세하게 설명한다. Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

도 3a 내지 도 3g는 본 발명의 실시 예에 따른 인쇄회로기판의 제조방법을 나타내는 단면도이다.3A to 3G are cross-sectional views illustrating a method of manufacturing a printed circuit board according to an exemplary embodiment of the present invention.

먼저, 도 3a에 도시된 바와 같이 절연층(111) 및 절연층(111) 양면에 동박(112a, 112b)을 포함하는 동박적층판인 원판(100)을 준비한다. 이때, 동박(112a, 112b)의 두께는 회로패턴을 형성할 수 있을 정도의 두께를 갖는다.First, as illustrated in FIG. 3A, an original plate 100, which is a copper clad laminate including copper foils 112a and 112b on both surfaces of the insulating layer 111 and the insulating layer 111, is prepared. At this time, the thickness of the copper foils 112a and 112b has a thickness enough to form a circuit pattern.

원판(100)이 준비되면, 도 3b에 도시된 바와 같이 레이저를 이용하여 블라인드 비아홀(Blind Via Hole; 이하 "BVH"라 함)(113)을 형성한다. BVH(113)가 형성되면, 디버링 및 디스미어 공정으로 BVH(113) 가공 중 발생하는 각종 오염과 이물질을 제거한다.When the disc 100 is prepared, a blind via hole 113 (BVH) 113 is formed using a laser as shown in FIG. 3B. When the BVH 113 is formed, various debris and foreign substances generated during the BVH 113 processing are removed by a deburring and desmear process.

이후, 도 3c에 도시된 바와 같이 절연층(111) 하부에 적층된 제 2 동박(112b)의 도금 두께를 제어하기 위해 제 2 동박(112b) 하부에 도금 레지스터(115) 를 적층한다. 이때, 도금 레지스터(115)로는 드라이 필름이 사용된다.Thereafter, as illustrated in FIG. 3C, the plating resistor 115 is stacked below the second copper foil 112b to control the plating thickness of the second copper foil 112b stacked below the insulating layer 111. At this time, a dry film is used as the plating resistor 115.

도금 레지스터(115) 적층 후 도 3d에 도시된 바와 같이 전해 동 도금 공정으로 동 도금층(116)을 형성한다. 이때, 전류는 절연층(111) 하부에 적층된 제 2 동박(112b)에만 인가된다. 또한, BVH(113) 내부에는 동 도금층(116)이 완전하게 충진된다. 이에 따라, 동박(112a, 112b)의 열 방출 특성이 향상된다.After laminating the plating resistor 115, the copper plating layer 116 is formed by an electrolytic copper plating process as shown in FIG. 3D. At this time, the current is applied only to the second copper foil 112b laminated under the insulating layer 111. In addition, the copper plating layer 116 is completely filled in the BVH 113. Thereby, the heat dissipation characteristic of the copper foil 112a, 112b improves.

동 도금층(116) 형성 후 동 도금층(116) 상에 드라이 필름을 증착하고, 드라이 필름 상에 아트워크 필름 즉, 마스크를 밀착시킨 후 자외선(UV)으로 노광한다. 이후, 도 3e에 도시된 바와 같이 현상 및 에칭 공정을 통해 회로패턴(112a, 112b)을 형성하고, 회로패턴(112a, 112b) 상에 증착된 드라이 필름을 제거한다.After the copper plating layer 116 is formed, a dry film is deposited on the copper plating layer 116, and the artwork film, that is, a mask is adhered to the dry film, and then exposed to ultraviolet rays (UV). Thereafter, as illustrated in FIG. 3E, the circuit patterns 112a and 112b are formed through the development and etching process, and the dry films deposited on the circuit patterns 112a and 112b are removed.

회로패턴(112a, 112b)을 형성한 후에는 솔더 레지스트(Solder Resist)를 회로패턴(112a, 112b) 상에 도포한 후에는 노광, 현상 및 건조 공정을 거쳐 전원의 공급 및 신호의 교환을 위해 외부 단자와 연결되는 부분을 제외한 나머지 영역에 도 3f에 도시된 바와 같이 솔더 레지스트 패턴(114)을 형성한다.After the circuit patterns 112a and 112b are formed, a solder resist is applied onto the circuit patterns 112a and 112b, and then exposed, developed, and dried to externally supply power and exchange signals. A solder resist pattern 114 is formed in the remaining region except for the portion connected to the terminal as shown in FIG. 3F.

이후, 외부 단자와 연결되는 부분 즉, 와이어 본딩 패드(Wire Bonding Pad)와 솔더볼 패드(Solder Ball Pad)에는 도 3g에 도시된 바와 같이 금, 니켈, 로듐 등과 같이 경도가 높고 도전성이 좋은 금속으로 도금층(117)을 형성한다.Subsequently, the portion connected to the external terminal, that is, the wire bonding pad and the solder ball pad, as shown in FIG. 3g, is a plated layer made of metal having high hardness and good conductivity such as gold, nickel, rhodium, and the like. 117 is formed.

상술한 바와 같이, 본 발명은 무 전해 동 도금 공정을 제거함으로써 인쇄회로기판의 제조 공정 시간 및 제조 비용을 줄일 수 있을 뿐만 아니라 무 전해 동 도 금 시 발생되는 불량을 감소시킬 수 있다.As described above, the present invention can reduce the manufacturing process time and manufacturing cost of the printed circuit board by eliminating the electroless copper plating process, and also reduce the defects generated during electroless copper plating.

또한, 본 발명은 전해 동 도금 시 절연층 하부에 위치한 동박 하부에 도금 레지스트를 적층하여 절연층 하부에 위치한 동박의 도금층 두께를 제어할 수 있다.In addition, the present invention can control the plating layer thickness of the copper foil located under the insulating layer by laminating a plating resist on the lower copper foil located under the insulating layer during electrolytic copper plating.

그리고, 본 발명은 전해 동 도금 시 하부 동박에만 전류를 인가하여 비아홀 내부에 동 도금층을 형성하기 때문에 비아홀 내부에 형성되는 동 도금층의 충진율을 향상시킬 수 있다. 이에 따라, 본 발명은 동박의 열 방출 특성을 향상시킬 수 있다.In addition, the present invention may improve the filling rate of the copper plating layer formed inside the via hole because the copper plating layer is formed inside the via hole by applying current only to the lower copper foil during electrolytic copper plating. Thereby, this invention can improve the heat emission characteristic of copper foil.

Claims (3)

절연층 및 절연층의 양면에 제 1 동박 및 제 2 동박을 포함하는 원판을 준비하는 단계;Preparing a disc including an insulating layer and a first copper foil and a second copper foil on both sides of the insulating layer; 상기 원판의 전기적인 도통을 위해 블라인드 비아홀을 형성하는 단계;Forming a blind via hole for electrical conduction of the disc; 상기 절연층의 하부에 위치한 상기 제 2 동박 하부에 도금 레지스터를 증착하는 단계; 및Depositing a plating resistor under the second copper foil under the insulating layer; And 상기 제 2 동박에 전류를 인가하여 상기 블라인드 비아홀 내부에 동 도금층을 형성하는 단계를 포함하는 것을 특징으로 하는 인쇄회로기판의 제조방법.And applying a current to the second copper foil to form a copper plating layer inside the blind via hole. 제 1 항에 있어서,The method of claim 1, 상기 도금 레지스터는 드라이 필름인 것을 특징으로 하는 인쇄회로기판의 제조방법.The plating resistor is a dry film manufacturing method, characterized in that the dry film. 제 1 항에 있어서,The method of claim 1, 상기 동 도금층은 상기 블라인드 비아홀 내부에 완전히 충진되는 것을 특징으로 하는 인쇄회로기판의 제조방법.The copper plating layer is a manufacturing method of a printed circuit board, characterized in that completely filled in the blind via hole.
KR1020060010769A 2006-02-03 2006-02-03 Manufacturing Method of Printed Circuit Board KR100752017B1 (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100878907B1 (en) * 2007-07-24 2009-01-15 공희철 Method of production dual layer flex circuit board for csp
KR100935871B1 (en) * 2007-11-22 2010-01-07 삼성전기주식회사 Printed circuit board and manufacturing method of the same
CN103260350A (en) * 2013-05-07 2013-08-21 梅州市志浩电子科技有限公司 Blind buried orifice plate laminating method and blind buried orifice plate manufactured with blind buried orifice plate laminating method
CN104821371A (en) * 2015-04-23 2015-08-05 曹先贵 Manufacturing method of LED integrated package substrate
CN110402030A (en) * 2019-07-29 2019-11-01 成都明天高新产业有限责任公司 A kind of manufacturing method and printed circuit board of printed circuit board radiator structure

Family Cites Families (2)

* Cited by examiner, † Cited by third party
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KR100237330B1 (en) * 1997-02-14 2000-01-15 김규현 Solder ball land manufacture method of ball grid array semiconductor package type pcb and the structure include pcb to ball grid array
KR20040061410A (en) * 2002-12-30 2004-07-07 삼성전기주식회사 PCB with the plated through holes filled with copper with copper and the fabricating method thereof

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100878907B1 (en) * 2007-07-24 2009-01-15 공희철 Method of production dual layer flex circuit board for csp
KR100935871B1 (en) * 2007-11-22 2010-01-07 삼성전기주식회사 Printed circuit board and manufacturing method of the same
CN103260350A (en) * 2013-05-07 2013-08-21 梅州市志浩电子科技有限公司 Blind buried orifice plate laminating method and blind buried orifice plate manufactured with blind buried orifice plate laminating method
CN104821371A (en) * 2015-04-23 2015-08-05 曹先贵 Manufacturing method of LED integrated package substrate
CN110402030A (en) * 2019-07-29 2019-11-01 成都明天高新产业有限责任公司 A kind of manufacturing method and printed circuit board of printed circuit board radiator structure

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