CN114222445B - Circuit board manufacturing method and circuit board - Google Patents
Circuit board manufacturing method and circuit board Download PDFInfo
- Publication number
- CN114222445B CN114222445B CN202111318306.8A CN202111318306A CN114222445B CN 114222445 B CN114222445 B CN 114222445B CN 202111318306 A CN202111318306 A CN 202111318306A CN 114222445 B CN114222445 B CN 114222445B
- Authority
- CN
- China
- Prior art keywords
- copper foil
- blind hole
- foil layer
- group
- structures
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/428—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
- H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/421—Blind plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
Abstract
The application provides a circuit board manufacturing method and a circuit board. The manufacturing method of the circuit board comprises the following steps: preparing a base material, wherein the base material comprises a core plate, and a first copper foil layer and a second copper foil layer which are covered on two sides of the core plate; drilling a blind hole structure on the base material, and enabling the blind hole structure to reach one side of the second copper foil layer close to the core plate in the direction that the first copper foil layer points to the second copper foil layer; performing primary pattern transfer on the first copper foil layer and the second copper foil layer and manufacturing a circuit pattern; and carrying out metallization treatment on the blind hole structure, and forming electrical interconnection between the first copper foil layer and the second copper foil layer through the conductive material in the blind hole structure. The circuit board manufacturing method provided by the application carries out metallization treatment on the blind hole structure after one-time pattern transfer, the thickness of the copper foil layer is unchanged, the uniformity is good, and a fine and dense circuit pattern can be conveniently manufactured; the conductive material and the copper foil layer in the blind hole structure are connected into a copper layer network to replace the embedded copper block in the prior art, and the blind hole structure has small size and high heat conduction performance.
Description
Technical Field
The application belongs to the technical field of circuit board manufacturing, and particularly relates to a circuit board manufacturing method and a circuit board.
Background
Along with the miniaturization and intelligent development of electronic products, as a basic component of the electronic products, the printed circuit boards synchronously tend to develop in precision and diversification. For example, any layer of interconnect board presented by any layer of interconnect technology is the forefront market demand based on high density interconnect boards. Wherein, interconnection of any layer refers to the realization of interlayer interconnection between each layer of the printed circuit board through laser micropore, and the adoption of interconnection of any layer can make full use of each inch space of the circuit board, and the wiring density is big, and the design is more accurate and flexible.
The high-density integration leads the size of the printed board to be rapidly reduced, and electronic components are densely attached to the printed board, and the working temperature of the electronic components is continuously increased. For example, the working temperature rise of the traditional printed board is mostly above or below 70 ℃, while the working temperature rise of the high-density integrated or high-power printed board can reach above or below 110 ℃ or even exceed 130 ℃. According to a large number of experiments and statistical data, the working temperature of the printed board becomes the most important factor affecting the service life and performance of electronic components. In order to solve the problem, a printed board material with high heat conductivity and a structure are generally adopted in the industry to manufacture a heat conduction/radiation printed board, and heat is rapidly conducted to a board surface by utilizing a material with high heat conductivity coefficient in the printed board and then radiated out, such as a metal substrate, a buried copper block board, a thick copper plate and the like. However, since the metal plate is thick and heavy, it is not suitable for any thin and miniaturized interconnection plate. The embedded copper block board is to directly embed/embed the copper block into the printed board, if the size of the copper block is too small, the production and processing efficiency can be affected, if the size of the copper block is too large, the wiring area of the board surface can be affected. The thick copper plate cannot be used for manufacturing a fine circuit, and the heat conducting property of the thick copper plate is poor.
Disclosure of Invention
An object of the embodiment of the application is to provide a circuit board manufacturing method and a circuit board, so as to solve the technical problems that a heat conduction type circuit board product in the prior art is large in size, poor in heat conduction performance and incapable of manufacturing a fine circuit pattern.
In order to achieve the above purpose, the technical scheme adopted in the application is as follows: the circuit board manufacturing method comprises the following steps:
preparing a base material, wherein the base material comprises a core plate, and a first copper foil layer and a second copper foil layer which are respectively coated on two opposite sides of the core plate;
drilling at least one blind hole structure on the base material, and enabling the blind hole structure to reach one side, close to the core plate, of the second copper foil layer in the direction that the first copper foil layer points to the second copper foil layer;
performing primary pattern transfer on the first copper foil layer and the second copper foil layer and manufacturing a circuit pattern;
and carrying out metallization treatment on the blind hole structure, and forming electrical interconnection between the first copper foil layer and the second copper foil layer in the blind hole structure through a conductive material.
In one embodiment, drilling at least one blind via structure in the substrate comprises:
drilling a first group of blind hole structures and a second group of blind hole structures on the base material along the direction that the first copper foil layer points to the second copper foil layer;
wherein the first set of blind via structures comprises at least one of the blind via structures, the first set of blind via structures being for electrical conduction; the second group of blind hole structures comprises at least two blind hole structures, the at least two blind hole structures are arranged in an array, and the second group of blind hole structures are used for conducting heat.
In one embodiment, the primary pattern transfer comprises dry film pasting, exposure and development treatment;
performing a pattern transfer on the first copper foil layer and the second copper foil layer and making a circuit pattern, including:
pasting a dry film on the first copper foil layer, enabling the dry film to cover a preset circuit pattern on the first copper foil layer, a region where a hole disc corresponding to the hole side of the first group of blind hole structures is located, and a region where a hole disc corresponding to the hole side of the second group of blind hole structures is located, and then performing one-time etching on the exposed region on the first copper foil layer to obtain the circuit pattern on the first copper foil layer; the dry film covers the whole area formed by the hole discs corresponding to the hole sides of all the blind hole structures in the second group of blind hole structures;
pasting a dry film on the second copper foil layer, enabling the dry film to cover a preset circuit pattern on the second copper foil layer, a region where a hole disc corresponding to the hole bottom side of the first group of blind hole structures is located, and a region where a hole disc corresponding to the hole bottom side of the second group of blind hole structures is located, and then carrying out one-time etching on the exposed region on the second copper foil layer to obtain the circuit pattern on the second copper foil layer; the dry film covers the whole area formed by the hole discs corresponding to the hole bottom sides of all the blind hole structures in the second group of blind hole structures.
In one embodiment, the metallization of the blind via structure includes:
conducting material adhesion treatment is conducted on the hole walls of the first group of blind hole structures and the second group of blind hole structures;
and electroplating and hole filling treatment is carried out in the first group of blind hole structures and the second group of blind hole structures.
In one embodiment, the conducting material attaching process is performed on the hole walls of the first set of blind hole structures and the second set of blind hole structures, including:
conducting material adhesion treatment is carried out on the whole layer surfaces of the first copper foil layer and the second copper foil layer, so that conducting material layers are formed on the hole walls of the first group of blind hole structures and the second group of blind hole structures, and further electric interconnection is formed between the first group of blind hole structures and the second group of blind hole structures and the first copper foil layer and the second copper foil layer;
the whole layer surface of the first copper foil layer comprises the surface of a circuit pattern on the first copper foil layer, the surface of a primary etching area, the hole wall of the blind hole structure and the surface of a hole disc corresponding to the hole side of the blind hole structure; the whole layer surface of the second copper foil layer comprises the surface of a circuit pattern on the second copper foil layer, the surface of a primary etching area and the surface of a hole disc corresponding to the bottom side of a hole of the blind hole structure.
In one embodiment, after conducting material adhesion treatment is performed on the hole walls of the first set of blind hole structures and the second set of blind hole structures, and before electroplating hole filling treatment is performed in the first set of blind hole structures and the second set of blind hole structures, secondary pattern transfer is performed on the first copper foil layer and the second copper foil layer, and the secondary pattern transfer comprises dry film pasting, exposure and development treatment:
performing a secondary pattern transfer on the first copper foil layer and the second copper foil layer, comprising:
pasting a dry film on the first copper foil layer, and enabling the dry film to cover a circuit pattern and an etching area on the first copper foil layer, wherein the area where the first group of blind hole structures and the hole disc corresponding to the hole opening side of the first group of blind hole structures are located, and the area where the second group of blind hole structures and the hole disc corresponding to the hole opening side of the second group of blind hole structures are located are exposed; wherein the dry film exposes an integral area formed by hole discs corresponding to hole sides of all the blind hole structures in the second group of blind hole structures;
pasting a dry film on the second copper foil layer, and enabling the dry film to cover a circuit pattern and an etching area on the second copper foil layer and an area where a hole disc corresponding to the bottom side of a hole of the first group of blind hole structures is located, wherein the area where the hole disc corresponding to the bottom side of the hole of the second group of blind hole structures is located is exposed; the dry film exposes an integral area formed by hole discs corresponding to the hole bottom sides of all the blind hole structures in the second group of blind hole structures.
In one embodiment, when the electroplating hole filling is performed in the first set of blind hole structures and the second set of blind hole structures, the method further comprises:
and electroplating and thickening the area where the hole disc corresponding to the hole side of the first group of blind hole structures is located, the integral area formed by the hole disc corresponding to the hole side of the second group of blind hole structures, and the integral area formed by the hole disc corresponding to the hole bottom side of the second group of blind hole structures.
In one embodiment, after the electroplating hole filling process is performed in the first set of blind hole structures and the second set of blind hole structures, the method further comprises:
and performing secondary etching treatment on the primary etching areas of the first copper foil layer and the second copper foil layer so as to etch and remove the conductive material layer attached to the primary etching area in the conductive material attaching treatment process.
In one embodiment, after the second etching treatment is performed on the first etching area of the first copper foil layer and the second copper foil layer, the method further includes:
sequentially laminating a core plate and a copper foil layer on any side of the base material after the secondary etching treatment, and treating the whole layer formed by the core plate and the copper foil layer according to the circuit board manufacturing method;
and the like until a circuit board with a preset layer number and any layer interconnection is formed.
Compared with the prior art, the circuit board manufacturing method provided by the application has the beneficial effects that:
firstly, performing primary pattern transfer on a first copper foil layer and a second copper foil layer, manufacturing a circuit pattern, and then performing metallization treatment on a blind hole structure, wherein the first copper foil layer and the second copper foil layer are electrically interconnected through a conductive material in the blind hole structure; therefore, when the pattern is transferred once to form the circuit pattern, the thickness of the copper foil layer is not changed, the surface uniformity is good, the etching factor can be well controlled by direct etching, and the fine and compact circuit pattern can be conveniently manufactured;
secondly, at least one blind hole structure is drilled on the substrate, metallization treatment is carried out on the blind hole structure, electric interconnection is formed between the first copper foil layer and the second copper foil layer through the conductive material in the blind hole structure, the conductive material and the copper foil layer in the blind hole structure are connected into a copper layer network, an embedded copper block in the prior art is replaced, and the purposes of small size and high heat conductivity are achieved.
Another object of the present application is to provide a circuit board manufactured according to the above circuit board manufacturing method, where the circuit board includes a substrate;
the base material comprises a core plate, and a first copper foil layer and a second copper foil layer which are respectively covered on two opposite sides of the core plate; the substrate is provided with a blind hole structure, the blind hole structure penetrates through the thicknesses of the first copper foil layer and the core plate and reaches one side, close to the core plate, of the second copper foil layer along the direction of the first copper foil layer towards the second copper foil layer, and conductive materials are filled in the blind hole structure;
the first copper foil layer and the second copper foil layer are respectively provided with a circuit pattern, and the circuit patterns on the first copper foil layer and the second copper foil layer are electrically connected through the conductive material in the blind hole structure.
In one embodiment, the substrate is provided with a first set of blind hole structures and a second set of blind hole structures;
wherein the first set of blind via structures comprises at least one of the blind via structures, the first set of blind via structures being for electrical conduction; the second group of blind hole structures comprises at least two blind hole structures, the at least two blind hole structures are arranged in an array, and the second group of blind hole structures are used for conducting heat.
In an embodiment, the surface of the entire area formed by the hole plates corresponding to the hole sides of all the blind hole structures in the second set of blind hole structures and the surface of the entire area formed by the hole plates corresponding to the hole bottom sides of all the blind hole structures in the second set of blind hole structures are electroplated with an electroplated thickening layer, and the electroplated thickening layer has conductivity.
Compared with the beneficial effects of the prior art, the circuit board provided by the application has the beneficial effects of the prior art compared with the circuit board manufacturing method provided by the application, and the description is omitted here.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required for the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a circuit board manufacturing method according to an embodiment of the present application;
fig. 2 is a flowchart of step 103 of the circuit board manufacturing method provided in the embodiment of the present application;
fig. 3 is a flowchart of step 104 of the circuit board manufacturing method provided in the embodiment of the present application;
fig. 4 is a flowchart of step 104 of the circuit board manufacturing method provided in the embodiment of the present application;
FIG. 5 is a schematic view of a substrate according to an embodiment of the present disclosure;
FIG. 6 is a schematic diagram of a substrate with a blind via structure after drilling according to an embodiment of the present disclosure;
FIG. 7 is a schematic view of a substrate with a dry film applied during one pattern transfer according to an embodiment of the present application;
FIG. 8 is a schematic diagram of a substrate after one etching according to an embodiment of the present disclosure;
FIG. 9 is a schematic diagram of a substrate with circuit patterns formed after removing a dry film applied by a pattern transfer according to an embodiment of the present application;
FIG. 10 is a schematic diagram of a substrate with a conductive material layer attached to a blind via structure according to an embodiment of the present disclosure;
FIG. 11 is a schematic view of a substrate with a dry film applied during a secondary pattern transfer according to an embodiment of the present disclosure;
FIG. 12 is a schematic view of a substrate with an electroplated thickening layer after an electroplated thickening treatment according to an embodiment of the present application;
FIG. 13 is a schematic view of a substrate after removing a dry film applied by a secondary pattern transfer according to an embodiment of the present application;
FIG. 14 is a schematic view of a rapidly etched substrate according to an embodiment of the present disclosure;
fig. 15 is a schematic view of a circuit board with a multilayer substrate according to an embodiment of the present application.
Wherein, each reference sign in the figure:
10. a substrate; 101. a core plate; 102. a first copper foil layer; 103. a second copper foil layer; 20. a blind hole structure; 201. a first set of blind hole structures; 202. a second set of blind hole structures; 30. a dry film; 40. a circuit pattern; 50. a conductive material layer; 60. electroplating a hole filling column; 70. and electroplating a thickening layer.
Detailed Description
In order to make the technical problems, technical schemes and beneficial effects to be solved by the present application more clear, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
It will be understood that when an element is referred to as being "mounted" or "disposed" on another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
It is to be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like indicate or are based on the orientation or positional relationship shown in the drawings, merely to facilitate description of the present application and simplify description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be configured and operated in a particular orientation, and therefore should not be construed as limiting the present application.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
The method for manufacturing the circuit board and the circuit board provided by the embodiment of the application are described.
Referring to fig. 1 to 15, the method for manufacturing a circuit board according to the embodiment of the present application sequentially includes the following steps 101 to 107. Each step involved in the manufacturing method will be described in detail below with reference to the flowcharts of fig. 1 to 4 and the block diagrams of fig. 5 to 15.
The core board 101 is designed with copper clad on both sides, and a first copper foil layer 102 and a second copper foil layer 103 are formed on opposite sides of the core board 101, and the copper foil thickness of the first copper foil layer 102 and the second copper foil layer 103 is equal to a predetermined thickness of the circuit pattern 40 described below.
Wherein, in the direction that the first copper foil layer 102 points to the second copper foil layer 103, the pore diameters of all the blind hole structures 20 gradually decrease. In this embodiment, the blind via structure 20 is preferably drilled in the substrate 10 by laser ablation.
Wherein drilling at least one blind via structure 20 on the substrate 10 comprises:
drilling a first group of blind hole structures 201 and a second group of blind hole structures 202 on the substrate 10 along the direction that the first copper foil layer 102 points to the second copper foil layer 103; wherein the first set of blind via structures 201 includes at least one blind via structure 20, and the first set of blind via structures 201 is used for communicating the layers of lines to realize electrical conduction; the second set of blind via structures 202 includes at least two blind via structures 20, the at least two blind via structures 20 being arranged in an array, the second set of blind via structures 202 being configured to conduct heat.
In this embodiment, the number of blind via structures 20 in the first set of blind via structures 201 is determined according to actual requirements. In the present embodiment, the second set of blind via structures 202 is a collection of blind via structures 20, that is, the second set of blind via structures 202 is composed of at least two or more blind via structures 20. The blind via structures 20 in the second set of blind via structures 202 are arranged in a rectangular or square array on the same layer of substrate 10. Alternatively, the blind hole structures 20 in the second set of blind hole structures 202 take one of them as a center, and the other blind hole structures 20 are uniformly distributed on the same circumference taking the center as the center.
In this embodiment, the aperture of the blind via structure 20 can be consistent with the maximum aperture of a conventional blind via on an existing circuit board, and after the following metallization process is performed in the blind via structure 20, the blind via structure 20 is filled with, for example, copper pillars, which is beneficial to heat dissipation. Of course, the area of the second set of blind via structures 202 may be sized according to the desired heat transfer area of the circuit board, for example, the aperture of the blind via structure 20 may be properly reduced.
The first pattern transfer is understood to be the first pattern transfer, which includes the dry film 30, exposure, and development treatments. The substrate 10 to which the dry film is attached in one pattern transfer is shown in fig. 7. Specifically, as shown in fig. 2, performing a pattern transfer on the first copper foil layer 102 and the second copper foil layer 103 once and making the circuit pattern 40 includes:
After the exposed area on the first copper foil layer 102 is etched for one time to obtain the circuit pattern 40 on the first copper foil layer 102, removing the residual dry film 30 on the first copper foil layer 102; after the exposed area on the second copper foil layer 103 is etched once to obtain the circuit pattern 40 on the second copper foil layer 103, the remaining dry film 30 on the second copper foil layer 103 is removed. The substrate with the circuit pattern formed after removing the dry film attached by the primary pattern transfer is shown in fig. 9.
Wherein, steps 1031 and 1032 are performed synchronously.
The hole plates corresponding to the second group of blind hole structures 202 are integrated, and the hole plates of any two adjacent blind hole structures 20 are connected through the copper foil layer without gaps, so that the hole plates corresponding to the second group of blind hole structures 202 can be considered to be the same network and are electrically communicated.
Specifically, as shown in fig. 3, the blind via structure 20 is metallized, including steps 1041 and 1042 described below.
A dense layer of conductive material 50 is formed on the walls of the blind via structure 20, for example using electroless copper deposition, a black via process, or a graphene process. In this embodiment, a dense thin copper layer is formed on the hole wall of the blind hole structure 20 by electroless copper plating, so that the copper foil layer on the surface of the board is electrically connected with the thin copper layer, thereby facilitating the subsequent copper plating operation.
More specifically, the conductive material adhesion treatment is performed on the hole walls of the first set of blind hole structures 201 and the second set of blind hole structures 202, including:
conductive material adhesion treatment is performed on the entire layer surfaces of the first copper foil layer 102 and the second copper foil layer 103, so that the conductive material layers 50 are formed on the hole walls of the first group of blind hole structures 201 and the second group of blind hole structures 202, and further, electrical interconnection is formed between the first copper foil layer 102 and the second copper foil layer 103.
Wherein the entire layer surface of the first copper foil layer 102 includes the surface of the circuit pattern 40 on the first copper foil layer 102, the surface of the primary etching region, the hole wall of the blind hole structure 20 and the surface of the hole disk corresponding to the hole side of the blind hole structure 20; the entire layer surface of the second copper foil layer 103 includes the surface of the circuit pattern 40 on the second copper foil layer 103, the surface of the one-time etched area, the surface of the hole plate corresponding to the hole bottom side of the blind hole structure 20. The substrate with the conductive material layer attached to the blind via structure is shown in fig. 10.
In this embodiment, electroless copper deposition is performed on the entire board, and thus thin copper is deposited on the circuit pattern 40 on the board surface and the exposed substrate 10 after etching, but the copper layer formed by electroless copper deposition is thin, and hardly affects the shape of the circuit pattern 40.
In the embodiment of the present application, step 105 (secondary pattern transfer) is further included after step 1041 (conductive material attaching process) and before step 1042 (electroplating hole filling process).
The secondary pattern transfer is understood to be a second pattern transfer, which includes the steps of applying a dry film 30, exposing, and developing. Specifically, as shown in fig. 4, secondary pattern transfer is performed on the first copper foil layer 102 and the second copper foil layer 103, including steps 1051 and 1052 described below.
Step 1051, pasting a dry film 30 on the first copper foil layer 102, and covering the circuit pattern 40 and the etching area on the first copper foil layer 102 with the dry film 30 to expose the area where the first group of blind hole structures 201 and the hole disc corresponding to the hole opening side are located, and the area where the second group of blind hole structures 202 and the hole disc corresponding to the hole opening side are located; wherein the dry film 30 exposes an entire area formed by the hole plates corresponding to the hole sides of all the blind hole structures 20 in the second set of blind hole structures 202;
Wherein steps 1051 and 1052 described above are performed simultaneously.
Preferably, the thickness of the dry film 30 used in the process of transferring the pattern on the first copper foil layer 102 and the second copper foil layer 103 and fabricating the circuit pattern 40 is smaller than the thickness of the dry film 30 used in the process of metallizing the blind via structure 20. The dry film 30 thickness used for secondary pattern transfer is larger than the dry film 30 thickness used for primary pattern transfer, and the thin dry film 30 used for primary pattern transfer has better resolution, thereby being beneficial to manufacturing fine lines. And when the thick dry film 30 is used for secondary pattern transfer, the film clamping during the electroplating to form a thick copper circuit can be avoided, so that the etching quality is not affected. Since the circuit pattern 40 is present on the surface of the board during the secondary pattern transfer, the circuit pattern 40 and the surface of the base material 10 form a step, and a vacuum film press is required for film lamination in order to better bond the dry film 30 and the copper foil layer.
The step 1042 further includes a plating thickening process performed in synchronization with the plating hole filling process, wherein:
electroplating thickening treatment: electroplating thickening treatment is performed on the area where the hole disc corresponding to the hole side of the first group of blind hole structures 201 is located, the whole area formed by the hole disc corresponding to the hole side of all the blind hole structures 20 in the second group of blind hole structures 202, and the whole area formed by the hole disc corresponding to the hole bottom side of all the blind hole structures 20 in the second group of blind hole structures 202, so as to form an electroplating thickening layer 70. The substrate 10 having the electroplated thickening layer 70 after the electroplated thickening treatment is shown in fig. 12.
In this way, the developed core board 101 is subjected to the plating hole filling process, the blind hole structure 20 on the core board 101 is filled with the plating copper, and the hole plate portion not covered with the dry film 30 is thickened. Wherein, the electroplating hole filling of the scheme is preferably processed by VCP electroplating equipment.
After the step 1042 is completed, the method further includes:
In the electroplating hole filling process, only the thickness of the copper foil layer on the blind hole structure 20 and the corresponding hole side is thickened by electroplating, and other circuit pattern 40 parts and the part of the substrate 10 deposited with thin copper are covered by the dry film 30, so that the thickness of the copper layer is unchanged. Therefore, after the dry film attached by the secondary pattern transfer is removed, only the thin copper deposited on the plate surface is removed by etching in the rapid etching step. The rapid etching is also called differential etching or flash etching, and the base copper, i.e., the chemically deposited thin copper in this embodiment, is etched away in a short time by controlling the etching time. After etching, the plate surface forms a preset pattern circuit and a blind hole with electroplated filling holes. The substrate 10 after removing the dry film 30 applied by the secondary pattern transfer is shown in fig. 13.
Wherein after the secondary etching treatment is performed on the primary etching areas of the first copper foil layer 102 and the second copper foil layer 103, the method further comprises:
The core board 101 (preferably prepreg) and the thin copper foil are laminated on both sides of the core board 101 after the rapid etching, respectively, to form 4-layer boards, and the above-described manufacturing method is repeated. If the number of layers is required to be further increased, the prepreg and the thin copper foil are pressed again, and the like until any interconnection plate with the preset number of layers is formed.
In the drilling step, it should be noted that the conventional blind holes can be drilled normally, and the set of the second set of blind hole structures 202 for heat conduction is required to be arranged in one-to-one correspondence with the set of the drilled second set of blind hole structures 202 in the vertical direction, so as to finally form the set of metallized blind hole structures 20 penetrating the board surface.
In the secondary pattern transfer and electroplating hole filling process, the blind hole structure 20 drilled after lamination has the bottom side pressed, belongs to the inner layer circuit, and cannot be electroplated and thickened, so that the problem of dry film 30 coverage is not needed to be considered. It will be appreciated that the blind via structures 20 for thermal conduction may be provided at a plurality of locations within the board, and the number and arrangement of blind via structures 20 for thermal conduction may be the same or may be different from one location to another.
Compared with the prior art, the circuit board manufacturing method provided by the embodiment of the application has the beneficial effects that:
firstly, the circuit board manufacturing method provided by the application is that after pattern transfer is carried out on the first copper foil layer 102 and the second copper foil layer 103 for one time and circuit patterns 40 are manufactured, metallization treatment is carried out on the blind hole structure 20, and electrical interconnection is formed between the first copper foil layer 102 and the second copper foil layer 103 in the blind hole structure 20 through conductive materials; thus, when the pattern is transferred once to form the circuit pattern 40, the thickness of the copper foil layer is not changed, the surface uniformity is good, the etching factor can be well controlled by direct etching, and the circuit pattern 40 with fine density can be conveniently manufactured.
Secondly, drilling at least one blind hole structure 20 on the substrate 10, carrying out metallization treatment on the blind hole structure 20, forming electrical interconnection between the first copper foil layer 102 and the second copper foil layer 103 in the blind hole structure 20 through a conductive material, and connecting the conductive material and the copper foil layer in the blind hole structure 20 into a copper layer network to replace an embedded copper block in the prior art, thereby achieving the purposes of small size and high heat conductivity.
Thirdly, the electroplating filling of the blind hole structure 20 is changed from whole plate electroplating to local electroplating, copper plating and copper reduction of the whole plate are not needed to manufacture fine circuits, metal resources are saved, meanwhile, ultra-thin copper foil is not needed, and the total production cost is saved.
Fourth, in the rapid etching step, the thickness of the base copper to be etched is only the copper layer deposited chemically, the etching time is short, the side etching amount of the circuit can be accurately controlled, and the etching precision is higher.
Another object of the present application is to provide a circuit board manufactured according to the above circuit board manufacturing method, wherein the circuit board includes a substrate 10; the substrate 10 comprises a core board 101 and a first copper foil layer 102 and a second copper foil layer 103 respectively coated on two opposite sides of the core board 101; the substrate 10 is provided with a blind hole structure 20, the blind hole structure 20 penetrates through the thicknesses of the first copper foil layer 102 and the core plate 101 along the direction that the first copper foil layer 102 points to the second copper foil layer 103 and reaches one side, close to the core plate 101, of the second copper foil layer 103, and the blind hole structure 20 is filled with a conductive material; the first copper foil layer 102 and the second copper foil layer 103 are respectively provided with a circuit pattern 40, and the circuit patterns 40 on the first copper foil layer 102 and the second copper foil layer 103 are electrically interconnected through the conductive material in the blind hole structure 20.
In one embodiment, the substrate 10 is provided with a first set of blind via structures 201 and a second set of blind via structures 202;
wherein the first set of blind via structures 201 comprises at least one blind via structure 20, the first set of blind via structures 201 being for conducting electrical current; the second set of blind via structures 202 includes at least two blind via structures 20, the at least two blind via structures 20 being arranged in an array, the second set of blind via structures 202 being configured to conduct heat.
In one embodiment, the entire area surface formed by the hole plates corresponding to the aperture sides of all the blind hole structures 20 in the second set of blind hole structures 202 and the entire area surface formed by the hole plates corresponding to the hole bottom sides of all the blind hole structures 20 in the second set of blind hole structures 202 are electroplated with the electroplated thickening layer 70, and the electroplated thickening layer 70 has conductivity.
In one embodiment, the surface of the area where the hole plate corresponding to the hole side of the first set of blind hole structures 201 is located is electroplated with an electroplated thickening layer 70, and the electroplated thickening layer 70 has conductivity.
Compared with the beneficial effects of the prior art, the circuit board provided by the application has the beneficial effects of the prior art compared with the circuit board manufacturing method provided by the application, and the description is omitted here.
The foregoing description of the preferred embodiments of the present application is not intended to be limiting, but is intended to cover any and all modifications, equivalents, and alternatives falling within the spirit and principles of the present application.
Claims (10)
1. A method of manufacturing a circuit board, comprising:
preparing a base material (10), wherein the base material (10) comprises a core board (101) and a first copper foil layer (102) and a second copper foil layer (103) which are respectively coated on two opposite sides of the core board (101);
drilling at least one blind hole structure (20) on the base material (10), and enabling the blind hole structure (20) to reach one side of the second copper foil layer (103) adjacent to the core board (101) in the direction of the first copper foil layer (102) pointing to the second copper foil layer (103), wherein the blind hole structure (20) comprises a first group of blind hole structures (201) and a second group of blind hole structures (202);
performing primary pattern transfer on the first copper foil layer (102) and the second copper foil layer (103) and manufacturing a circuit pattern (40), wherein the primary pattern transfer comprises dry film (30) pasting, exposure and development treatment;
-metallizing the blind via structure (20), wherein an electrical interconnection is formed between the first copper foil layer (102) and the second copper foil layer (103) by means of a conductive material in the blind via structure (20), the metallizing comprising: conducting material attachment treatment is carried out on the hole walls of the first group of blind hole structures (201) and the second group of blind hole structures (202); performing electroplating hole filling treatment in the first group of blind hole structures (201) and the second group of blind hole structures (202) to form electroplating hole filling columns (60), wherein the electroplating hole filling columns (60) completely fill the first group of blind hole structures (201) and the second group of blind hole structures (202);
after conducting material adhesion treatment is performed on the hole walls of the first group of blind hole structures (201) and the second group of blind hole structures (202), and before electroplating hole filling treatment is performed on the first group of blind hole structures (201) and the second group of blind hole structures (202), secondary pattern transfer is performed on the first copper foil layer (102) and the second copper foil layer (103), the secondary pattern transfer comprises dry film (30) pasting, exposure and development treatment, the dry film (30) covers circuit patterns (40) and etching areas on the first copper foil layer (102) and the second copper foil layer (103), and areas where the first group of blind hole structures (201) and hole discs corresponding to the hole opening sides thereof are exposed, and areas where the second group of blind hole structures (202) and hole discs corresponding to the hole opening sides thereof are located are also included.
2. The circuit board manufacturing method according to claim 1, wherein:
-the first set of blind via structures (201) comprises at least one of the blind via structures (20), the first set of blind via structures (201) being for conducting electricity; the second group of blind hole structures (202) comprises at least two blind hole structures (20), the at least two blind hole structures (20) are arranged in an array, and the second group of blind hole structures (202) are used for conducting heat.
3. The circuit board manufacturing method according to claim 2, wherein:
-performing a pattern transfer and making a circuit pattern (40) on the first copper foil layer (102) and the second copper foil layer (103), comprising:
pasting a dry film (30) on the first copper foil layer (102), enabling the dry film (30) to cover a preset circuit pattern (40) on the first copper foil layer (102), a region where a hole disc corresponding to the hole side of the first group of blind hole structures (201) is located, and a region where a hole disc corresponding to the hole side of the second group of blind hole structures (202) is located, and then carrying out one-time etching on the exposed region on the first copper foil layer (102) to obtain the circuit pattern (40) on the first copper foil layer (102); wherein the dry film (30) covers an integral area formed by hole discs corresponding to the hole sides of all the blind hole structures (20) in the second group of blind hole structures (202);
pasting a dry film (30) on the second copper foil layer (103), enabling the dry film (30) to cover a preset circuit pattern (40) on the second copper foil layer (103), a region where a hole disc corresponding to the hole bottom side of the first group of blind hole structures (201) is located, a region where a hole disc corresponding to the hole bottom side of the second group of blind hole structures (202) is located, and performing one-time etching on the exposed region on the second copper foil layer (103) to obtain the circuit pattern (40) on the second copper foil layer (103); wherein the dry film (30) covers the whole area formed by the hole disc corresponding to the hole bottom side of all the blind hole structures (20) in the second group of blind hole structures (202).
4. The circuit board manufacturing method according to claim 3, wherein:
conducting material adhesion treatment is performed on the hole walls of the first group of blind hole structures (201) and the second group of blind hole structures (202), and the conducting material adhesion treatment comprises the following steps:
conducting material adhesion treatment is carried out on the whole layer surfaces of the first copper foil layer (102) and the second copper foil layer (103), so that conducting material layers (50) are formed on the hole walls of the first group of blind hole structures (201) and the second group of blind hole structures (202), and further electric interconnection is formed between the first group of blind hole structures (201) and the second group of blind hole structures (202) and the first copper foil layer (102) and the second copper foil layer (103);
the whole layer surface of the first copper foil layer (102) comprises the surface of a circuit pattern (40) on the first copper foil layer (102), the surface of a primary etching area, the hole wall of the blind hole structure (20) and the surface of a hole disc corresponding to the hole opening side of the blind hole structure (20); the whole layer surface of the second copper foil layer (103) comprises the surface of the circuit pattern (40) on the second copper foil layer (103), the surface of the primary etching area and the surface of the hole plate corresponding to the hole bottom side of the blind hole structure (20).
5. The circuit board manufacturing method according to claim 4, wherein:
when electroplating hole filling treatment is carried out in the first group of blind hole structures (201) and the second group of blind hole structures (202), the method further comprises the following steps:
and electroplating thickening treatment is carried out on the area where the hole disc corresponding to the hole side of the first group of blind hole structures (201) is located, the whole area formed by the hole disc corresponding to the hole side of all the blind hole structures (20) in the second group of blind hole structures (202) and the whole area formed by the hole disc corresponding to the hole bottom side of all the blind hole structures (20) in the second group of blind hole structures (202).
6. The circuit board manufacturing method according to claim 4, further comprising:
after the electroplating hole filling treatment is performed in the first group of blind hole structures (201) and the second group of blind hole structures (202), the method further comprises:
and performing a secondary etching treatment on the primary etching areas of the first copper foil layer (102) and the second copper foil layer (103) to etch and remove the conductive material layer (50) attached to the primary etching areas in the conductive material attaching treatment process.
7. The circuit board manufacturing method according to claim 6, wherein:
after the first etching region of the first copper foil layer (102) and the second copper foil layer (103) is subjected to the second etching treatment, the method further comprises:
sequentially laminating a core board (101) and a copper foil layer on any side of the base material (10) after the secondary etching treatment, and treating the whole layer formed by the core board (101) and the copper foil layer according to the circuit board manufacturing method;
and the like until a circuit board with a preset layer number and any layer interconnection is formed.
8. A circuit board manufactured according to the circuit board manufacturing method of any one of claims 1 to 7, characterized by comprising a substrate (10);
the base material (10) comprises a core plate (101) and a first copper foil layer (102) and a second copper foil layer (103) which are respectively coated on two opposite sides of the core plate (101); a blind hole structure (20) is arranged on the base material (10), the blind hole structure (20) penetrates through the thicknesses of the first copper foil layer (102) and the core plate (101) along the direction that the first copper foil layer (102) points to the second copper foil layer (103) and reaches one side, adjacent to the core plate (101), of the second copper foil layer (103), and conductive materials are filled in the blind hole structure (20);
the first copper foil layer (102) and the second copper foil layer (103) are respectively provided with a circuit pattern (40), and the circuit patterns (40) on the first copper foil layer (102) and the second copper foil layer (103) are electrically connected through conductive materials in the blind hole structure (20);
the substrate (10) is provided with a first group of blind hole structures (201) and a second group of blind hole structures (202), electroplating hole filling columns (60) are formed in the first group of blind hole structures (201) and the second group of blind hole structures (202), and the electroplating hole filling columns (60) are used for completely filling the first group of blind hole structures (201) and the second group of blind hole structures (202).
9. The circuit board of claim 8, wherein:
-the first set of blind via structures (201) comprises at least one of the blind via structures (20), the first set of blind via structures (201) being for conducting electricity; the second group of blind hole structures (202) comprises at least two blind hole structures (20), the at least two blind hole structures (20) are arranged in an array, and the second group of blind hole structures (202) are used for conducting heat.
10. The circuit board of claim 9, wherein:
the entire area surface formed by the hole plates corresponding to the hole sides of all the blind hole structures (20) in the second group of blind hole structures (202) and the entire area surface formed by the hole plates corresponding to the hole bottom sides of all the blind hole structures (20) in the second group of blind hole structures (202) are electroplated with an electroplating thickening layer (70), and the electroplating thickening layer (70) has conductivity.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111318306.8A CN114222445B (en) | 2021-11-09 | 2021-11-09 | Circuit board manufacturing method and circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111318306.8A CN114222445B (en) | 2021-11-09 | 2021-11-09 | Circuit board manufacturing method and circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114222445A CN114222445A (en) | 2022-03-22 |
| CN114222445B true CN114222445B (en) | 2023-07-14 |
Family
ID=80696747
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111318306.8A Active CN114222445B (en) | 2021-11-09 | 2021-11-09 | Circuit board manufacturing method and circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114222445B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114867191A (en) * | 2022-05-17 | 2022-08-05 | 高德(江苏)电子科技股份有限公司 | Printed circuit board with double-sided substrate selectively plated with copper block and manufacturing method thereof |
| CN115052411A (en) * | 2022-05-17 | 2022-09-13 | 高德(江苏)电子科技股份有限公司 | Printed circuit board with three-layer core plate selectively plated with copper block and manufacturing method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005236067A (en) * | 2004-02-20 | 2005-09-02 | Dainippon Printing Co Ltd | Wiring substrate, its manufacturing method and semiconductor package |
| CN104270888A (en) * | 2014-09-28 | 2015-01-07 | 广州兴森快捷电路科技有限公司 | High-density package substrate on-hole disk product and preparation method thereof |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4034772B2 (en) * | 2004-09-16 | 2008-01-16 | Ｔｄｋ株式会社 | Multilayer substrate and manufacturing method thereof |
| JP2006179822A (en) * | 2004-12-24 | 2006-07-06 | Cmk Corp | Printed wiring board and its manufacturing method |
| CN101730386B (en) * | 2008-10-20 | 2011-09-07 | 欣兴电子股份有限公司 | Manufacturing method of circuit board fine line |
| CN107801310A (en) * | 2017-11-29 | 2018-03-13 | 瑞声声学科技(苏州)有限公司 | Circuit board manufacturing method and circuit board |
-
2021
- 2021-11-09 CN CN202111318306.8A patent/CN114222445B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005236067A (en) * | 2004-02-20 | 2005-09-02 | Dainippon Printing Co Ltd | Wiring substrate, its manufacturing method and semiconductor package |
| CN104270888A (en) * | 2014-09-28 | 2015-01-07 | 广州兴森快捷电路科技有限公司 | High-density package substrate on-hole disk product and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114222445A (en) | 2022-03-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100733253B1 (en) | High density printed circuit board and manufacturing method thereof | |
| US5915753A (en) | Method of producing a high-density printed wiring board for mounting | |
| EP2424338B1 (en) | Multilayer printed wiring boards with holes requiring copper wrap plate | |
| EP2647267B1 (en) | Method for manufacturing printed circuit board | |
| CN110519912B (en) | PCB manufacturing method with embedded heat conductor and PCB | |
| CN114222445B (en) | Circuit board manufacturing method and circuit board | |
| US5146674A (en) | Manufacturing process of a high density substrate design | |
| KR100957418B1 (en) | Method for maanufacturig pcb and pcb manufactured using the same | |
| CN107249252B (en) | manufacturing method of printed circuit board and printed circuit board | |
| US20090242238A1 (en) | Buried pattern substrate | |
| CN114222434B (en) | Manufacturing method of ladder circuit and circuit board | |
| CN110621123A (en) | Manufacturing method of heat-conducting PCB and PCB | |
| KR100857165B1 (en) | Method for manufacturing circuit board | |
| US7278205B2 (en) | Multilayer printed wiring board and production method therefor | |
| KR100752017B1 (en) | Manufacturing Method of Printed Circuit Board | |
| KR100782404B1 (en) | Printed circuit board and manufacturing method thereof | |
| CN115066112B (en) | Manufacturing method of PCB of high-voltage-resistant planar transformer | |
| CN116156791A (en) | PCB structure with components embedded in core board layer and build-up layer and manufacturing method thereof | |
| CN114885524A (en) | Manufacturing method of dense copper slurry hole circuit board and circuit board | |
| EP2113038B1 (en) | Multilayer printed wiring boards with copper filled through-holes | |
| US20070029109A1 (en) | Multilayer printed wiring board and production method therefor | |
| KR100658972B1 (en) | Pcb and method of manufacturing thereof | |
| CN114521070B (en) | Printed wiring board and preparation method thereof | |
| CN110708864B (en) | Printed circuit board containing heat dissipation medium and preparation method thereof | |
| CN210405831U (en) | Multilayer PCB board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |