CN114222445A - Circuit board manufacturing method and circuit board - Google Patents

Circuit board manufacturing method and circuit board Download PDF

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Publication number
CN114222445A
CN114222445A CN202111318306.8A CN202111318306A CN114222445A CN 114222445 A CN114222445 A CN 114222445A CN 202111318306 A CN202111318306 A CN 202111318306A CN 114222445 A CN114222445 A CN 114222445A
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CN
China
Prior art keywords
copper foil
foil layer
blind hole
structures
group
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Granted
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CN202111318306.8A
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Chinese (zh)
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CN114222445B (en
Inventor
康国庆
王园园
张霞
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Shenzhen Kinwong Electronic Co Ltd
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Shenzhen Kinwong Electronic Co Ltd
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Priority to CN202111318306.8A priority Critical patent/CN114222445B/en
Publication of CN114222445A publication Critical patent/CN114222445A/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/428Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0204Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/064Photoresists
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/421Blind plated via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06Thermal details

Abstract

The application provides a circuit board manufacturing method and a circuit board. The manufacturing method of the circuit board comprises the following steps: preparing a base material, wherein the base material comprises a core plate, a first copper foil layer and a second copper foil layer, and the first copper foil layer and the second copper foil layer are covered on two sides of the core plate; drilling a blind hole structure on the substrate, and enabling the blind hole structure to reach one side, close to the core plate, of the second copper foil layer in the direction that the first copper foil layer points to the second copper foil layer; carrying out one-time pattern transfer on the first copper foil layer and the second copper foil layer and manufacturing a circuit pattern; and carrying out metallization treatment on the blind hole structure, and forming electrical interconnection between the first copper foil layer and the second copper foil layer in the blind hole structure through a conductive material. According to the circuit board manufacturing method, the blind hole structure is subjected to metallization treatment after one-time pattern transfer, the thickness of the copper foil layer is not changed, the uniformity is good, and the manufacturing of a fine and dense circuit pattern is facilitated; the conductive material in the blind hole structure and the copper foil layer are connected to form a copper layer network to replace an embedded copper block in the prior art, and the copper layer network is small in size and high in heat conduction performance.

Description

Circuit board manufacturing method and circuit board
Technical Field
The application belongs to the technical field of circuit board manufacturing, and particularly relates to a circuit board manufacturing method and a circuit board.
Background
With the miniaturization and intelligent development of electronic products, the printed circuit board as a basic component of the electronic product synchronously tends to be refined and diversified. For example, based on high-density interconnection boards, any layer of interconnection boards presented by any layer of interconnection technology is the forefront requirement of the market. Wherein, the interconnection of arbitrary layer all realizes the interconnection between the layer through the laser micropore between every layer of printed circuit board, adopts arbitrary layer interconnection can make every cun space of circuit board all can by make full use of, and wiring density is big, designs more accurately and more nimble.
The size of the printed board is sharply reduced due to high-density integration, and the electronic components are densely attached to the printed board, so that the working temperature of the printed board is continuously increased. For example, the working temperature rise of the traditional printed board is mostly about 70 ℃, while the working temperature rise of the printed board with high density integration or high power can reach about 110 ℃ or even exceed 130 ℃. According to a large number of tests and statistical data, the working temperature of the printed board is the most important factor influencing the service life and the performance of the electronic components. In order to solve the problem, a high-thermal-conductivity printed board material and a high-thermal-conductivity printed board structure are generally adopted in the industry to manufacture a heat conduction/dissipation printed board, and materials with large internal thermal conductivity coefficients of the printed board are utilized to quickly conduct heat to a board surface and then dissipate the heat, such as a metal substrate, an embedded copper board, a thick copper board and the like. However, since the metal plate is thick and heavy, it is not suitable for a thin and small arbitrary layer interconnection plate. The copper block is directly embedded in the printed board, if the size of the copper block is too small, the production and processing efficiency is affected, and if the size of the copper block is too large, the wiring area of the board surface is affected. The thick copper plate can not be used for manufacturing fine lines and has poor heat-conducting property.
Disclosure of Invention
An object of the embodiments of the present application is to provide a circuit board manufacturing method and a circuit board, so as to solve the technical problems that a heat-conductive circuit board product in the prior art has a large size and poor heat-conductive performance, and a fine circuit pattern cannot be manufactured.
In order to achieve the purpose, the technical scheme adopted by the application is as follows: the circuit board manufacturing method comprises the following steps:
preparing a base material, wherein the base material comprises a core plate and a first copper foil layer and a second copper foil layer which are respectively covered on two opposite sides of the core plate;
drilling at least one blind hole structure on the base material, and enabling the blind hole structure to reach one side, close to the core board, of the second copper foil layer in the direction that the first copper foil layer points to the second copper foil layer;
carrying out one-time pattern transfer on the first copper foil layer and the second copper foil layer and manufacturing a circuit pattern;
and carrying out metallization treatment on the blind hole structure, and forming electrical interconnection between the first copper foil layer and the second copper foil layer in the blind hole structure through a conductive material.
In one embodiment, drilling at least one blind via structure on the substrate comprises:
drilling a first group of blind hole structures and a second group of blind hole structures on the substrate along the direction of the first copper foil layer pointing to the second copper foil layer;
wherein the first set of blind via structures comprises at least one of the blind via structures, the first set of blind via structures for conducting electricity; the second group of blind hole structures comprise at least two blind hole structures which are arranged in an array, and the second group of blind hole structures are used for heat conduction.
In one embodiment, the one-time pattern transfer includes dry film pasting, exposure and development;
performing a pattern transfer on the first copper foil layer and the second copper foil layer and manufacturing a circuit pattern, including:
pasting a dry film on the first copper foil layer, enabling the dry film to cover a preset circuit pattern on the first copper foil layer, an area where a hole disc corresponding to the hole opening side of the first group of blind hole structures is located, and an area where a hole disc corresponding to the hole opening side of the second group of blind hole structures is located, and then etching the exposed area on the first copper foil layer for one time to obtain a circuit pattern on the first copper foil layer; the dry film covers the whole area formed by the hole discs corresponding to the hole opening sides of all the blind hole structures in the second group of blind hole structures;
attaching a dry film on the second copper foil layer, enabling the dry film to cover a preset circuit pattern on the second copper foil layer, an area where a hole disc corresponding to the hole bottom side of the first group of blind hole structures is located, and an area where a hole disc corresponding to the hole bottom side of the second group of blind hole structures is located, and etching the exposed area on the second copper foil layer for the first time to obtain a circuit pattern on the second copper foil layer; and the dry film covers the whole area formed by the hole discs corresponding to the hole bottom sides of all the blind hole structures in the second group of blind hole structures.
In one embodiment, the metallization process for the blind via structure includes:
conducting material attaching treatment on the hole walls of the first group of blind hole structures and the second group of blind hole structures;
and carrying out electroplating hole filling treatment in the first group of blind hole structures and the second group of blind hole structures.
In one embodiment, the performing a conductive material attaching process on the walls of the first set of blind via structures and the second set of blind via structures includes:
conducting material adhesion treatment is carried out on the whole surface of the first copper foil layer and the whole surface of the second copper foil layer, so that conducting material layers are formed on the hole walls of the first group of blind hole structures and the second group of blind hole structures, and further the first group of blind hole structures and the second group of blind hole structures are electrically interconnected with the first copper foil layer and the second copper foil layer;
the whole surface of the first copper foil layer comprises the surface of a circuit pattern on the first copper foil layer, the surface of a primary etching area, the hole wall of the blind hole structure and the surface of a hole disc corresponding to the hole opening side of the blind hole structure; the whole surface of the second copper foil layer comprises the surface of a circuit pattern on the second copper foil layer, the surface of a primary etching area and the surface of a hole disc corresponding to the bottom side of the blind hole structure.
In one embodiment, after the conductive material attaching process is performed on the hole walls of the first and second sets of blind via structures and before the electroplating hole filling process is performed in the first and second sets of blind via structures, the method further includes performing a secondary pattern transfer on the first and second copper foil layers, where the secondary pattern transfer includes dry film pasting, exposure, and developing processes:
performing a secondary pattern transfer on the first copper foil layer and the second copper foil layer, comprising:
pasting a dry film on the first copper foil layer, enabling the dry film to cover the circuit pattern and the etching area on the first copper foil layer, and exposing the area where the first group of blind hole structures and the hole discs corresponding to the hole sides of the first group of blind hole structures are located, and the area where the second group of blind hole structures and the hole discs corresponding to the hole sides of the second group of blind hole structures are located; wherein the dry film exposes an integral area formed by the hole discs corresponding to the orifice sides of all the blind hole structures in the second group of blind hole structures;
pasting a dry film on the second copper foil layer, and enabling the dry film to cover the circuit pattern and the etching area on the second copper foil layer, the area where the hole disc corresponding to the hole bottom side of the first group of blind hole structures is located, and exposing the area where the hole disc corresponding to the hole bottom side of the second group of blind hole structures is located; and exposing the whole area formed by the hole discs corresponding to the hole bottom sides of all the blind hole structures in the second group of blind hole structures by the dry film.
In one embodiment, when filling the hole by electroplating in the first set of blind via structures and the second set of blind via structures, the method further includes:
electroplating thickening treatment is carried out on the area where the hole discs corresponding to the orifice sides of the first group of blind hole structures are located, the whole area formed by the hole discs corresponding to the orifice sides of the blind hole structures in the second group of blind hole structures, and the whole area formed by the hole discs corresponding to the hole bottom sides of the blind hole structures in the second group of blind hole structures.
In one embodiment, after the electroplating via filling process is performed in the first set of blind via structures and the second set of blind via structures, the method further includes:
and carrying out secondary etching treatment on the primary etching areas of the first copper foil layer and the second copper foil layer so as to etch and remove the conductive material layer attached to the primary etching areas in the conductive material attaching treatment process.
In one embodiment, after performing the second etching process on the first etched region of the first copper foil layer and the second copper foil layer, the method further includes:
sequentially laminating a core plate and a copper foil layer on any side of the base material subjected to the secondary etching treatment, and treating the whole layer formed by the core plate and the copper foil layer according to the circuit board manufacturing method;
and repeating the steps until a circuit board with a preset number of layers and any layers of interconnection is formed.
Compared with the prior art, the circuit board manufacturing method provided by the application has the beneficial effects that:
firstly, pattern transfer is carried out on a first copper foil layer and a second copper foil layer, circuit patterns are manufactured, then metallization processing is carried out on a blind hole structure, and the first copper foil layer and the second copper foil layer are electrically interconnected through a conductive material in the blind hole structure; therefore, when the circuit pattern is formed by one-time pattern transfer, the thickness of the copper foil layer is not changed, the surface uniformity is good, the etching factor can be well controlled by direct etching, and the preparation of a fine circuit pattern is facilitated;
and secondly, drilling at least one blind hole structure on the substrate, carrying out metallization treatment on the blind hole structure, forming electrical interconnection between the first copper foil layer and the second copper foil layer in the blind hole structure through a conductive material, and connecting the conductive material in the blind hole structure and the copper foil layer into a copper layer network to replace an embedded copper block in the prior art, so that the purposes of small size and high heat conductivity are achieved.
Another objective of the present application is to provide a circuit board manufactured by the above method, wherein the circuit board includes a substrate;
the base material comprises a core plate, a first copper foil layer and a second copper foil layer, wherein the first copper foil layer and the second copper foil layer are respectively covered on two opposite sides of the core plate; the substrate is provided with a blind hole structure, the blind hole structure penetrates through the thicknesses of the first copper foil layer and the core plate and reaches one side, close to the core plate, of the second copper foil layer along the direction that the first copper foil layer points to the second copper foil layer, and the blind hole structure is filled with a conductive material;
and the first copper foil layer and the second copper foil layer are both provided with circuit patterns, and the circuit patterns on the first copper foil layer and the second copper foil layer are electrically interconnected through the conductive material in the blind hole structure.
In one embodiment, the substrate is provided with a first group of blind hole structures and a second group of blind hole structures;
wherein the first set of blind via structures comprises at least one of the blind via structures, the first set of blind via structures for conducting electricity; the second group of blind hole structures comprise at least two blind hole structures which are arranged in an array, and the second group of blind hole structures are used for heat conduction.
In one embodiment, the surface of the entire region formed by the hole plate corresponding to the aperture side of all the blind via structures in the second set of blind via structures and the surface of the entire region formed by the hole plate corresponding to the hole bottom side of all the blind via structures in the second set of blind via structures are plated with a plating thickening layer, and the plating thickening layer has conductivity.
Compared with the beneficial effects of the prior art, the circuit board provided by the application has the beneficial effects compared with the prior art, and the manufacturing method of the circuit board provided by the application has no need of repeated description.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a flowchart of a circuit board manufacturing method according to an embodiment of the present disclosure;
fig. 2 is a flowchart of step 103 of a circuit board manufacturing method according to an embodiment of the present application;
fig. 3 is a flowchart of step 104 of a circuit board manufacturing method according to an embodiment of the present application;
fig. 4 is a flowchart of step 104 of a circuit board manufacturing method according to an embodiment of the present application;
FIG. 5 is a schematic view of a substrate provided in an embodiment of the present application;
FIG. 6 is a schematic diagram of a substrate having a blind via structure after drilling according to an embodiment of the present disclosure;
FIG. 7 is a schematic view of a substrate with a dry film attached thereto in a pattern transfer process according to an embodiment of the present disclosure;
FIG. 8 is a schematic view of a substrate after one etching according to an embodiment of the present disclosure;
fig. 9 is a schematic view of a substrate with a circuit pattern formed thereon after removing a dry film attached to a pattern transfer according to an embodiment of the present disclosure;
FIG. 10 is a schematic view of a substrate with a conductive material layer attached in a blind via structure according to an embodiment of the present disclosure;
FIG. 11 is a schematic view of a substrate with a dry film attached during a second pattern transfer according to an embodiment of the present disclosure;
FIG. 12 is a schematic view of a substrate having a plating thickening layer after a plating thickening process according to an embodiment of the present application;
FIG. 13 is a schematic view of a substrate after removal of a dry film attached by a secondary pattern transfer according to an embodiment of the present application;
FIG. 14 is a schematic view of a substrate after rapid etching according to an embodiment of the present disclosure;
fig. 15 is a schematic view of a circuit board having a multi-layer substrate according to an embodiment of the present disclosure.
Wherein, in the figures, the respective reference numerals:
10. a substrate; 101. a core board; 102. a first copper foil layer; 103. a second copper foil layer; 20. a blind hole structure; 201. a first set of blind via structures; 202. a second set of blind via structures; 30. drying the film; 40. a circuit pattern; 50. a layer of conductive material; 60. electroplating the filled hole column; 70. electroplating the thickening layer.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, as used herein, refer to an orientation or positional relationship indicated in the drawings that is solely for the purpose of facilitating the description and simplifying the description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be considered as limiting the present application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
A circuit board manufacturing method and a circuit board provided in the embodiments of the present application will now be described.
Referring to fig. 1 to 15, a method for manufacturing a circuit board according to an embodiment of the present disclosure sequentially includes the following steps 101 to 107. Each step involved in the manufacturing method will be described in detail below with reference to the flowcharts of fig. 1 to 4 and the block diagrams of fig. 5 to 15.
Step 101, preparing the base material 10: the substrate 10 includes a core board 101, and a first copper foil layer 102 and a second copper foil layer 103 respectively disposed on opposite sides of the core board 101. The substrate 10 is shown in fig. 5.
The core board 101 is designed to be copper-clad on both sides thereof to form a first copper foil layer 102 and a second copper foil layer 103 disposed on opposite sides of the core board 101, and the thickness of the copper foil of the first copper foil layer 102 and the second copper foil layer 103 is equal to the predetermined thickness of the circuit pattern 40 described below.
Step 102, drilling: at least one blind via structure 20 is drilled on the substrate 10, and the blind via structure 20 reaches a side of the second copper foil layer 103 adjacent to the core board 101 in a direction in which the first copper foil layer 102 points to the second copper foil layer 103. The substrate 10 after drilling is shown in fig. 6.
Wherein, in the direction of the first copper foil layer 102 pointing to the second copper foil layer 103, the aperture of all the blind hole structures 20 is gradually reduced. In this embodiment, the blind via structure 20 is preferably drilled on the substrate 10 by laser ablation.
Wherein, drilling at least one blind hole structure 20 on the substrate 10 comprises:
drilling a first group of blind hole structures 201 and a second group of blind hole structures 202 on the substrate 10 along the direction of the first copper foil layer 102 pointing to the second copper foil layer 103; the first group of blind hole structures 201 comprise at least one blind hole structure 20, and the first group of blind hole structures 201 are used for communicating circuits of all layers to realize electric conduction; the second set of blind via structures 202 includes at least two blind via structures 20, the at least two blind via structures 20 are arranged in an array, and the second set of blind via structures 202 is used for heat conduction.
In this embodiment, the number of the blind via structures 20 in the first group of blind via structures 201 is determined according to actual requirements. In the present embodiment, the second set of blind via structures 202 is a set of blind via structures 20, that is, the second set of blind via structures 202 is composed of at least two or more blind via structures 20. The plurality of blind via structures 20 in the second set of blind via structures 202 are arranged in a rectangular or square array on the same layer of substrate 10. Alternatively, one of the blind via structures 20 in the second group of blind via structures 202 is taken as a center, and the other blind via structures 20 are uniformly distributed on the same circumference taking the center as the center.
In this embodiment, the aperture of the blind via structure 20 may be consistent with the maximum aperture of a conventional blind via on an existing circuit board, and after the following metallization process is performed in the blind via structure 20, the blind via structure 20 is filled with copper pillars, which is beneficial to heat dissipation. Of course, the area size of the second set of blind via structures 202 can be designed according to the size of the thermal conductive area required by the circuit board, for example, the aperture of the blind via structure 20 can be adjusted to be small.
Step 103, primary graph transfer: a pattern transfer is performed once on the first copper foil layer 102 and the second copper foil layer 103 and the wiring pattern 40 is produced.
The one-time pattern transfer may be understood as a first pattern transfer including dry film 30 attaching, exposing, and developing processes. The substrate 10 with the dry film attached thereto in one pattern transfer is shown in fig. 7. Specifically, as shown in fig. 2, the pattern transfer and the circuit pattern 40 are performed once on the first copper foil layer 102 and the second copper foil layer 103, and the method includes:
step 1031, attaching a dry film 30 on the first copper foil layer 102, covering the dry film 30 on the preset circuit pattern 40 on the first copper foil layer 102, the area where the hole disc corresponding to the hole opening side of the first group of blind hole structures 201 is located, and the area where the hole disc corresponding to the hole opening side of the second group of blind hole structures 202 is located, and performing primary etching on the exposed area on the first copper foil layer 102 to obtain the circuit pattern 40 on the first copper foil layer 102; wherein the dry film 30 covers the whole area formed by the corresponding hole discs of the aperture sides of all the blind via structures 20 in the second set of blind via structures 202.
Step 1032, attaching a dry film 30 to the second copper foil layer 103, covering the dry film 30 on the second copper foil layer 103 with the preset circuit pattern 40, the area where the hole tray corresponding to the hole bottom side of the first group of blind hole structures 201 is located, and the area where the hole tray corresponding to the hole bottom side of the second group of blind hole structures 202 is located, and performing primary etching on the exposed area on the second copper foil layer 103 to obtain the circuit pattern 40 on the second copper foil layer 103; the dry film 30 covers the entire area formed by the corresponding hole discs at the bottom sides of all the blind hole structures 20 in the second group of blind hole structures 202. Fig. 8 shows the substrate 10 after the first etching.
After the exposed area on the first copper foil layer 102 is etched once to obtain the circuit pattern 40 on the first copper foil layer 102, the remaining dry film 30 on the first copper foil layer 102 is removed; after the circuit pattern 40 on the second copper foil layer 103 is obtained by performing one etching on the exposed area on the second copper foil layer 103, the remaining dry film 30 on the second copper foil layer 103 is removed. The substrate with the circuit pattern formed thereon after removing the dry film attached to the pattern transfer is shown in fig. 9.
Wherein, the steps 1031 and 1032 are performed synchronously.
The pore discs corresponding to the second group of blind hole structures 202 are an integral body, and the pore discs of any two adjacent blind hole structures 20 are connected through the copper foil layer without a gap, so that the pore discs corresponding to the second group of blind hole structures 202 are considered to be in the same network and are electrically connected.
Step 104, metallization treatment: the blind via structure 20 is metallized, and an electrical interconnection is formed between the first copper foil layer 102 and the second copper foil layer 103 in the blind via structure 20 through a conductive material.
Specifically, as shown in fig. 3, the blind via structure 20 is metallized, including steps 1041 and 1042 described below.
Step 1041, conductive material adhesion treatment: a conductive material adhesion process is performed on the walls of the first set of blind via structures 201 and the second set of blind via structures 202.
A dense conductive material layer 50 is formed on the walls of the blind via structure 20, for example, by using a electroless copper plating method, a black via process, or a graphene process. In this embodiment, a chemical copper deposition method is preferably adopted, and a dense thin copper layer is formed on the hole wall of the blind via structure 20, so that the board surface copper foil layer and the thin copper layer are electrically connected, thereby facilitating the subsequent copper plating operation.
More specifically, the conductive material attaching process is performed on the hole walls of the first group of blind hole structures 201 and the second group of blind hole structures 202, and includes:
the conductive material is attached to the entire surfaces of the first copper foil layer 102 and the second copper foil layer 103, so that the conductive material layer 50 is formed on the hole walls of the first group of blind hole structures 201 and the second group of blind hole structures 202, and the first copper foil layer 102 and the second copper foil layer 103 are electrically interconnected.
Wherein, the whole surface of the first copper foil layer 102 includes the surface of the circuit pattern 40 on the first copper foil layer 102, the surface of the primary etching region, the hole wall of the blind hole structure 20 and the surface of the hole disc corresponding to the hole opening side of the blind hole structure 20; the entire surface of the second copper foil layer 103 includes the surface of the circuit pattern 40 on the second copper foil layer 103, the surface of the primary etching region, and the surface of the hole tray corresponding to the hole bottom side of the blind via structure 20. The substrate with the conductive material layer attached in the blind via structure is shown in fig. 10.
In this embodiment, since electroless copper plating is performed on the entire board, thin copper is deposited also on the circuit pattern 40 portion on the board surface and the substrate 10 portion exposed after etching, but the copper layer thickness by electroless copper plating is thin and hardly affects the shape of the circuit pattern 40.
Step 1042, electroplating hole filling treatment: electroplating via filling is performed in the first set of blind via structures 201 and the second set of blind via structures 202 to form electroplated via filling pillars 60. The substrate 10 after hole filling by plating is shown in fig. 12.
Step 105, secondary pattern transfer: secondary pattern transfer is performed on the first copper foil layer 102 and the second copper foil layer 103.
In the embodiment of the present application, after the step 1041 (conductive material attaching process) and before the step 1042 (plating via filling process), a step 105 (secondary pattern transfer) is further included.
The second pattern transfer may be a second pattern transfer including the steps of attaching the dry film 30, exposing, and developing. Specifically, as shown in fig. 4, the secondary pattern transfer is performed on the first copper foil layer 102 and the second copper foil layer 103, including the steps 1051 and 1052 described below.
Step 1051, attaching a dry film 30 on the first copper foil layer 102, and enabling the dry film 30 to cover the circuit pattern 40 and the etched area on the first copper foil layer 102, while exposing the first group of blind hole structures 201 and the area where the hole disc corresponding to the hole side of the first group of blind hole structures 201 is located, and the second group of blind hole structures 202 and the area where the hole disc corresponding to the hole side of the second group of blind hole structures 202 is located; wherein, the dry film 30 exposes the whole area formed by the hole discs corresponding to the orifice sides of all the blind hole structures 20 in the second group of blind hole structures 202;
step 1052, attaching a dry film 30 on the second copper foil layer 103, and enabling the dry film 30 to cover the circuit pattern 40 and the etching area on the second copper foil layer 103, and the area where the hole disc corresponding to the hole bottom side of the first group of blind hole structures 201 is located, and to expose the area where the hole disc corresponding to the hole bottom side of the second group of blind hole structures 202 is located; the dry film 30 exposes the entire area formed by the corresponding hole discs at the bottom sides of all the blind hole structures 20 in the second group of blind hole structures 202. The substrate 10 with the dry film 30 attached thereto in the secondary pattern transfer is shown in fig. 11.
Wherein the above steps 1051 and 1052 are performed synchronously.
Preferably, the thickness of the dry film 30 used in the above-mentioned pattern transfer on the first copper foil layer 102 and the second copper foil layer 103 and the fabrication of the circuit pattern 40 is smaller than the thickness of the dry film 30 used in the above-mentioned metallization process of the blind via structure 20. The thickness of the dry film 30 used for secondary pattern transfer is larger than that of the dry film 30 used for primary pattern transfer, the thin dry film 30 is used for primary pattern transfer, the resolution is better, and the manufacturing of a fine circuit is facilitated. When the thick dry film 30 is used for the secondary pattern transfer, film clamping during the formation of a thick copper circuit by electroplating can be avoided, so as to avoid influencing etching quality. Because the circuit pattern 40 is already on the board surface during the secondary pattern transfer, a step is formed between the circuit pattern 40 and the substrate 10 surface, and a vacuum laminator is needed for better laminating the dry film 30 and the copper foil layer.
Wherein, the step 1042 further comprises the following electroplating thickening process, which is performed synchronously with the electroplating hole filling process, wherein:
electroplating thickening treatment: electroplating thickening processing is performed on the region where the hole plate corresponding to the hole side of the first group of blind hole structures 201 is located, the whole region formed by the hole plates corresponding to the hole sides of all the blind hole structures 20 in the second group of blind hole structures 202, and the whole region formed by the hole plates corresponding to the hole bottoms of all the blind hole structures 20 in the second group of blind hole structures 202, so as to form the electroplating thickening layer 70. The substrate 10 with the electroplated thickening layer 70 after the electroplating thickening process is shown in fig. 12.
In this way, core board 101 after development is subjected to a plating via filling process, blind via structures 20 on core board 101 are filled with copper plating, and via portions not covered with dry film 30 are thickened. The electroplating filling hole is preferably processed by VCP electroplating equipment.
After the step 1042 is completed, the method further includes:
step 106, fast etching: a secondary etching process is performed on the primary etched regions of the first and second copper foil layers 102 and 103 to etch away the conductive material layer 50 attached in the primary etched regions during the conductive material attaching process. The substrate 10 after the rapid etching is shown in fig. 14.
During the electroplating hole filling treatment, the thickness of the blind hole structure 20 and the copper foil layer corresponding to the hole opening side is only electroplated and thickened, the other circuit pattern 40 parts and the part of the base material 10 deposited with thin copper are covered by the dry film 30, and the thickness of the copper layer is not changed. Therefore, after removing the dry film attached by the secondary pattern transfer, only the thin copper deposited on the plate surface needs to be etched and removed in the rapid etching step. The rapid etching is also called differential etching or flash etching, and the base copper, namely the chemically deposited thin copper in the embodiment, is etched and removed in a shorter time by controlling the etching time. After etching, a preset pattern circuit and a blind hole filled with electroplating holes are formed on the board surface. The substrate 10 after removing the second pattern transfer of the attached dry film 30 is shown in fig. 13.
After the second etching process is performed on the first etched area of the first copper foil layer 102 and the second copper foil layer 103, the method further includes:
step 107, interconnection manufacturing of any layer: laminating a core board 101 and a copper foil layer in sequence on any side of the substrate 10 subjected to the secondary etching treatment, and treating the whole layer formed by the core board 101 and the copper foil layer according to a circuit board manufacturing method; and repeating the steps until a circuit board with a preset number of layers and any layers of interconnection is formed. Among them, a circuit board having the multilayer substrate 10 is shown in fig. 15.
Core board 101 (preferably prepreg) and thin copper foil are laminated on both sides of core board 101 after the rapid etching, respectively, to form 4-layered boards, and the above-described manufacturing method is repeated. And if the number of layers needs to be further increased, pressing the prepreg and the thin copper foil again, and so on until any layer of interconnection plate with the preset number of layers is formed.
In the drilling step, it should be noted that the conventional blind via can be drilled normally, and the set of the second group of blind via structures 202 for heat conduction needs to be arranged in one-to-one correspondence with the set of the drilled second group of blind via structures 202 in the vertical direction, so as to finally form the set of the metallized blind via structures 20 penetrating through the board surface.
In the steps of secondary pattern transfer and electroplating hole filling, because the bottom side of the drilled blind hole structure 20 is pressed after lamination, the blind hole structure belongs to an inner layer circuit, electroplating thickening can not be carried out, and the problem of dry film 30 coverage does not need to be considered. It is understood that the blind via structures 20 for heat conduction may be disposed at a plurality of locations within the board, and the number and arrangement of the blind via structures 20 for heat conduction may be the same or may be different from one another.
Compared with the prior art, the circuit board manufacturing method provided by the embodiment of the application has the beneficial effects that:
firstly, the circuit board manufacturing method provided by the application comprises the steps of firstly carrying out pattern transfer on a first copper foil layer 102 and a second copper foil layer 103 and manufacturing a circuit pattern 40, then carrying out metallization processing on a blind hole structure 20, and forming electrical interconnection between the first copper foil layer 102 and the second copper foil layer 103 in the blind hole structure 20 through a conductive material; thus, when the circuit pattern 40 is formed by one pattern transfer, the thickness of the copper foil layer is not changed, the surface uniformity is good, the etching factor can be well controlled by direct etching, and the circuit pattern 40 with fine density can be conveniently manufactured.
Secondly, at least one blind hole structure 20 is drilled on the substrate 10, the blind hole structure 20 is subjected to metallization treatment, the first copper foil layer 102 and the second copper foil layer 103 are electrically interconnected in the blind hole structure 20 through a conductive material, the conductive material and the copper foil layer in the blind hole structure 20 are connected to form a copper layer network, and an embedded copper block in the prior art is replaced, so that the purposes of small size and high heat conductivity are achieved.
And thirdly, the electroplating filling of the blind hole structure 20 is changed from whole-plate electroplating to local electroplating, the whole-plate copper plating and copper reduction are not needed to manufacture a fine circuit, metal resources are saved, an ultrathin copper foil is not needed to be used, and the total production cost is saved.
And fourthly, in the rapid etching step, the thickness of the base copper to be etched is only the chemically deposited copper layer, the etching time is short, the lateral etching amount of the circuit can be accurately controlled, and the etching precision is higher.
Another objective of the present application is to provide a circuit board manufactured by the above method, which includes a substrate 10; the substrate 10 comprises a core board 101, and a first copper foil layer 102 and a second copper foil layer 103 which are respectively covered on two opposite sides of the core board 101; the substrate 10 is provided with a blind hole structure 20, the blind hole structure 20 penetrates through the thicknesses of the first copper foil layer 102 and the core board 101 and reaches one side of the second copper foil layer 103 close to the core board 101 along the direction that the first copper foil layer 102 points to the second copper foil layer 103, and the blind hole structure 20 is filled with a conductive material; the first copper foil layer 102 and the second copper foil layer 103 are both provided with circuit patterns 40, and the circuit patterns 40 on the first copper foil layer 102 and the second copper foil layer 103 are electrically interconnected through the conductive material in the blind via structure 20.
In one embodiment, the substrate 10 is provided with a first set of blind via structures 201 and a second set of blind via structures 202;
wherein the first set of blind via structures 201 includes at least one blind via structure 20, and the first set of blind via structures 201 is used for conducting electricity; the second set of blind via structures 202 includes at least two blind via structures 20, the at least two blind via structures 20 are arranged in an array, and the second set of blind via structures 202 is used for heat conduction.
In one embodiment, the surface of the entire area formed by the corresponding aperture plate on the aperture side of all the blind via structures 20 in the second set of blind via structures 202 and the surface of the entire area formed by the corresponding aperture plate on the bottom side of all the blind via structures 20 in the second set of blind via structures 202 are plated with the plating thickening layer 70, and the plating thickening layer 70 has conductivity.
In one embodiment, the surface of the area corresponding to the hole plate on the aperture side of the first set of blind via structures 201 is plated with the plating thickening layer 70, and the plating thickening layer 70 has conductivity.
Compared with the beneficial effects of the prior art, the circuit board provided by the application has the beneficial effects compared with the prior art, and the manufacturing method of the circuit board provided by the application has no need of repeated description.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims (12)

1. A circuit board manufacturing method is characterized by comprising the following steps:
preparing a base material (10), wherein the base material (10) comprises a core plate (101) and a first copper foil layer (102) and a second copper foil layer (103) which are respectively covered on two opposite sides of the core plate (101);
drilling at least one blind hole structure (20) on the base material (10), and enabling the blind hole structure (20) to reach the side, close to the core plate (101), of the second copper foil layer (103) in the direction that the first copper foil layer (102) points to the second copper foil layer (103);
performing one-time pattern transfer on the first copper foil layer (102) and the second copper foil layer (103) and manufacturing a circuit pattern (40);
and carrying out metallization treatment on the blind hole structure (20), and forming electrical interconnection between the first copper foil layer (102) and the second copper foil layer (103) in the blind hole structure (20) through a conductive material.
2. The method of manufacturing a circuit board according to claim 1, wherein:
drilling at least one blind hole structure (20) on the substrate (10), comprising:
drilling a first group of blind hole structures (201) and a second group of blind hole structures (202) on the substrate (10) along the direction of the first copper foil layer (102) pointing to the second copper foil layer (103);
wherein the first set of blind via structures (201) comprises at least one of the blind via structures (20), the first set of blind via structures (201) being for conducting electricity; the second group of blind hole structures (202) comprises at least two blind hole structures (20), the at least two blind hole structures (20) are arranged in an array, and the second group of blind hole structures (202) are used for conducting heat.
3. The method for manufacturing a circuit board according to claim 2, wherein:
the primary pattern transfer comprises the steps of dry film (30) pasting, exposure and development;
performing a pattern transfer on the first copper foil layer (102) and the second copper foil layer (103) and fabricating a wiring pattern (40), comprising:
pasting a dry film (30) on the first copper foil layer (102), enabling the dry film (30) to cover a preset circuit pattern (40) on the first copper foil layer (102), an area where a hole disc corresponding to the hole opening side of the first group of blind hole structures (201) is located, and an area where a hole disc corresponding to the hole opening side of the second group of blind hole structures (202) is located, and etching the exposed area on the first copper foil layer (102) for one time to obtain the circuit pattern (40) on the first copper foil layer (102); wherein the dry film (30) covers the whole area formed by the hole discs corresponding to the hole opening sides of all the blind hole structures (20) in the second group of blind hole structures (202);
pasting a dry film (30) on the second copper foil layer (103), enabling the dry film (30) to cover a preset circuit pattern (40) on the second copper foil layer (103), an area where a hole disc corresponding to the hole bottom side of the first group of blind hole structures (201) is located, and an area where a hole disc corresponding to the hole bottom side of the second group of blind hole structures (202) is located, and etching the exposed area on the second copper foil layer (103) for one time to obtain the circuit pattern (40) on the second copper foil layer (103); wherein the dry film (30) covers the whole area formed by the hole discs corresponding to the hole bottom sides of all the blind hole structures (20) in the second group of blind hole structures (202).
4. The method for manufacturing a circuit board according to claim 3, wherein:
-metallizing the blind via structure (20), comprising:
conducting conductive material attaching treatment on the hole walls of the first set of blind hole structures (201) and the second set of blind hole structures (202);
electroplating a via filling process in the first set of blind via structures (201) and the second set of blind via structures (202).
5. The method for manufacturing a circuit board according to claim 4, wherein:
performing an adhesion process of a conductive material on the walls of the first set of blind via structures (201) and the second set of blind via structures (202), comprising:
conducting conductive material adhesion treatment on the whole surface of the first copper foil layer (102) and the second copper foil layer (103) so as to form a conductive material layer (50) on the hole walls of the first group of blind hole structures (201) and the second group of blind hole structures (202), and further form electrical interconnection between the first group of blind hole structures (201) and the second group of blind hole structures (202) and the first copper foil layer (102) and the second copper foil layer (103);
wherein the whole surface of the first copper foil layer (102) comprises the surface of the circuit pattern (40) on the first copper foil layer (102), the surface of the primary etching area, the hole wall of the blind hole structure (20) and the surface of the hole disc corresponding to the hole opening side of the blind hole structure (20); the whole surface of the second copper foil layer (103) comprises the surface of a circuit pattern (40) on the second copper foil layer (103), the surface of a primary etching area and the surface of a hole disc corresponding to the bottom side of the blind hole structure (20).
6. The method for manufacturing a circuit board according to claim 5, wherein:
after the conductive material attaching process is performed on the hole walls of the first set of blind hole structures (201) and the second set of blind hole structures (202), and before the electroplating hole filling process is performed on the first set of blind hole structures (201) and the second set of blind hole structures (202), performing a secondary pattern transfer on the first copper foil layer (102) and the second copper foil layer (103), wherein the secondary pattern transfer comprises a dry film (30) pasting process, an exposure process and a developing process:
performing a secondary pattern transfer on the first copper foil layer (102) and the second copper foil layer (103) comprising:
pasting a dry film (30) on the first copper foil layer (102), and enabling the dry film (30) to cover the circuit pattern (40) and the etching area on the first copper foil layer (102), and exposing the area where the first group of blind hole structures (201) and the hole discs corresponding to the hole sides of the first group of blind hole structures are located, and the area where the second group of blind hole structures (202) and the hole discs corresponding to the hole sides of the second group of blind hole structures are located; wherein the dry film (30) exposes an integral area formed by the hole discs corresponding to the orifice sides of all the blind hole structures (20) in the second group of blind hole structures (202);
pasting a dry film (30) on the second copper foil layer (103), and enabling the dry film (30) to cover the circuit pattern (40) and the etching area on the second copper foil layer (103), and the area where the hole disc corresponding to the hole bottom side of the first group of blind hole structures (201) is located, and exposing the area where the hole disc corresponding to the hole bottom side of the second group of blind hole structures (202) is located; wherein the dry film (30) exposes the whole area formed by the hole discs corresponding to the hole bottom sides of all the blind hole structures (20) in the second group of blind hole structures (202).
7. The method for manufacturing a circuit board according to claim 6, wherein:
when the electroplating hole filling treatment is carried out in the first group of blind hole structures (201) and the second group of blind hole structures (202), the method further comprises the following steps:
electroplating thickening treatment is carried out in the area where the hole discs corresponding to the orifice sides of the first group of blind hole structures (201) are located, the whole area formed by the hole discs corresponding to the orifice sides of the blind hole structures (20) in the second group of blind hole structures (202), and the whole area formed by the hole discs corresponding to the hole bottom sides of the blind hole structures (20) in the second group of blind hole structures (202).
8. The method of manufacturing a circuit board according to claim 6, further comprising:
after the electroplating hole filling treatment is carried out in the first set of blind hole structures (201) and the second set of blind hole structures (202), the method further comprises the following steps:
and carrying out secondary etching treatment on the primary etching areas of the first copper foil layer (102) and the second copper foil layer (103) so as to etch and remove the conductive material layer (50) attached to the primary etching areas in the conductive material attaching treatment process.
9. The method of manufacturing a circuit board according to claim 8, wherein:
after the second etching treatment is performed on the first etched area of the first copper foil layer (102) and the second copper foil layer (103), the method further comprises the following steps:
sequentially laminating a core board (101) and a copper foil layer on any side of the base material (10) subjected to the secondary etching treatment, and treating the whole layer formed by the core board (101) and the copper foil layer according to the circuit board manufacturing method;
and repeating the steps until a circuit board with a preset number of layers and any layers of interconnection is formed.
10. A circuit board manufactured by the circuit board manufacturing method according to any one of claims 1 to 9, comprising a base material (10);
the base material (10) comprises a core plate (101), and a first copper foil layer (102) and a second copper foil layer (103) which are respectively covered on two opposite sides of the core plate (101); a blind hole structure (20) is arranged on the base material (10), the blind hole structure (20) penetrates through the thicknesses of the first copper foil layer (102) and the core board (101) and reaches one side, close to the core board (101), of the second copper foil layer (103) along the direction that the first copper foil layer (102) points to the second copper foil layer (103), and a conductive material is filled in the blind hole structure (20);
and the first copper foil layer (102) and the second copper foil layer (103) are both provided with circuit patterns (40), and the circuit patterns (40) on the first copper foil layer (102) and the second copper foil layer (103) are electrically interconnected through the conductive material in the blind hole structure (20).
11. The circuit board of claim 10, wherein:
a first group of blind hole structures (201) and a second group of blind hole structures (202) are arranged on the base material (10);
wherein the first set of blind via structures (201) comprises at least one of the blind via structures (20), the first set of blind via structures (201) being for conducting electricity; the second group of blind hole structures (202) comprises at least two blind hole structures (20), the at least two blind hole structures (20) are arranged in an array, and the second group of blind hole structures (202) are used for conducting heat.
12. The circuit board of claim 11, wherein:
the surface of the entire region formed by the hole discs corresponding to the orifice sides of all the blind hole structures (20) in the second group of blind hole structures (202) and the surface of the entire region formed by the hole discs corresponding to the hole bottom sides of all the blind hole structures (20) in the second group of blind hole structures (202) are electroplated with an electroplating thickening layer (70), and the electroplating thickening layer (70) has conductivity.
CN202111318306.8A 2021-11-09 2021-11-09 Circuit board manufacturing method and circuit board Active CN114222445B (en)

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