JP3496273B2 - Multilayer wiring board, semiconductor device using the same, and method of manufacturing multilayer wiring board - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board, a semiconductor device using the same, and a method for manufacturing a multilayer wiring board, and to a high-density multilayer wiring board used for computers, digital exchanges, wireless information terminals and the like. And a multi-chip module and its substrate, and a semiconductor package and its substrate, and the like. In particular, a multilayer wiring board excellent in heat radiation characteristics and high frequency characteristics, a semiconductor device using the same, and a low-cost and highly reliable multilayer wiring board To a method for manufacturing a multilayer wiring board.

[0002]

2. Description of the Related Art In the conventional method for manufacturing a multilayer printed wiring board, there is known a technique for connecting both surfaces of the printed board by through-plated through holes.

As a method for manufacturing a high-density multilayer printed wiring board, an insulating film is provided on the outside of a double-sided printed wiring board as described in, for example, Japanese Patent Laid-Open Nos. 4-148590 and 1-53497. And copper are sequentially laminated,
There is a build-up method that connects the thin film layers with via holes.

On the other hand, the heat generated from the LSI is generally released from the LSI package or bare chip to the substrate through solder for electrical connection. In recent years, however, the heat generated by the LSI is radiated to the LSI package or the chip itself. I came to attach fins. However, the outer shape of this heat radiation fin is large, and it is necessary to reduce the size from the viewpoint of high-density mounting. As a result, a new path for efficiently releasing heat to the board is desired along with the efficiency improvement of the heat radiation fin. It has become. Regarding such a technique, for example, JP-A-4-279097 and JP-A-5-343 are available.
There is a multilayer printed wiring board having a so-called thermal via as described in Japanese Patent Laid-Open No. 821 and Japanese Patent Laid-Open No. 5-304223.

Further, in designing the pattern of the multilayer wiring board, it is very important to consider the electrical performance such as impedance and crosstalk, and it is desired to increase the speed and density, especially in a high frequency circuit. , Deterrence of electromagnetic side effects is becoming an increasing challenge. Therefore, wiring design by a microstrip line or a strip line in which the signal wiring is brought close to the ground layer is performed. Further, Japanese Laid-Open Patent Publication No. 2-116190 discloses a method of covering the wiring formed on the surface of the substrate with a ground. Further, Japanese Laid-Open Patent Publication No. 4-142795 discloses the wiring formed in the substrate. A method of providing a ground conductor along both sides is shown.

Further, in Japanese Unexamined Patent Publication Nos. 4-148590 and 1-53497 cited as a conventional method for manufacturing a high-density multilayer printed wiring board, a conductor is formed by electroless plating on an organic insulating film. Forming the underlying conductive film.

[0007]

In the conventional method for manufacturing a multilayer printed wiring board described above, the through-plated through hole is formed at the final stage of the manufacturing process of the multilayer printed wiring board, so that the double-sided printed wiring board becomes a core. After all, the through-hole grid and the through-hole grid for connecting the wiring layers on the outside of the grid have the same grid pitch at the same position.

Therefore, if the through holes are formed so densely that the wiring cannot be formed on the surface of the double-sided printed wiring board, which is the core, the wiring cannot be formed on the outer conductor layer. On the contrary, if the through hole pitch is determined so that the wiring can be formed on the outer conductor layer, the through hole pitch cannot be further reduced.

Further, in the technique described in the above-mentioned JP-A-4-148590 and JP-A-1-53497, which is a method for manufacturing a high-density multilayer printed wiring board, a high density is achieved in the thin film layer by this method. There is an advantage that wiring and via holes can be formed.

However, if through holes are formed at the final stage in order to connect both surfaces of the double-sided printed wiring board which becomes the core, it becomes difficult to perform high-density wiring due to the influence of the through holes, as in the above case. Therefore, the merit of using a multilayer wiring board with a thin film layer structure capable of forming high-density wiring is drastically reduced.

Further, when the vias are formed on the through-hole lands by the sequential laminating method, the width of the through-hole lands is increased and the through-hole pitch is increased accordingly. And
The minimum lattice pitch formed by vias is the same as the through hole pitch, and there is a problem in that there is a limit to high density.

Further, since the through holes are not filled up, it is difficult to form successive laminated layers, and the reliability of the substrate is lacking.

As described above, the conventional multilayer printed wiring board in which both surfaces are connected by the through-plated through holes has a limitation in increasing the density because of the through-plated through holes.

This adverse effect is noticeable when a multi-pin narrow-pitch LSI package or an LSI bare chip is mounted on a multilayer printed wiring board, and sometimes the wiring cannot be routed even if the LSI can be connected to the board. .

On the other hand, when a substrate on which wiring can be routed is used, a mismatch occurs in that the terminal pitch of the LSI and the pad pitch of the substrate cannot be matched, or the wiring must be extremely multi-layered. Inconvenience may have occurred.

On the contrary, if the through-plated through holes on the board are not filled up, the LSI bare chip mounted on the board is only shielded from the outside by an extremely thin encapsulating material, which lacks reliability. There is a problem that it becomes a thing.

Next, JP-A-4-27909 for heat dissipation
No. 7, JP-A-5-343821, and JP-A-5-343821.
Regarding the technology of the multilayer printed wiring board described in Japanese Patent No. 304223, all of these boards use plated through holes penetrating both sides of the board.
Forming the through-plated through holes at the final stage of manufacturing the substrate only for the thermal via has a problem of high cost.

Next, Japanese Patent Application Laid-Open No. 2-1 considering a high frequency circuit.
In the method of covering the wiring formed on the surface of the substrate with a ground as described in Japanese Patent No. 16190, the structure has to be manufactured at the final stage of manufacturing the substrate only to surround the wiring with the ground, and the manufacturing cost is low. There was a problem that the cost would be high.

Further, in the method disclosed in JP-A-4-142795, in which the ground conductor is provided along both sides of the wiring formed in the substrate, the ground conductor is a through-hole conductor and the shielding effect is small. There was a problem.

Next, regarding the techniques described in JP-A-4-148590 and JP-A-1-53497, in this method, the surface of the organic insulating film is roughened with chromium sulfate or permanganese salt, and the anchor thereof is used. The underlying conductive film is adhered due to the effect. However, this method has a problem that it is difficult to secure a sufficient adhesive strength.

In addition, in a method in which a resin filler having a higher solubility than an organic insulating material in an oxidizing agent is contained, the filler on the surface of the insulating film is removed by the oxidizing agent, and the underlying conductive film is adhered by its anchor effect. , Although it has a high adhesive strength, the organic filler, which is more easily oxidized than the organic insulating film, is naturally inferior in physical properties such as heat resistance to the organic insulating film material, resulting in a problem that the physical properties of the insulating film as a whole are deteriorated. .

The present invention has been made to solve the above-mentioned problems of the prior art. A first object of the present invention is to provide a through-plated through hole for connecting both sides of a double-sided printed wiring board as a core. Even when holes are formed, a multilayer wiring board having a structure that maximizes the ability to form high-density wiring in an insulating film and a copper thin film layer formed on the outer side thereof and a semiconductor using the same To provide a device. In particular, even if the through holes are so densely formed that the wiring cannot be formed on the surface of the double-sided printed wiring board that will be the core, the wiring can be formed on the conductor layers of the sequentially laminated thin film layers formed on the outer side of the through holes It is to provide a substrate and a semiconductor device using the same.

A second object of the invention is to provide a multilayer wiring board having a structure excellent in heat dissipation and a semiconductor device using the same.

A third object is to provide a multilayer wiring board excellent in high frequency characteristics and a semiconductor device using the same.

A fourth object of the present invention is to provide a method for manufacturing the above-mentioned substrate with high reliability and at low cost. In particular, a method for manufacturing a multilayer wiring board having excellent adhesive strength between an insulating film and a base conductive film. To provide.

[0026]

In order to achieve the above object, a double-sided printed board as a core and a shape above or below the board are formed.
A multilayer wiring board having a wiring layer formed by
The double-sided printed circuit board, which will be
Through-plated through hole and the through-plated through hole
Are arranged between the grids formed by the holes and the wiring layer
A via to be connected, and the through-plated through hole
And the via exist on the periphery of the through-plated through hole
And part of it forms the through-plated through hole.
Run extended to the position of vias placed between the grids
It is designed to be electrically connected by a cable .

More specifically, in the above-mentioned multilayer wiring board, the double-sided printed board serving as the core has at least four through-plated through-holes filled with holes, and the four positions of the through-plated through-holes at the central positions are filled. The extended land portion is extended to the central position of the lattice to be formed.

More specifically, in the wiring layer formed on or below the double-sided printed board that serves as the core,
The via pad position is one of the center positions of the four through-plated through holes filled with holes, the center position of the lattice formed by these center positions, or both.

In order to achieve the above-mentioned object, the structure of the invention relating to the semiconductor device of the present invention is such that pads are provided on the grids on both sides of the above-mentioned multilayer wiring board, and the pads are provided on one side of the multilayer wiring board. One or more semiconductors or semiconductor packages are connected to each other, and a conductor for connecting to another multilayer wiring board is formed on the pad on the other side of the multilayer wiring board, or the multilayer wiring board is formed. One or more semiconductors or semiconductor packages are connected to one surface of each of the pads on both surfaces, and a conductor for connecting to another multilayer wiring board is formed on one of the pads of the multilayer wiring board. It was done in the same way.

Another aspect of the invention relating to the multilayer wiring board of the present invention is that the land of the through-plated through-hole filled in the double-sided printed board and the stud via on the filled-up portion are provided with columnar copper bodies. It is formed and formed.

More specifically, in more detail, a columnar copper body is formed on the surface layer copper of a region including a plurality of through-plated through holes filled in the double-sided printed board and the stud via on the filled portion. .

In order to achieve the above object, another structure of the invention according to the semiconductor device of the present invention is that the pillar-shaped copper body and the semiconductor or semiconductor package are thermally conductive in any one of the above multilayer wiring boards. Connect with a good thermal conductor and connect the through-plated through holes filled up with the power supply layer or the ground layer, or the columnar copper on the side opposite to the copper body connected to the semiconductor or semiconductor package. Either one of forming a thermal conductor with good thermal conductivity for connecting to another multilayer wiring board on the body,
Alternatively, both are performed.

In order to achieve the above object, another structure of the invention relating to the multilayer wiring board of the present invention is to provide a plurality of wirings.
And the insulation around the wiring in the area having the plurality of wirings.
A multilayer wiring board having an edge layer, wherein
A ground layer is provided on at least 3 sides, and multiple wirings
It is the one that was made to surround it .

Further, in order to achieve the above-mentioned object, another structure of the invention according to the semiconductor device of the present invention is to form a plurality of electric circuit systems by using the above-mentioned multilayer wiring board, which are connected to the ground layer. They are separated from each other.

Next, in order to achieve the above object, the structure of the invention relating to the method for manufacturing a multilayer wiring board of the present invention is (1)
A step of forming a hole on a double-sided copper-clad printed board and copper-plating the entire surface, (2) a step of forming a resist removal pattern in a desired shape, then plating copper for vias, and removing the resist; ) A step of forming a residual pattern of the resist in a desired shape, then patterning the surface copper, and peeling the resist, (4) installing a mold having a flat surface on both surfaces of the substrate, and the substrate and the mold. A step of supplying a solvent-free fluid polymer precursor containing a filler between the two, (5) a step of evacuating between the mold and the substrate, (6) a step of moving the mold toward the substrate. Filling a filler-free solvent-free fluid polymer precursor into the copper conductor gap on the substrate,
(7) applying a predetermined hydrostatic pressure to the precursor, (8)
Curing the precursor under hydrostatic pressure, (9) exposing the via copper conductor surface, (10) forming an underlying conductive film connected to the via copper conductor, (11) resist into a desired shape After forming the punching pattern, the wiring copper conductor is formed by plating, (12) After the resist punching pattern is formed in a desired shape, the via copper conductor is formed by plating, (13) Two-layer The steps (1) to (3) are performed in this order, including the step of removing the resist and the step (14) of etching the unnecessary underlying conductive film, and thereafter the steps (4) to (14).
The method of manufacturing a multilayer wiring board (method A) in which the steps are repeated in this order to form a multilayer, or (1) a step of boring a double-sided copper-clad printed board and copper-plating the entire surface, (2) forming a desired shape After forming the residual pattern of the resist, the surface copper is etched and the resist is peeled off. (3) A mold having flat surfaces is provided on both surfaces of the substrate, and a filler is contained between the substrate and the mold. A step of supplying a solventless type fluid polymer precursor, (4) a step of exhausting a space between the mold and the substrate, and (5) a solvent containing filler containing solvent by moving the mold toward the substrate. Filling the gap between the copper conductors on the substrate with a fluid polymer precursor, (6) applying a predetermined hydrostatic pressure to the precursor, (7) curing the precursor under hydrostatic pressure, ( 8) A step of exposing the surface copper conductor surface, (9) After forming the edge film, a step of forming a via hole at a desired position of the insulating film, and a step of forming a via copper conductor and a wiring copper conductor by plating are included. A method for manufacturing a multilayer wiring board (method B) in which the steps are performed in this order, and thereafter the steps (9) to (10) are repeated in this order to form a multilayer
In the above method, the solvent-free fluid polymer precursor containing a filler is melted by heating and supplied onto a substrate by a precision metering device.

More specifically, in the method for manufacturing a multilayer wiring board, a filler is used in the method A- (9) and the method B- (8), which is the step of exposing the copper conductor surface of the method A or the method B. The insulating film is decomposed or dissolved by a chemical solution to roughen the surface of the insulating film.

More specifically, the filler is polyimide, the solvent-free fluid polymer precursor is a composition of a polyfunctional epoxy resin and a novolac resin, and the chemical solution is (a) an alkaline aqueous solution, (b) ) A mixed solution of ethylenediamine and hydrazine hydrate, (c) one of N-methyl-2-pyrrolidone or a halogenated phenol, or both, selected from the above (a) to (c). It is made to be one kind .

More specifically, an insulating substrate is used instead of the double-sided copper-clad printed board.

More specifically, in the above method for manufacturing a multilayer wiring board, the insulating board is a board obtained by curing a prepreg material.

[0040]

In the multilayer wiring board according to the present invention, a via is formed in a part of the land of the through-plated through hole filled in the double-sided printed wiring board, and the wiring of the sequentially laminated thin film layer outside the via is formed. Try to connect with layers. Therefore, even if the through holes are densely formed so that the wiring cannot be formed on the surface of the double-sided printed wiring board, the wiring can be formed in the conductor layer of the sequentially laminated thin film layer formed on the outer side of the through holes with a high density. This has the effect of enabling various wiring.

If wiring positions are provided at both the center position of the four through-hole plated through holes and the center position of the lattice formed by the center positions of the through-hole plated through holes. Since the pitch of the grid formed by the positions can be made smaller than the pitch of the grid formed by the center position of the through hole, wiring with higher density can be realized.

The structure of such a multilayer wiring board can be manufactured by filling the through-plated through holes of the double-sided printed wiring board to be the core, and forming successively laminated thin film layers thereon.

Further, in the semiconductor device according to the present invention, pads are provided on the grids on both surfaces of such an ultra-high-density multilayer wiring board, and one or more semiconductors or semiconductor packages are connected to the pads on one surface of the board. Then, a conductor for connecting to another multilayer wiring substrate is formed on the pad on the other side of the substrate, or one or more semiconductors are formed on each side of the pad on both sides of the substrate. Alternatively, a semiconductor package is connected, and a conductor for connecting to another multilayer wiring board is formed on the pad on one surface of the board.

Therefore, even a multi-pin narrow-pitch LSI package or an LSI bare chip, which has been difficult with a conventional printed wiring board, can be connected to the board and the wiring can be routed. The number of layers can also be reduced. Further, since the through-holes are filled up, the LSI bare chip inside the package is shielded from the outside by the insulating resin, and the reliability is also improved.

Further, in the semiconductor device according to the present invention, on the land and the filled portion of the through-plated through hole of the double-sided printed board, or in the region including a plurality of the through-plated through hole of the double-sided printed board. Columnar copper is formed on the surface layer copper and the hole-filled portion, and the columnar copper and the semiconductor or semiconductor package are connected by a heat conductor having a good thermal conductivity, and the through-hole plated through-hole filled with the hole is connected to the power supply layer or Either to connect to the ground layer or to form a heat conductor with good heat conductivity for connecting to another multilayer wiring board on the columnar copper on the side opposite to the semiconductor or semiconductor package, or , Doing both.

Therefore, the heat generated in the LSI can be easily transmitted to the outside, which has the effect of excellent heat dissipation. Further, since the thermal via can be manufactured in the process of manufacturing a substrate, which will be described later, and is not formed in the final stage of manufacturing the substrate, it is expected that such a structure will not increase the cost so much. be able to.

Further, in the multilayer wiring board according to the present invention, the area around the wiring having at least one wiring contained in the board is covered with an insulating layer, and the three layers of the upper, lower, left, right, front and rear of the area are covered. At least two of the directions are surrounded by the ground layer. Further, in the semiconductor device according to the present invention, a plurality of electric circuit systems are separated from each other by using the multilayer wiring board.

By doing so, the source of electromagnetic waves can be covered with the insulating layer and the ground layer.
It is possible to obtain the effect of suppressing interference of electric signals and noise generation and excellent in high frequency characteristics. Furthermore, since the wall via can be manufactured in the process of manufacturing a substrate to be described later and is not formed in the final stage of manufacturing the substrate,
Even with such a structure, it is possible to expect an effect that the cost is not so much increased.

As the method for producing a multilayer wiring board according to the present invention, in the method A and method B described above, the filler-containing solvent-free fluid polymer precursor is heated and melted to form a precise quantitative discharge device. Is supplied onto the substrate, and the filler is decomposed or dissolved from the cured insulating film by a chemical solution to roughen the surface of the insulating film and then electroless plating is performed.

By doing so, it becomes possible to form a base conductive film having excellent adhesiveness using a simple process. Here, polyimide as a filler,
By using a composition of a polyfunctional epoxy resin and a novolac resin as a solvent-free fluid polymer precursor, the physical properties of the insulating film can be improved without the filler deteriorating the physical properties of the insulating film. .

When a double-sided printed wiring board to be a core is manufactured, if a double-sided copper-clad printed board is used and an insulating material obtained by thermosetting a prepreg is used, the cost of the manufacturing process can be further reduced. it can.

[0052]

Embodiments of the present invention will be described below with reference to FIGS. 1 to 15. [Structure of Multilayer Wiring Board According to the Present Invention that Enables High-Density Wiring and Semiconductor Device Using the Same] The structure of the multilayer wiring board according to the present invention is one in which the land of the through-plated through holes filled in the double-sided printed wiring board A multilayer wiring board is formed by forming vias in the partially expanded portion for connecting to the wiring layers of the sequentially laminated thin film layers on the outside. In the structure of a semiconductor device using this, pads are provided on the grid of vias formed in this multilayer wiring board to connect a semiconductor or a semiconductor package. The multi-layered wiring board and the semiconductor device using the same achieve the high density of the first object of the present invention.

This will be described in detail below with reference to FIGS. 1 to 6. First, the basic structure of lands and vias of the multilayer wiring board according to the present invention will be described with reference to FIG.

FIG. 1 is a diagram showing the structure of lands and vias of a multilayer wiring board according to the present invention. FIG. 1A is a perspective view of the lands and vias, and FIG. 1B is AA 'of FIG. FIG.

As shown in FIG. 1A, an extended land portion 1 obtained by partially expanding a land 101 formed on the periphery of a through-plated through hole filled in a double-sided printed wiring board.
A via 103 is formed at the tip portion of 02 for connecting to the wiring layer of the sequentially laminated thin film layer on the outside thereof.

The shape of the via is AA 'in FIG. 1 (b).
Two stud vias 104 as shown in the sectional view and a conformal via 105 as shown in the sectional view AA ′ of FIG. 1C can be used, but finer vias can be formed, and a mortar shape The stud via 104 shown in FIG. 1B is more preferable because it has a columnar shape instead.

Next, the structure of the printed wiring board according to the present invention will be described with reference to FIG. FIG. 2 schematically shows a top view of the surface layer of the double-sided printed wiring board which becomes the core.

The structure of the printed wiring board according to the present invention is as follows.
The through holes and lands described above are effectively arranged. That is, the four through-hole plated through holes 201 of the double-sided printed wiring board, which is the core of the wiring, are filled.
At a central position of the grid formed by 202, 203, and 204, one expansion land 206 of the through-plated through hole 201 is occupied so as to occupy, and a sequential stacking is performed outside the printed wiring board at the central position of the grid. This is a structure in which a via 206 for forming a connection with the wiring layer of the thin film layer is formed.

With such a structure, even if the through holes are so densely formed that wiring cannot be formed on the surface of the double-sided printed wiring board, the conductor layer of the sequentially laminated thin film layer formed on the outside of the through holes is formed. Wiring can be formed.

Next, the wiring in the wiring layers formed above and below the printed wiring board according to the present invention will be described in detail with reference to FIGS. 3 and 4. FIG. 3 schematically shows a top view of one example of a wiring pattern of a wiring layer formed above and below a surface layer of a double-sided printed wiring board which becomes a core. FIG. 4 schematically shows a top view of an example of a wiring pattern of a wiring layer formed above and below a surface layer of a double-sided printed wiring board which becomes a core.

Reference numeral 301 in FIG. 3 denotes wiring, and 302 denotes
It represents a pad in which a via for interlayer connection is formed.
The grid formed by the pad 302 is formed by the four inner plated through-holes 303, 304, 30.
5, 306 in the central position, that is, the position of the pad 302.

With such a structure, the lattice β of the sequentially laminated thin film layers becomes a lattice obtained by shifting the through-hole lattice α of the double-sided printed wiring board to be the core by 1/2 lattice in the XY directions, and the lattice pitch thereof. Can be the same as the grid pitch of the through holes.

Another wiring method of the multilayer wiring board according to the present invention will be described with reference to FIG. This is a pad where a via is formed on the surface of the extended land,
Further, a pad in which a via is formed is also provided in the central portion of the through-plated through hole, and wiring is taken with both of them to improve the wiring density. That is, the wiring positions are four through-plated through-holes 40 filled with holes.
The center positions of the holes 1, 402, 403, 404 and the center positions of the four holes are the center of the lattice formed. The pitch of the grid γ formed by the wiring positions at this time can be set to 1 / √2 of the pitch of the through-hole grid α of the double-sided printed wiring board as the core.

By adopting such a structure of the multilayer wiring board, it is possible to provide a printed wiring board capable of ultra-high density wiring which cannot be achieved by the conventional printed wiring board.

Although the above-mentioned way of taking the wiring position is basically shown, various irregular shapes can be adopted in accordance with the gist of the present invention.

Next, a semiconductor device using the above multilayer wiring board will be described with reference to FIGS. 5 and 6. It should be noted that the semiconductor device mentioned here is a semiconductor device that can be understood as a concept classified into a so-called single-chip package, a multi-chip package, a multi-chip module, or the like.

FIG. 5 is a sectional view of a semiconductor device using the multilayer wiring board of the present invention having two semiconductors or semiconductor packages mounted on the upper surface. FIG. 6 is a cross-sectional view of a semiconductor device to which a lead frame is attached using the multilayer wiring board of the present invention in which one semiconductor or semiconductor package is mounted on each of the upper surface and the lower surface.

That is, in this semiconductor device, the I / O terminals of the semiconductor or the semiconductor package are connected by connecting pads to the semiconductor or the semiconductor package by providing pads on the lattice of the sequentially laminated thin film layers using the multilayer wiring board. It is possible to manufacture a semiconductor device that can be mounted even if the number of devices increases.

In the example of the structure of this semiconductor device shown in FIG. 5, the pads 50 are formed on the grids on both surfaces of the multilayer wiring board 501.
2, 503, and two semiconductors or semiconductor packages 504, 505 on the pad 502 on one surface of the substrate 501.
Are connected by solder balls 506, and solder balls 507 for connecting to another multilayer wiring board are formed on the pads 503 on the other side of the board 501.

In this example, there are two semiconductors or semiconductor packages on one side, but an appropriate number of one or more semiconductors or semiconductor packages can be mounted. Further, in this example, solder balls are used as conductors for connecting the semiconductor or semiconductor package to the multilayer wiring board and for connecting the multilayer wiring board to another multilayer wiring board, but wires, lead frames, conductive films, etc. It is also possible to use the usual conductors.

In the example of the structure of this semiconductor device shown in FIG. 6, the pads 60 are formed on the grids on both surfaces of the multilayer wiring substrate 601.
2, 603, and pads 602 on both sides of the substrate 601.
Two semiconductors or semiconductor packages 60 on 603
4, 605 are connected by solder balls 606, and a lead frame for connecting to another multilayer wiring board is formed on the pad 603 on one surface of the board.

In this example, the number of semiconductors or semiconductor packages is one on each side, but an appropriate number of semiconductors or semiconductor packages, one or more, can be mounted on one side. Further, in this example, a normal conductor such as a wire, a lead frame, or a conductive film can be used instead of the solder ball of the conductor for connecting the semiconductor or the semiconductor package and the multilayer wiring board 601. Is the same as described in.

It is desirable to use a lead frame for connection between the multilayer wiring board 601 and another multilayer wiring board because of the thickness of the semiconductor or semiconductor package. The semiconductor device such as the single chip package or the multi-chip package described above can be assembled into a final package form by performing an assembly such as a normal sealing process, a molding process and a radiation fin mounting process.

[Multilayer Wiring Board According to the Present Invention Having Excellent Heat Dissipation Characteristics and Semiconductor Device Using the Same] Further, another structure of the multilayer wiring board according to the present invention is that the land of the through-plated through hole and the filled portion are filled. A columnar copper body is formed on the top. Further, the structure of a semiconductor device using the same is such that a heat conductor having a good heat conductivity is placed on the columnar copper body and is connected to another semiconductor or a multilayer wiring board.

The multilayer wiring board and the semiconductor device using the multilayer wiring board can achieve the excellent heat radiation characteristic which is the second object of the present invention.

This will be described in detail below with reference to FIGS. 7 to 9. First, the basic structure of the multilayer wiring board according to the present invention having excellent heat dissipation characteristics will be described with reference to FIGS. 7 and 8. FIG. 7 is a cross-sectional view of a multilayer wiring board having excellent heat dissipation characteristics, in which one through-hole corresponds to one columnar copper body. FIG. 8 is a cross-sectional view of a multilayer wiring board having excellent heat dissipation characteristics, in which one columnar copper body is made to correspond to a plurality of through holes.

In the example shown in FIG. 7, the double-sided printed board 7
On the land 703 and the hole-filled portion 704 of the through-plated through-hole 702 of 01, the columnar copper body 70 is formed.
5 is formed. 7 (a) and 7 (b)
Then, there is a difference in the shape of the columnar copper body 705.
7A shows a structure in which holes are filled, and FIG. 7B shows
Although there is a recessed portion, this difference is a difference in structure due to the manufacturing method.

In the example shown in FIG. 8, the basic idea is the same as in the example shown in FIG. 7, but the surface layer of the area of the double-sided printed board 801 including a plurality of the through-plated through holes 802 buried therein. Copper body 803 and hole filling portion 80
4 is an example in which a columnar copper body 805 is formed on No. 4. The difference between FIG. 8A and FIG. 8B is also the difference in structure due to the manufacturing method.

Next, a semiconductor device using the above multilayer wiring board will be described with reference to FIG. FIG. 9 shows FIG.
3 is a cross-sectional view of a semiconductor device formed by using the substrate of FIG.

The columnar copper body 901 of the substrate and the semiconductor or semiconductor package 902 are connected to each other by a heat conductor 903 having a good heat conductivity.
In order to connect the through-plated through holes 904 filled with holes with the power supply layer or the ground layer, or to connect another multilayer wiring board to the columnar copper body 905 on the side opposite to the semiconductor or the semiconductor package. The thermal conductor 906 having good thermal conductivity is formed, or both of them are formed. Solder, silver paste, or the like can be used as the material of the heat conductor having good heat conductivity.

When the structure of FIG. 7 is used as the substrate, 1
A heat dissipation path can be created at any one of the locations. Further, when the structure of FIG. 8 is used, the heat radiation path is concentrated in a specific place, and when such a structure is formed in the central portion of the semiconductor or the semiconductor package, the wiring region can be used more effectively. it can.

[Multilayer Wiring Board According to the Present Invention Having Excellent High-Frequency Characteristics and Semiconductor Device Using the Same] Further, in another structure of the multilayer wiring board of the present invention, an insulating layer is provided around the wiring region of the multilayer wiring board. The cover is such that at least three of its regions are surrounded by a ground layer. Further, the structure of a semiconductor device using the same is such that a plurality of such substrates are isolated from each other by a ground layer.

With this multilayer wiring board and the semiconductor device using the same, it is possible to achieve excellent high frequency characteristics, which is the third object of the present invention.

This will be described below with reference to FIGS. 10 and 11. First, the basic structure of the multilayer wiring board according to the present invention having excellent high frequency characteristics will be described with reference to FIG.
FIG. 10 is a perspective view of a multilayer wiring board according to the present invention having excellent high frequency characteristics.

In the example shown in FIG. 10, an insulating layer 1002 covers the wiring periphery of a region having at least one wiring 1001 included in the substrate, and at least three sides of the region are covered with a ground layer 1003. It has an enclosed structure. By using such a structure of the multilayer wiring board, it is possible to suppress interference of electric signals and noise generation.

The side portion of the ground layer 1003 along the wiring is in the form of a wall via, so to speak. The ground layer 1004 above the wiring may be attached later as a mounting component.

Next, a semiconductor device using the above multilayer wiring board will be described with reference to FIG. FIG. 11 is a top view of a semiconductor device having excellent high frequency characteristics.

The example shown in FIG. 11 is a semiconductor device in which a plurality of electric circuit systems 1102 on a substrate 1101, for example, a reception system and a transmission system of a mobile radio terminal and a logic system and a radio system are isolated from each other by a ground 1103. It is what

[Manufacturing Method of Multilayer Wiring Board According to the Present Invention]
The method for manufacturing a multilayer wiring board according to the present invention is characterized by using a filler-containing solventless fluid polymer precursor, and uses one of the following manufacturing methods A and B. is there. Thus, it is possible to achieve the fourth problem of the present invention to manufacture a low-cost, high-density and highly reliable multilayer wiring board.

This will be described in detail below with reference to FIGS. 12 and 13. First, the manufacturing method by the manufacturing method of the method B will be described with reference to FIG. FIG. 12 is a diagram showing a cross-sectional view of the multilayer wiring board according to the manufacturing steps of the method B of the method for manufacturing a multilayer wiring board according to the present invention.

First, a hole 1202 is formed in the double-sided copper-clad printed board 1201 (FIGS. 12A and 12B), and copper plating is performed on the entire surface (FIG. 12C).

Next, a resist residual pattern is formed in a desired shape, the surface copper is patterned by etching, and then the resist is peeled off to obtain a structure shown in FIG.

Then, molds having flat surfaces are placed on both surfaces of the substrate, and the filler-containing solventless fluid polymer precursor is supplied between the substrate and the mold. After that, the space between the mold and the substrate is evacuated, the mold is moved toward the substrate,
The supplied precursor is filled in the copper conductor gap on the substrate.

Next, a predetermined hydrostatic pressure is applied to the precursor, the precursor is cured under hydrostatic pressure, and the copper conductor gap including the through hole is filled with the insulating film 1205.

Furthermore, after the copper conductor gap including the through holes is filled with the insulating film 1205, the copper conductor surface 1206 is exposed (FIG. 12 (e)).

After that, an interlayer insulating film 1207 is formed, and a via hole 1208 is formed at a desired position of the insulating film (FIG. 12 (f)). Next, a via copper conductor and a wiring copper conductor are formed by plating (FIG. 12 (g)). Then, the steps shown in FIGS. 12F and 12G are repeated to form a multilayer structure.

Here, as a method for filling the copper conductor gap including the through hole with the insulating film 1205, a method by molding is preferable. Methods for exposing the copper conductor surface 1206 include etching and polishing. In addition, FIG.
It is also possible to fill the holes with a conductive paste at the stage of (b) or FIG. 12 (c) and then pattern the surface copper foil. The steps of FIGS. 12F and 12G are normal build-up processes, and the via holes are formed by photolithography or laser ablation of a photosensitive insulating resin.

Next, the manufacturing method by the manufacturing process of the method A, which is another method for manufacturing the multilayer wiring board of the present invention, will be described with reference to FIG. FIG. 13 shows the manufacturing steps of the method A of the method for manufacturing a multilayer wiring board according to the present invention, step by step.
It is the figure which showed the cross section of the multilayer wiring board.

A hole 130 is formed in the double-sided copper-clad printed board 1301.
2 is opened (FIGS. 13A and 13B), and copper plating is performed on the entire surface (FIG. 13C).

Next, a resist removal pattern for vias is formed in a desired shape, copper for vias is plated, and then the resist is peeled off to obtain the structure of FIG. 13 (d).

Further, after forming a resist residual pattern in a desired shape, the surface copper is patterned by etching and the resist is peeled off to obtain the structure of FIG. 13 (e).

Then, molds having flat surfaces are placed on both surfaces of the substrate, and the filler-containing solventless fluid polymer precursor is supplied between the substrate and the mold. After that, the space between the mold and the substrate is evacuated, the mold is moved toward the substrate,
The supplied precursor is filled in the copper conductor gap on the substrate.

Then, a predetermined hydrostatic pressure is applied to the precursor, the precursor is cured under hydrostatic pressure, and the copper conductor gap including the through hole is filled with the insulating film 1306. After this, the via copper conductor surface 1307 is exposed to expose FIG.
The structure of

After that, a base conductive film (not shown) connected to the via copper conductor is formed, a resist removal pattern is formed in a desired wiring shape, and then a wiring copper conductor 1308 is formed by plating. Further, after forming a resist removal pattern in a desired via shape, the via copper conductor 1309 is formed.
Is formed by plating, the two layers of resist are peeled off, and the unnecessary underlying conductive film is etched to form the wiring copper conductor 1308 and the via copper conductor 1309, thereby forming the structure of FIG.

Then, after filling the copper conductor gap with the insulating film 1310 in the same manner as described above, the via copper conductor surface 1311 is exposed to obtain the structure of FIG. 13 (h). When making multiple layers,
The steps of FIG. 13G and FIG. 13F are repeated.

Next, the key points of the manufacturing method of the method A and the method B described above will be described with reference to FIG. FIG. 14 is a cross-sectional view showing aspects of the insulating film, the filler, and the underlying conductive film.

In Method A and Method B, it is difficult to form the filler-containing solvent-free fluid polymer precursor in the form of a sheet or film. Therefore, the precursor is supplied by heating and melting the precursor and discharging it in a precise fixed amount. It is desirable to supply with the device.

Further, in the method A, a method of forming a base conductive film 1403 formed on an insulating film as shown in FIG. 14C will be described.

Filler 1 in insulating film 1401 obtained by curing a solvent-free fluid polymer precursor as shown in FIG.
402 is decomposed or dissolved by a chemical solution. Then, after roughening the surface of the insulating film as shown in FIG. 14B, electroless plating is performed to connect to the via copper conductor.
The underlying conductive film 1403 of (c) is formed. This makes it possible to form a base conductive film having excellent adhesive strength with the insulating film.

Alternatively, in the method B, in the step of exposing the surface copper conductor surface, by similarly roughening the surface of the insulating film, the adhesiveness with the upper layer copper, particularly the hole filling during the formation of the thermal via is filled. The adhesion between the insulating film and the copper on the through-plated through hole can be improved.

Here, when the filler is polyimide and the solvent-free fluid polymer precursor is a composition of polyfunctional epoxy resin and novolac resin, the chemical solution is an alkaline aqueous solution, a mixed solution of ethylenediamine and hydrazine hydrate, One selected from N-methyl-2-pyrrolidone or halogenated phenol can be used.
In the case of an alkaline aqueous solution, an alkaline permanganate etching solution used when exposing the via copper conductor surface may be used instead. When polyimide is used as the filler in this way, the physical properties such as heat resistance, electrical characteristics and mechanical characteristics of the entire insulating film are not impaired.

In the methods A and B, an insulating material may be used instead of the double-sided copper-clad printed board.
As the insulating material, for example, an insulating material obtained by curing a prepreg material can be used.

By the above-described method for manufacturing a multilayer wiring board, the high-reliability high-density multilayer wiring board of the above problem can be manufactured at low cost, and further, a structure excellent in heat dissipation and high frequency characteristics can be obtained. It can be built into the multilayer wiring board during the manufacturing process of the board.

[Specific Example of Multi-Layered Wiring Board and Semiconductor Device Material, Structure Scale, and Manufacturing Method Using the Same According to the Present Invention] Hereinafter, each embodiment of the present invention will be described with respect to the structure and the manufacturing method. Based on this, a specific description will be given with reference to FIGS. 12, 13 and 15, but the application target of the present invention is not limited to these. Here, FIG.
[FIG. 3] is a top view for displaying each scale of the multilayer wiring board.

Example 1 Through-holes were drilled in a lattice pattern on a BT resin double-sided copper-clad printed board (manufactured by Mitsubishi Gas Chemical Co., Inc.) (FIGS. 12 (a) and 12 (b)), and chemical copper was formed on the entire surface. It was plated (FIG. 12 (c)).

Then, a film resist is formed, and a pattern is formed by leaving it in a desired shape by exposure and development,
The surface layer copper was patterned by etching, and the resist was peeled off (FIG. 12 (d)).

Then, a solvent-free fluid polymer precursor containing a polyimide filler and a tetrafunctional epoxy resin system and a novolac resin was applied to the gap between the copper conductors including the through holes with a precision metering device, After heating under reduced pressure in the mold, pressure was applied from above and below with a flat plate.

Then, the precursor was heated and cured under hydrostatic pressure to form an insulating film, and the copper conductor surface was slightly removed with an alkaline permanganate-based etching solution. The surface of the insulating film was roughened while the surface of the copper conductor was exposed.

After that, a photosensitive interlayer insulating resin was formed into a film, and a via hole was formed at a desired position by exposure and development (FIG. 12 (f)). Then, post-heating was applied to roughen the interlayer insulating film with an alkaline permanganate-based roughening solution, chemical copper plating and electrolytic copper plating were performed, and post-heating curing was performed. afterwards,
A film resist is formed, and a pattern is formed by leaving it in a desired shape by exposure and development, and then the surface copper is patterned by etching, and the resist is peeled off (FIG. 12).
(G)).

Then, the steps from the film formation of the photosensitive interlayer insulating resin to the resist peeling are repeated again, and finally, the solder resist is formed, and two successive laminated thin film layers are formed on both sides of the double-sided copper-clad printed board. A multilayer wiring board having a total of 6 layers was produced.

The double-sided printed wiring board used as the core is shown in FIG.
As shown in FIG. 5 (a), in the highest density portion, the grid pitch dp is 700 μm, the through-plated through hole has a drill diameter dr of 300 μm, and a land width wld is 100 μm. One land was expanded by taking a distance dq of about 100 μm away from the three lands. Then, a photo via hole having a bottom diameter db of 100 μm is formed on the land, that is, the pad, and the land width whld of the photo via hole in the outer wiring layer is 50 μm, the pad diameter on which the photo via hole rides is 300 μm, the pad pitch dlp is 700 μm, and the pad is Line width wl is 57 μm and space width ws is 5
Three 7 μm wirings were formed, and the interlayer connection had a staggered structure.

In the manufacturing process of this multilayer wiring board, thermal vias are formed as shown in FIG. 8B, the bare chip and the board on one surface are made of silver paste, and the bare chip and the pad of the board are made of solder. Connection was made with balls, and solder balls were formed on the thermal vias and pads on the back surface, and the structure as shown in FIG. 5 was introduced into the multichip module and the semiconductor package.

<Example 2> Through-holes were drilled in a grid pattern on a double-sided copper-clad printed board of BT resin (manufactured by Mitsubishi Gas Chemical Co., Ltd.) (Figs. 13 (a) and 13 (b)), and chemical copper was formed on the entire surface. FIG. 13 (c), which is plated.

Next, a film resist was formed, and a via-cut pattern was formed in a desired shape by exposure and development, then a via was formed by electrolytic copper plating and the resist was peeled off (FIG. 13 (d)). .

Further, an electrodeposition resist was formed into a film, and a resist-remaining pattern was formed into a desired shape by exposure / development, and then the surface copper was patterned by etching to remove the resist (FIG. 13 (e)). .

After that, a solvent-free fluid polymer precursor containing a polyimide filler and a tetrafunctional epoxy resin system and a novolac resin was applied to the gap between the copper conductors including the through holes with a precision metering device, After heating under reduced pressure in the mold, pressure was applied from above and below with a flat plate.

Next, this precursor is heated and cured while applying hydrostatic pressure to form an insulating film, and the surface of the via copper conductor is slightly covered with the insulating film. Therefore, etching is performed with an alkaline permanganate-based etching solution. The copper conductor surface was exposed by removing it and the insulating film surface was roughened (FIG. 13).
(F)).

Then, a base copper conductive film (not shown) was formed by flash plating. Then, a film resist is formed, a pattern for wiring is formed in a desired shape by exposure and development, copper is formed by electrolytic copper plating, and a film resist is further formed on this, and exposure and development are performed. To form a via removal pattern in the desired shape, form copper by electrolytic copper plating, remove the two layers of resist, and then remove the unnecessary underlying conductive film by etching to remove the copper wiring and vias. Formed (FIG. 13 (g)).

After repeating the steps from the deposition of the filler-containing solventless fluid polymer precursor to the etching of the underlying copper conductive film, the filler-containing solventless fluid polymer precursor was further added. The steps from the deposition to the exposure of the copper surface were performed to prepare a multilayer wiring board having a total of 6 layers, each having two laminated thin film layers on both sides of the double-sided copper-clad printed board.

The double-sided printed wiring board used as the core is shown in FIG.
As shown in FIG. 5 (b), in the densest part, the grid pitch dp is 635 μm, the through-plated through hole has a drill diameter dr of 300 μm, and a land width wld is 100 μm. One land was expanded by taking a distance dq of about 100 μm away from the three lands. Then, a columnar via having a diameter dpld of 55 μm is formed on this land, that is, a pad, the pad diameter on which the via in the outer wiring layer rides is 145 μm, the pad pitch dlp is 635 μm, and the line width w between these pads
Four wirings each having a width of 55 μm and a space width ws of 55 μm were formed, and the interlayer connection had a staggered structure.

In the process of manufacturing this multilayer wiring board, thermal vias are formed as shown in FIG. 8A, the bare chip and the board on one surface are made of silver paste, and the bare chip and the pad of the board are made of solder. Connection was made with balls, and solder balls were formed on the thermal vias and pads on the back surface, and the structure as shown in FIG. 5 was introduced into the multichip module and the semiconductor package.

<Embodiment 3> In the same manner as in Embodiment 2, the double-sided printed wiring board to be the core is the highest density portion,
The grid pitch dp is 600 μm, the through-plated through holes have a drill diameter dr of 300 μm, and the land width Wld is 100 μm.
μm, and 3 at the center of 4 through-plated through holes
The distance dq away from one land is about 100 μm,
Expanded one land. Then, a columnar via having a diameter of 55 μm is formed on this land, that is, a pad, the pad diameter on which the via in the outer wiring layer rides is 145 μm, and the pad pitch is 424 μm, that is, the center position of the four through-plated through holes filled with holes. In the lattice formed by both of the central positions of the lattice formed by these central positions, the line width wl is 55 μm and the space width ws is 55 μm between the pads.
Example 2 is a sequentially laminated thin film layer in which two wirings are formed.
A multi-chip module and a semiconductor package similar to the above were formed.

<Embodiment 4> In the manufacturing process of a multilayer wiring board similar to that of Embodiment 1, wall vias as shown in FIG. 10 (b) are formed to form a receiving system of a mobile radio terminal as shown in FIG. We have manufactured a circuit board that separates the transmission system, logic system, and wireless system.

<Fifth Embodiment> In the manufacturing process of a multilayer wiring board similar to that of the second embodiment, wall vias as shown in FIG. 10A are formed to form a receiving system of a mobile radio terminal as shown in FIG. We have manufactured a circuit board that separates the transmission system, logic system, and wireless system.

Example 6 A multilayer wiring board similar to that of Example 1 was used in which a BT resin prepreg thermoset material was used as a base substrate instead of the double-sided copper-clad printed board of BT resin (Mitsubishi Gas Chemical Co., Ltd.). Was manufactured in the same manner as in Example 1.

Example 7 A multilayer wiring board similar to that of Example 2 was prepared by using a BT resin double-sided copper-clad printed board (manufactured by Mitsubishi Gas Chemical Co., Inc.) as a base substrate instead of a BT resin prepreg. Was manufactured in the same manner as in Example 2.

Example 8 Instead of the double-sided copper-clad printed board of BT resin (manufactured by Mitsubishi Gas Chemical Co., Inc.), a material obtained by thermosetting a prepreg of BT resin was used as a base substrate, and instead of chemical copper plating on the entire surface, Using direct plating, a multilayer wiring board similar to that in Example 1 was produced in the same manner as in Example 1.

Example 9 Instead of the double-sided copper-clad printed board of BT resin (manufactured by Mitsubishi Gas Chemical Co., Inc.), a material obtained by thermosetting a prepreg of BT resin was used as a base substrate, and instead of chemical copper plating on the entire surface, A multilayer wiring board similar to that in Example 2 was manufactured by using direct plating in the same manner as in Example 2.

Example 10 In Example 1, the insulating film slightly remaining on the copper conductor surface was removed by an alkaline permanganate-based etching solution to expose the copper conductor surface.
Then, it was immersed in a mixed solution of ethylenediamine and hydrazine hydrate to decompose the polyimide filler and roughen the surface of the insulating film.

Example 11 In Example 2, the insulating film slightly remaining on the via copper conductor surface was removed with an alkaline permanganate-based etching solution to expose the copper conductor surface. Then, it was immersed in a mixed solution of ethylenediamine and hydrazine hydrate to decompose the polyimide filler and roughen the surface of the insulating film.

Example 12 In Example 1, the insulating film slightly remaining on the copper conductor surface was removed with an alkaline permanganate-based etching solution to expose the copper conductor surface.
Then, it was immersed in a mixed solution of N-methyl-2-pyrrolidone and a halogenated phenol to dissolve the polyimide filler to roughen the surface of the insulating film.

Example 13 In Example 2, the insulating film slightly remaining on the via copper conductor surface was removed by an alkaline permanganate-based etching solution to expose the copper conductor surface. Then, it was immersed in a mixed solution of N-methyl-2-pyrrolidone and a halogenated phenol to dissolve the polyimide filler to roughen the surface of the insulating film.

[0143]

According to the present invention, even when a through-plated through-hole for connecting both sides of a double-sided printed wiring board to be a core is formed, an insulating film and a copper film formed on the outside of the through-plated through-hole are formed. It is possible to provide a multilayer wiring board having a structure that maximizes the ability to form wiring with high density in the sequentially laminated thin film layers, and a semiconductor device using the same. In particular, even if the through holes are formed so densely that wiring cannot be formed on the surface of the double-sided printed wiring board that will be the core,
It is possible to provide a multilayer wiring board having a structure in which wiring can be formed on a conductor layer of a sequentially laminated thin film layer formed on the outside thereof, and a semiconductor device using the same.

Further, according to the present invention, it is possible to provide a multilayer wiring board having a structure excellent in heat dissipation and a semiconductor device using the same.

Further, according to the present invention, it is possible to provide a multilayer wiring board having excellent high frequency characteristics and a semiconductor device using the same.

Further, according to the present invention, there is provided a method for manufacturing the above substrate with high reliability and at low cost.
In particular, it is possible to provide a method for manufacturing a multilayer wiring board having excellent adhesion strength between an insulating film and a base conductive film.

[Brief description of drawings]

FIG. 1 is a view showing a structure of a land and a via of a multilayer wiring board according to the present invention, FIG. 1A is a perspective view of the land and the via, and FIG. 1B is a sectional view taken along the line AA ′ of FIG. is there.

FIG. 2 is a schematic diagram showing a top view of a surface layer of a double-sided printed wiring board that serves as a core.

FIG. 3 is a schematic top view showing an example of a wiring pattern of a wiring layer formed above and below a surface layer of a double-sided printed wiring board which is a core.

FIG. 4 schematically shows a top view of an example of a wiring pattern of a wiring layer formed above and below a surface layer of a double-sided printed wiring board which becomes a core.

FIG. 5 is a cross-sectional view of a semiconductor device using a multilayer wiring board of the present invention having two semiconductors or semiconductor packages mounted on the upper surface.

FIG. 6 is a cross-sectional view of a semiconductor device to which a lead frame is attached using the multilayer wiring board of the present invention in which one semiconductor or semiconductor package is mounted on each of the upper surface and the lower surface.

FIG. 7 is a cross-sectional view of a multilayer wiring board having excellent heat dissipation characteristics, in which one through-hole corresponds to one columnar copper body.

FIG. 8 is a cross-sectional view of a multilayer wiring board having excellent heat dissipation characteristics, in which one columnar copper body is made to correspond to a plurality of through holes.

9 is a cross-sectional view of a semiconductor device having excellent heat dissipation characteristics formed using the substrate of FIG. 8 (a).

FIG. 10 is a perspective view of a multilayer wiring board according to the present invention having excellent high frequency characteristics.

FIG. 11 is a top view of a semiconductor device having excellent high frequency characteristics.

FIG. 12 is a view showing a cross-sectional view of the multilayer wiring board according to each step of the manufacturing method of the method B of the method for manufacturing a multilayer wiring board according to the present invention.

FIG. 13 is a diagram showing a cross-sectional view of the multilayer wiring board according to the manufacturing steps of the method A of the method for manufacturing a multilayer wiring board according to the present invention.

FIG. 14 is a cross-sectional view showing an aspect of an insulating film, a filler, and a base conductive film.

FIG. 15 is a top view for displaying each scale of the multilayer wiring board.

[Explanation of symbols]

101, 703 ... Lands of through-plated through holes filled with holes 102, 205 ... Expanded portions 103, 206 of through-plated through hole lands filled with vias 201, 202, 203, 204, 303, 304, 3
05, 306, 702, 802, 904 ... Filled through-plated through holes 301 ... Wirings 302, 401, 402, 403, 404, 405, 5 of sequentially laminated thin film layers
02, 503, 602, 603 ... Pad α: Through-hole grid β, γ of double-sided printed wiring board serving as cores ... Lattice 501, 601 of sequentially laminated thin film layers ... Multi-layer wiring boards 504, 505, 604, 605, 902 ... Semiconductor or semiconductor package 506, 507, 606 ... Solder ball 607 ... Lead frame 701 ... Double-sided printed boards 704, 804 ... Hole-filled through-plated through-holes 705, 803, 805, 901, 905 ... Copper 903, 906 ... Good heat conductor 1001 ... Wiring 1002 ... Insulating layers 1003, 1004, 1103 ... Ground layer 1101 ... Board 1102 ... Electric circuit 1201, 1301 ... Double-sided copper-clad printed board 1202, 1302 ... Drill holes 1203, 1204, 1209, 1303 1304,
1305, 1308, 1309 ... Copper bodies 1205, 1306, 1310, 1401 ... Insulating films 1206, 1307, 1311 ... Copper conductor surface 1207 ... Interlayer insulating film 1208 ... Via holes 1402 ... Filler 1403 ... Base conductive film dp ... Through hole grid pitch dr ... drill diameter wld ... land width dq ... distance from three lands db ... diameter of photo via hole bottom dlp ... pad pitch dpld ... stud via diameter wl ... line width ws ... space width

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Chie Yoshizawa 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Inside the Hitachi, Ltd. Institute of Industrial Science (72) Masayuki Kyoi 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Production Engineering Laboratory, Hitachi, Ltd. (72) Hideho Yamamura, 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Production Engineering Laboratory, Hitachi, Ltd. (72) Kunio Matsumoto 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Address: Production Technology Laboratory, Hitachi, Ltd. (56) Reference JP-A-3-142896 (JP, A) JP-A-5-299878 (JP, A) JP-A-7-283538 (JP, A) 3-85686 (JP, U) (58) Fields investigated (Int.Cl. ⁷ , DB name) H05K 3/46 H01L 23/12 H05K 1/11 H05K 3/38 H05K 3/40

Claims (14)

(57) [Claims] 1. A multilayer wiring board having a core double-sided printed board and a wiring layer formed on or under the core, wherein the core double-sided printed board is arranged in a grid pattern and filled with holes. Through-plated through holes, and vias arranged between the grids formed by the through-plated through holes and connected to the wiring layer. The through-plated through holes and the vias are the through-plated through holes. A multi-layered structure which is present at the periphery of the through hole and is partially electrically connected by a land extended to the position of a via arranged between the grids formed by the through-plated through hole. Wiring board. 2. The core double-sided printed board has at least four through-plated through holes filled with holes, up to a central position of a lattice formed by the central positions of the four filled through-hole plated through holes. The multilayer wiring board according to claim 1, wherein the extension land portion is extended. 3. In the wiring layer formed on or below the double-sided printed board which becomes the core, the via pad positions are the center positions of four through-plated through holes filled with holes, and the grid formed by these center positions. 3. The multilayer wiring board according to claim 1, wherein either one or both of the central positions is provided. 4. The multilayer wiring board according to claim 3, wherein pads are provided on both sides of the grid, and one or more semiconductors or semiconductor packages are connected to the pads on one surface of the multilayer wiring board. A conductor for connecting to another multilayer wiring board is formed on the pad on the other side, or one or more semiconductors or semiconductor packages on each side are formed on the pads on both sides of the multilayer wiring board. And a conductor for connecting to another multilayer wiring board is formed on a pad on one surface of the multilayer wiring board. 5. (1) Drilling a double-sided copper-clad printed board,
Step of plating copper on the entire surface, (2) Step of forming a resist removal pattern in a desired shape, plating copper for via, and peeling the resist, (3) Forming a resist remaining pattern in a desired shape After the formation, a step of patterning the surface copper and peeling the resist, (4) a mold having flat surfaces is provided on both surfaces of the substrate, and a filler-containing solventless fluidity is provided between the substrate and the mold. A step of supplying a polymer precursor; (5) a step of evacuating the space between the mold and the substrate; (6) a mold containing a solvent-free fluid polymer precursor containing a filler, which is moved toward the substrate. Filling the gap between the copper conductors on the substrate, (7) applying a predetermined hydrostatic pressure to the precursor, (8) curing the precursor under hydrostatic pressure, (9) via copper conductor A step of exposing the surface, (10) the vi A step of forming an underlying conductive film to be connected to a copper conductor, (11) a step of forming a resist removal pattern in a desired shape and then forming a wiring copper conductor by plating, (12) a resist removal pattern in a desired shape And forming a via copper conductor by plating, (13) removing the two-layer resist, (14) etching an unnecessary underlying conductive film, and (1) to (3) above. ) Are performed in this order, and then the steps (4) to (14) are repeated in this order to form a multilayer wiring board, wherein the filler-containing solventless fluid polymer precursor is used. A method of manufacturing a multilayer wiring board, comprising: 6. The multilayer according to claim 5 , wherein in the step (9), which is a step of exposing the surface of the copper conductor, the filler is decomposed or dissolved by a chemical solution to roughen the surface of the insulating film. Wiring board manufacturing method. 7. The filler is polyimide, the solvent-free fluid polymer precursor is a composition of a polyfunctional epoxy resin and a novolac resin, and the chemical liquid is (a) an alkaline aqueous solution, (b) ethylenediamine. And a hydrazine hydrate mixed solution, (c) one of N-methyl-2-pyrrolidone or a halogenated phenol, or both, one selected from the above (a) to (c) 7. The method for manufacturing a multilayer wiring board according to claim 6, wherein 8. The method for manufacturing a multilayer wiring board according to claim 5 , wherein an insulating substrate is used instead of the double-sided copper-clad printed board. 9. The method for manufacturing a multilayer wiring board according to claim 8 , wherein the insulating substrate is a substrate obtained by curing a prepreg material. 10. A step of (1) forming a hole in a double-sided copper-clad printed board and copper-plating the entire surface, (2) forming a resist residual pattern in a desired shape, etching the surface copper, and peeling the resist. A step (3) a step of installing molds having flat surfaces on both surfaces of the substrate, and supplying a filler-containing solventless fluid polymer precursor between the substrate and the mold, (4) the mold A step of evacuating between the mold and the substrate; (5) a step of moving the mold in the direction of the substrate to fill a solvent-free flowable polymer precursor containing filler into a copper conductor gap on the substrate; (6) applying a predetermined hydrostatic pressure to the precursor, (7) curing the precursor under hydrostatic pressure, (8) exposing the surface copper conductor surface, (9) forming an insulating film After that, a via hole is formed at a desired position of the insulating film. (10) forming a via copper conductor and a wiring copper conductor by plating, the steps (1) to (8) are performed in this order, and then the steps (9) to (10) are performed. In the method for producing a multilayer wiring board in which the steps are repeated in this order to form a multilayer, the filler-containing solventless fluid polymer precursor is heated and melted, and the solution is supplied onto the board by a precision metering device. Method for manufacturing multilayer wiring board. Wherein said is a step of exposing the copper conductor surface (8), the filler is decomposed or dissolved by a chemical solution according to claim 10, multilayer, wherein the said insulating layer surface roughening Wiring board manufacturing method. 12. The filler is polyimide, the solvent-free fluid polymer precursor is a composition of a polyfunctional epoxy resin and a novolac resin, and the chemical liquid is (a) an alkaline aqueous solution, (b) ethylenediamine. And a hydrazine hydrate mixed solution, (c) one of N-methyl-2-pyrrolidone or a halogenated phenol, or both, one selected from the above (a) to (c) The method for manufacturing a multilayer wiring board according to claim 11, wherein: 13. Instead of the double-sided copper-clad printed board,
The method for manufacturing a multilayer wiring board according to claim 10 , wherein an insulating board is used. 14. The method for manufacturing a multilayer wiring board according to claim 13 , wherein the insulating substrate is a substrate obtained by curing a prepreg material.