JP2003209178A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JP2003209178A
JP2003209178A JP2002005920A JP2002005920A JP2003209178A JP 2003209178 A JP2003209178 A JP 2003209178A JP 2002005920 A JP2002005920 A JP 2002005920A JP 2002005920 A JP2002005920 A JP 2002005920A JP 2003209178 A JP2003209178 A JP 2003209178A
Authority
JP
Japan
Prior art keywords
wiring
circuit
semiconductor device
block
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002005920A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003209178A5 (OSRAM
Inventor
Toshiyuki Matsubara
利之 松原
Hideo Matsui
秀夫 松井
Hiroki Takahashi
裕樹 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2002005920A priority Critical patent/JP2003209178A/ja
Priority to US10/171,599 priority patent/US6621171B2/en
Priority to DE10236877A priority patent/DE10236877A1/de
Priority to KR10-2002-0056033A priority patent/KR100463945B1/ko
Publication of JP2003209178A publication Critical patent/JP2003209178A/ja
Publication of JP2003209178A5 publication Critical patent/JP2003209178A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP2002005920A 2002-01-15 2002-01-15 半導体装置 Pending JP2003209178A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2002005920A JP2003209178A (ja) 2002-01-15 2002-01-15 半導体装置
US10/171,599 US6621171B2 (en) 2002-01-15 2002-06-17 Semiconductor device having a wire laid between pads
DE10236877A DE10236877A1 (de) 2002-01-15 2002-08-12 Halbleitervorrichtung mit einer zwischen Kontaktflächen angeordneten Leiterbahn
KR10-2002-0056033A KR100463945B1 (ko) 2002-01-15 2002-09-16 반도체 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002005920A JP2003209178A (ja) 2002-01-15 2002-01-15 半導体装置

Publications (2)

Publication Number Publication Date
JP2003209178A true JP2003209178A (ja) 2003-07-25
JP2003209178A5 JP2003209178A5 (OSRAM) 2005-08-04

Family

ID=19191164

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002005920A Pending JP2003209178A (ja) 2002-01-15 2002-01-15 半導体装置

Country Status (4)

Country Link
US (1) US6621171B2 (OSRAM)
JP (1) JP2003209178A (OSRAM)
KR (1) KR100463945B1 (OSRAM)
DE (1) DE10236877A1 (OSRAM)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003099414A (ja) * 2001-09-21 2003-04-04 Mitsubishi Electric Corp 半導体集積回路

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6166403A (en) * 1997-11-12 2000-12-26 Lsi Logic Corporation Integrated circuit having embedded memory with electromagnetic shield
JP2000077609A (ja) * 1998-08-28 2000-03-14 Hitachi Ltd 半導体集積回路装置
KR100688476B1 (ko) * 2000-05-31 2007-03-08 삼성전자주식회사 칩 면적을 줄이기 위한 레이아웃 구조를 갖는 고속 메모리장치

Also Published As

Publication number Publication date
KR100463945B1 (ko) 2004-12-30
US6621171B2 (en) 2003-09-16
DE10236877A1 (de) 2003-07-24
US20030132532A1 (en) 2003-07-17
KR20030062209A (ko) 2003-07-23

Similar Documents

Publication Publication Date Title
US6748577B2 (en) System for simplifying the programmable memory to logic interface in FPGA
JPH06350436A (ja) フィールドプログラマブルゲートアレイ
JP3269526B2 (ja) プログラマブルロジックｌｓｉ
US10762019B2 (en) Bus sharing scheme
US20130328589A1 (en) Semiconductor device based on power gating in multilevel wiring structure
JP3672889B2 (ja) 半導体集積回路とそのレイアウト方法
JP2006310840A (ja) プログラマブルな入出力ポートを備えたマスク−プログラマブルロジックデバイス
JP5335899B2 (ja) 単一の集積回路ダイ上で異なるゲート酸化膜厚を使用して複数の集積回路を実装するための装置
KR0172426B1 (ko) 반도체 메모리장치
JP4386512B2 (ja) マクロブロック、および記録媒体
JP2003209178A (ja) 半導体装置
JP2004158752A (ja) メモリマクロおよび半導体集積回路
CN103383543A (zh) 片上系统及其控制模块
JP5170079B2 (ja) コンフィギュラブル回路およびコンフィギュレーション方法
US5603048A (en) Microprocessor with bus sizing function
US7187203B1 (en) Cascadable memory
JP2985787B2 (ja) 半導体集積回路
JP2005005496A (ja) 半導体集積回路および半導体集積回路ブロック
JP2000082745A (ja) 半導体装置
JP4453271B2 (ja) コンピュータシステム及びメモリの接続方法
JP3660184B2 (ja) 論理セル
JPH11265998A (ja) 半導体装置の製造方法及び半導体装置
JP2002134621A (ja) マスクデータ合成方法、マスクデータ検証方法及び半導体集積装置
JP3161370B2 (ja) ポート兼用回路
JPH05291540A (ja) 半導体集積回路

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050106

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050106

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070425

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070508

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20070911