JP2003023000A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JP2003023000A
JP2003023000A JP2001210149A JP2001210149A JP2003023000A JP 2003023000 A JP2003023000 A JP 2003023000A JP 2001210149 A JP2001210149 A JP 2001210149A JP 2001210149 A JP2001210149 A JP 2001210149A JP 2003023000 A JP2003023000 A JP 2003023000A
Authority
JP
Japan
Prior art keywords
insulating film
etching
gas
manufacturing
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2001210149A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003023000A5 (enExample
Inventor
Nobuyuki Negishi
伸幸 根岸
Masaru Izawa
勝 伊澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2001210149A priority Critical patent/JP2003023000A/ja
Priority to KR1020010046814A priority patent/KR100762524B1/ko
Priority to TW090119543A priority patent/TW511163B/zh
Priority to US09/928,500 priority patent/US6645870B2/en
Publication of JP2003023000A publication Critical patent/JP2003023000A/ja
Publication of JP2003023000A5 publication Critical patent/JP2003023000A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2001210149A 2001-07-11 2001-07-11 半導体装置の製造方法 Withdrawn JP2003023000A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2001210149A JP2003023000A (ja) 2001-07-11 2001-07-11 半導体装置の製造方法
KR1020010046814A KR100762524B1 (ko) 2001-07-11 2001-08-02 반도체장치의 제조방법
TW090119543A TW511163B (en) 2001-07-11 2001-08-09 Manufacturing method of semiconductor device
US09/928,500 US6645870B2 (en) 2001-07-11 2001-08-14 Process for fabricating semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001210149A JP2003023000A (ja) 2001-07-11 2001-07-11 半導体装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007106656A Division JP4577328B2 (ja) 2007-04-16 2007-04-16 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2003023000A true JP2003023000A (ja) 2003-01-24
JP2003023000A5 JP2003023000A5 (enExample) 2005-03-03

Family

ID=19045667

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001210149A Withdrawn JP2003023000A (ja) 2001-07-11 2001-07-11 半導体装置の製造方法

Country Status (4)

Country Link
US (1) US6645870B2 (enExample)
JP (1) JP2003023000A (enExample)
KR (1) KR100762524B1 (enExample)
TW (1) TW511163B (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007502543A (ja) * 2003-08-11 2007-02-08 アクセリス テクノロジーズ インコーポレーテッド プラズマアッシング方法
JP2009200182A (ja) * 2008-02-20 2009-09-03 Tokyo Electron Ltd 付着物除去方法及び基板処理方法
JP2012114156A (ja) * 2010-11-22 2012-06-14 Ulvac Japan Ltd 圧電素子の製造方法
US8440568B2 (en) 2009-03-19 2013-05-14 Tokyo Electron Limited Substrate etching method and system
JP2013125796A (ja) * 2011-12-13 2013-06-24 Hitachi High-Technologies Corp プラズマ処理方法および装置
JP2022520190A (ja) * 2019-02-08 2022-03-29 アプライド マテリアルズ インコーポレイテッド 半導体構造をエッチングするための方法及び装置

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7157314B2 (en) 1998-11-16 2007-01-02 Sandisk Corporation Vertically stacked field programmable nonvolatile memory and method of fabrication
US8575719B2 (en) 2000-04-28 2013-11-05 Sandisk 3D Llc Silicon nitride antifuse for use in diode-antifuse memory arrays
US20040108573A1 (en) * 2002-03-13 2004-06-10 Matrix Semiconductor, Inc. Use in semiconductor devices of dielectric antifuses grown on silicide
DE10226603A1 (de) * 2002-06-14 2004-01-08 Infineon Technologies Ag Verfahren zum Strukturieren einer Siliziumschicht sowie dessen Verwendung zur Herstellung einer integrierten Halbleiterschaltung
JP2006351887A (ja) * 2005-06-17 2006-12-28 Hitachi High-Technologies Corp プラズマ処理装置
US7700492B2 (en) * 2005-06-22 2010-04-20 Tokyo Electron Limited Plasma etching method and apparatus, control program and computer-readable storage medium storing the control program
KR20100046909A (ko) * 2008-10-28 2010-05-07 주성엔지니어링(주) 정전 흡착 장치와 그의 제조방법
KR101496149B1 (ko) * 2008-12-08 2015-02-26 삼성전자주식회사 결정질 실리콘 제조 방법
JP2010272758A (ja) * 2009-05-22 2010-12-02 Hitachi High-Technologies Corp 被エッチング材のプラズマエッチング方法
WO2014092856A1 (en) 2012-12-14 2014-06-19 The Penn State Research Foundation Ultra-high speed anisotropic reactive ion etching
JP6573325B2 (ja) * 2013-12-17 2019-09-11 東京エレクトロン株式会社 プラズマ密度を制御するシステムおよび方法
US10395896B2 (en) 2017-03-03 2019-08-27 Applied Materials, Inc. Method and apparatus for ion energy distribution manipulation for plasma processing chambers that allows ion energy boosting through amplitude modulation
JP2019050305A (ja) * 2017-09-11 2019-03-28 東芝メモリ株式会社 プラズマエッチング方法、及び、半導体装置の製造方法
US11195923B2 (en) * 2018-12-21 2021-12-07 Applied Materials, Inc. Method of fabricating a semiconductor device having reduced contact resistance

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5292393A (en) 1986-12-19 1994-03-08 Applied Materials, Inc. Multichamber integrated process system
JPH04286115A (ja) 1991-03-15 1992-10-12 Fujitsu Ltd 半導体装置の製造方法
US6036878A (en) * 1996-02-02 2000-03-14 Applied Materials, Inc. Low density high frequency process for a parallel-plate electrode plasma reactor having an inductive antenna
JPH11145282A (ja) * 1997-11-06 1999-05-28 Nec Corp エッチング方法
JPH11251294A (ja) * 1998-02-27 1999-09-17 Sony Corp 半導体装置の製造方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007502543A (ja) * 2003-08-11 2007-02-08 アクセリス テクノロジーズ インコーポレーテッド プラズマアッシング方法
JP2009200182A (ja) * 2008-02-20 2009-09-03 Tokyo Electron Ltd 付着物除去方法及び基板処理方法
US8440568B2 (en) 2009-03-19 2013-05-14 Tokyo Electron Limited Substrate etching method and system
JP2012114156A (ja) * 2010-11-22 2012-06-14 Ulvac Japan Ltd 圧電素子の製造方法
JP2013125796A (ja) * 2011-12-13 2013-06-24 Hitachi High-Technologies Corp プラズマ処理方法および装置
JP2022520190A (ja) * 2019-02-08 2022-03-29 アプライド マテリアルズ インコーポレイテッド 半導体構造をエッチングするための方法及び装置
JP7259061B2 (ja) 2019-02-08 2023-04-17 アプライド マテリアルズ インコーポレイテッド 半導体構造をエッチングするための方法及び装置

Also Published As

Publication number Publication date
TW511163B (en) 2002-11-21
US20030013313A1 (en) 2003-01-16
US6645870B2 (en) 2003-11-11
KR20030006872A (ko) 2003-01-23
KR100762524B1 (ko) 2007-10-01

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