KR100762524B1 - 반도체장치의 제조방법 - Google Patents

반도체장치의 제조방법 Download PDF

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Publication number
KR100762524B1
KR100762524B1 KR1020010046814A KR20010046814A KR100762524B1 KR 100762524 B1 KR100762524 B1 KR 100762524B1 KR 1020010046814 A KR1020010046814 A KR 1020010046814A KR 20010046814 A KR20010046814 A KR 20010046814A KR 100762524 B1 KR100762524 B1 KR 100762524B1
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South Korea
Prior art keywords
etching
insulating film
gas
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semiconductor
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KR1020010046814A
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English (en)
Korean (ko)
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KR20030006872A (ko
Inventor
네기시노부유키
이자와마사루
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가부시키가이샤 히타치세이사쿠쇼
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020010046814A 2001-07-11 2001-08-02 반도체장치의 제조방법 Expired - Lifetime KR100762524B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2001-00210149 2001-07-11
JP2001210149A JP2003023000A (ja) 2001-07-11 2001-07-11 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR20030006872A KR20030006872A (ko) 2003-01-23
KR100762524B1 true KR100762524B1 (ko) 2007-10-01

Family

ID=19045667

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020010046814A Expired - Lifetime KR100762524B1 (ko) 2001-07-11 2001-08-02 반도체장치의 제조방법

Country Status (4)

Country Link
US (1) US6645870B2 (enExample)
JP (1) JP2003023000A (enExample)
KR (1) KR100762524B1 (enExample)
TW (1) TW511163B (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6483736B2 (en) 1998-11-16 2002-11-19 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US8575719B2 (en) 2000-04-28 2013-11-05 Sandisk 3D Llc Silicon nitride antifuse for use in diode-antifuse memory arrays
US6951823B2 (en) * 2001-05-14 2005-10-04 Axcelis Technologies, Inc. Plasma ashing process
US20040108573A1 (en) * 2002-03-13 2004-06-10 Matrix Semiconductor, Inc. Use in semiconductor devices of dielectric antifuses grown on silicide
DE10226603A1 (de) * 2002-06-14 2004-01-08 Infineon Technologies Ag Verfahren zum Strukturieren einer Siliziumschicht sowie dessen Verwendung zur Herstellung einer integrierten Halbleiterschaltung
JP2006351887A (ja) * 2005-06-17 2006-12-28 Hitachi High-Technologies Corp プラズマ処理装置
US7700492B2 (en) * 2005-06-22 2010-04-20 Tokyo Electron Limited Plasma etching method and apparatus, control program and computer-readable storage medium storing the control program
JP5179219B2 (ja) * 2008-02-20 2013-04-10 東京エレクトロン株式会社 付着物除去方法及び基板処理方法
KR20100046909A (ko) * 2008-10-28 2010-05-07 주성엔지니어링(주) 정전 흡착 장치와 그의 제조방법
KR101496149B1 (ko) * 2008-12-08 2015-02-26 삼성전자주식회사 결정질 실리콘 제조 방법
JP4968861B2 (ja) 2009-03-19 2012-07-04 東京エレクトロン株式会社 基板のエッチング方法及びシステム
JP2010272758A (ja) * 2009-05-22 2010-12-02 Hitachi High-Technologies Corp 被エッチング材のプラズマエッチング方法
JP2012114156A (ja) * 2010-11-22 2012-06-14 Ulvac Japan Ltd 圧電素子の製造方法
JP2013125796A (ja) * 2011-12-13 2013-06-24 Hitachi High-Technologies Corp プラズマ処理方法および装置
WO2014092856A1 (en) * 2012-12-14 2014-06-19 The Penn State Research Foundation Ultra-high speed anisotropic reactive ion etching
US10002744B2 (en) * 2013-12-17 2018-06-19 Tokyo Electron Limited System and method for controlling plasma density
US10395896B2 (en) 2017-03-03 2019-08-27 Applied Materials, Inc. Method and apparatus for ion energy distribution manipulation for plasma processing chambers that allows ion energy boosting through amplitude modulation
JP2019050305A (ja) * 2017-09-11 2019-03-28 東芝メモリ株式会社 プラズマエッチング方法、及び、半導体装置の製造方法
US11195923B2 (en) * 2018-12-21 2021-12-07 Applied Materials, Inc. Method of fabricating a semiconductor device having reduced contact resistance
US10593518B1 (en) * 2019-02-08 2020-03-17 Applied Materials, Inc. Methods and apparatus for etching semiconductor structures

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11145282A (ja) * 1997-11-06 1999-05-28 Nec Corp エッチング方法
JPH11251294A (ja) * 1998-02-27 1999-09-17 Sony Corp 半導体装置の製造方法
US6036878A (en) * 1996-02-02 2000-03-14 Applied Materials, Inc. Low density high frequency process for a parallel-plate electrode plasma reactor having an inductive antenna

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5292393A (en) 1986-12-19 1994-03-08 Applied Materials, Inc. Multichamber integrated process system
JPH04286115A (ja) 1991-03-15 1992-10-12 Fujitsu Ltd 半導体装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6036878A (en) * 1996-02-02 2000-03-14 Applied Materials, Inc. Low density high frequency process for a parallel-plate electrode plasma reactor having an inductive antenna
JPH11145282A (ja) * 1997-11-06 1999-05-28 Nec Corp エッチング方法
JPH11251294A (ja) * 1998-02-27 1999-09-17 Sony Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
KR20030006872A (ko) 2003-01-23
JP2003023000A (ja) 2003-01-24
US20030013313A1 (en) 2003-01-16
US6645870B2 (en) 2003-11-11
TW511163B (en) 2002-11-21

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