JP2002506250A - バス間ブリッジの性能最適化のためのトリガ・ポイント - Google Patents

バス間ブリッジの性能最適化のためのトリガ・ポイント

Info

Publication number
JP2002506250A
JP2002506250A JP2000534945A JP2000534945A JP2002506250A JP 2002506250 A JP2002506250 A JP 2002506250A JP 2000534945 A JP2000534945 A JP 2000534945A JP 2000534945 A JP2000534945 A JP 2000534945A JP 2002506250 A JP2002506250 A JP 2002506250A
Authority
JP
Japan
Prior art keywords
bridge
bus
queue
data
target
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000534945A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002506250A5 (enExample
Inventor
デイビス，バリー・アール
エスカンダリ，ニック・ジイ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of JP2002506250A publication Critical patent/JP2002506250A/ja
Publication of JP2002506250A5 publication Critical patent/JP2002506250A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
    • G06F13/4054—Coupling between buses using bus bridges where the bridge performs a synchronising function where the function is bus cycle extension, e.g. to meet the timing requirements of the target bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Bus Control (AREA)
JP2000534945A 1998-03-04 1999-02-26 バス間ブリッジの性能最適化のためのトリガ・ポイント Pending JP2002506250A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/034,624 1998-03-04
US09/034,624 US6298407B1 (en) 1998-03-04 1998-03-04 Trigger points for performance optimization in bus-to-bus bridges
PCT/US1999/004234 WO1999045470A2 (en) 1998-03-04 1999-02-26 Trigger points for performance optimization in bridges

Publications (2)

Publication Number Publication Date
JP2002506250A true JP2002506250A (ja) 2002-02-26
JP2002506250A5 JP2002506250A5 (enExample) 2006-04-20

Family

ID=21877567

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000534945A Pending JP2002506250A (ja) 1998-03-04 1999-02-26 バス間ブリッジの性能最適化のためのトリガ・ポイント

Country Status (6)

Country Link
US (1) US6298407B1 (enExample)
JP (1) JP2002506250A (enExample)
KR (1) KR20010041519A (enExample)
AU (1) AU2793599A (enExample)
DE (1) DE19983026B4 (enExample)
WO (1) WO1999045470A2 (enExample)

Cited By (1)

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US7895375B2 (en) 2007-02-13 2011-02-22 Fujitsu Limited Data transfer apparatus and data transfer method

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US6584539B1 (en) * 1999-03-19 2003-06-24 Sony Corporation Method and system for message broadcast flow control on a bus bridge interconnect
US6581125B1 (en) * 1999-05-14 2003-06-17 Koninklijke Philips Electronics N.V. PCI bridge having latency inducing serial bus
US6625683B1 (en) * 1999-08-23 2003-09-23 Advanced Micro Devices, Inc. Automatic early PCI transaction retry
US6742074B2 (en) * 1999-08-31 2004-05-25 Micron Technology, Inc. Bus to system memory delayed read processing
US6801954B1 (en) * 2000-02-25 2004-10-05 Hewlett-Packard Development Company, L.P. Method and apparatus to concurrently operate on multiple data movement transactions in a disk array subsystem
US6807590B1 (en) * 2000-04-04 2004-10-19 Hewlett-Packard Development Company, L.P. Disconnecting a device on a cache line boundary in response to a write command
US6965939B2 (en) * 2001-01-05 2005-11-15 International Business Machines Corporation Method and apparatus for processing requests in a network data processing system based on a trust association between servers
US8041739B2 (en) * 2001-08-31 2011-10-18 Jinan Glasgow Automated system and method for patent drafting and technology assessment
JP2003108514A (ja) * 2001-10-01 2003-04-11 Matsushita Electric Ind Co Ltd バスブリッジ
ATE367610T1 (de) * 2001-12-07 2007-08-15 Renesas Technology Europ Ltd Busbrücke mit einem burst-übertragungsmodebus und einem einzel-übertragungsmodebus
US20040003164A1 (en) * 2002-06-27 2004-01-01 Patrick Boily PCI bridge and data transfer methods
US7103701B2 (en) * 2002-09-23 2006-09-05 Hewlett-Packard Development Company, L.P. Memory bus interface
US6950905B2 (en) * 2003-02-20 2005-09-27 Sun Microsystems, Inc. Write posting memory interface with block-based read-ahead mechanism
WO2004081803A1 (en) * 2003-03-12 2004-09-23 Koninklijke Philips Electronics N. V. Data processing device and method for transferring data
US8386648B1 (en) * 2003-06-26 2013-02-26 Nvidia Corporation Hardware support system for accelerated disk I/O
US8683132B1 (en) 2003-09-29 2014-03-25 Nvidia Corporation Memory controller for sequentially prefetching data for a processor of a computer system
US8356142B1 (en) 2003-11-12 2013-01-15 Nvidia Corporation Memory controller for non-sequentially prefetching data for a processor of a computer system
US8700808B2 (en) * 2003-12-01 2014-04-15 Nvidia Corporation Hardware support system for accelerated disk I/O
US7213094B2 (en) * 2004-02-17 2007-05-01 Intel Corporation Method and apparatus for managing buffers in PCI bridges
US8356143B1 (en) 2004-10-22 2013-01-15 NVIDIA Corporatin Prefetch mechanism for bus master memory access
US7593345B2 (en) * 2004-12-30 2009-09-22 Finisar Corporation Altering latency for network testing
US7487274B2 (en) * 2005-08-01 2009-02-03 Asic Architect, Inc. Method and apparatus for generating unique identification numbers for PCI express transactions with substantially increased performance
US7698493B2 (en) * 2005-08-31 2010-04-13 Ati Technologies, Inc. Methods and apparatus for translating write request messages in a computing system
WO2009028494A1 (ja) 2007-08-28 2009-03-05 Nikon Corporation 位置検出装置、位置検出方法、露光装置、およびデバイス製造方法
JP5112138B2 (ja) * 2008-03-28 2013-01-09 株式会社日立製作所 セッション管理方法、ストレージ装置、及び、計算機システム
US8356128B2 (en) * 2008-09-16 2013-01-15 Nvidia Corporation Method and system of reducing latencies associated with resource allocation by using multiple arbiters
US8370552B2 (en) * 2008-10-14 2013-02-05 Nvidia Corporation Priority based bus arbiters avoiding deadlock and starvation on buses that support retrying of transactions
US8698823B2 (en) 2009-04-08 2014-04-15 Nvidia Corporation System and method for deadlock-free pipelining
JP2011182314A (ja) * 2010-03-03 2011-09-15 Oki Semiconductor Co Ltd データ中継装置及び方法
US8566496B2 (en) * 2010-12-03 2013-10-22 Lsi Corporation Data prefetch in SAS expanders
US8677031B2 (en) 2011-03-31 2014-03-18 Intel Corporation Facilitating, at least in part, by circuitry, accessing of at least one controller command interface
JP5564019B2 (ja) * 2011-08-26 2014-07-30 株式会社東芝 ファイル転送装置およびその方法
US10425456B2 (en) 2017-11-29 2019-09-24 Bank Of America Corporation Request processing system using a splitting engine
US10419265B2 (en) 2017-11-29 2019-09-17 Bank Of America Corporation Request processing system using a combining engine
US11226910B2 (en) * 2019-03-04 2022-01-18 Qualcomm Incorporated Ticket based request flow control

Citations (4)

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JPH0467248A (ja) * 1990-07-06 1992-03-03 Fujitsu Ltd データ受信処理装置
JPH05289974A (ja) * 1992-04-15 1993-11-05 Nec Corp データ転送方式
JPH08272735A (ja) * 1995-03-29 1996-10-18 Fujitsu Ltd 情報処理装置
JPH0973430A (ja) * 1995-09-05 1997-03-18 Hitachi Ltd バス調停システムおよびバスアービタならびにバス制御方法

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US5117486A (en) * 1989-04-21 1992-05-26 International Business Machines Corp. Buffer for packetizing block of data with different sizes and rates received from first processor before transferring to second processor
US5101477A (en) * 1990-02-16 1992-03-31 International Business Machines Corp. System for high speed transfer of data frames between a channel and an input/output device with request and backup request count registers
US5941964A (en) * 1992-05-21 1999-08-24 Intel Corporation Bridge buffer management by bridge interception of synchronization events
US5434872A (en) * 1992-07-28 1995-07-18 3Com Corporation Apparatus for automatic initiation of data transmission
US5546546A (en) * 1994-05-20 1996-08-13 Intel Corporation Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge
US5687316A (en) * 1994-07-29 1997-11-11 International Business Machines Corporation Communication apparatus and methods having P-MAC, I-MAC engines and buffer bypass for simultaneously transmitting multimedia and packet data
US5548730A (en) * 1994-09-20 1996-08-20 Intel Corporation Intelligent bus bridge for input/output subsystems in a computer system
US5848249A (en) * 1995-06-15 1998-12-08 Intel Corporation Method and apparatus for enabling intelligent I/O subsystems using PCI I/O devices
US5828865A (en) * 1995-12-27 1998-10-27 Intel Corporation Dual mode bus bridge for interfacing a host bus and a personal computer interface bus
US6072781A (en) * 1996-10-22 2000-06-06 International Business Machines Corporation Multi-tasking adapter for parallel network applications

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0467248A (ja) * 1990-07-06 1992-03-03 Fujitsu Ltd データ受信処理装置
JPH05289974A (ja) * 1992-04-15 1993-11-05 Nec Corp データ転送方式
JPH08272735A (ja) * 1995-03-29 1996-10-18 Fujitsu Ltd 情報処理装置
JPH0973430A (ja) * 1995-09-05 1997-03-18 Hitachi Ltd バス調停システムおよびバスアービタならびにバス制御方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7895375B2 (en) 2007-02-13 2011-02-22 Fujitsu Limited Data transfer apparatus and data transfer method

Also Published As

Publication number Publication date
WO1999045470A2 (en) 1999-09-10
AU2793599A (en) 1999-09-20
WO1999045470A3 (en) 2000-03-02
DE19983026T1 (de) 2001-02-22
KR20010041519A (ko) 2001-05-25
US6298407B1 (en) 2001-10-02
DE19983026B4 (de) 2010-12-23

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