JP2002367802A - Chip resistor network and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To trim a resistor to be trimmed accurately through simple work without forming any closed circuit together with other adjacent resistors and electrodes. SOLUTION: A chip resistor network is provided with a plurality of first electrodes 3 which are formed on an insulating substrate 1 to face each other in a plurality of adjacent divided areas divided by dividing grooves 2 in a state where the electrodes 3 are separated from the grooves 2, a common electrode 4 which is arranged to face the first electrodes 3, and resistors which are provided on the electrodes 3 and 4 so that the resistors may partially overlap the electrodes 3 and 4 and the resistance values of which are adjusted by trimming. The network is also provided with second electrodes 8 which respectively connect the first electrodes 4 to the common electrode 4 over the dividing grooves 2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a chip-type resistor network formed by dividing an insulating substrate on which a plurality of resistors are arranged, and a method of manufacturing the same.

[0002]

2. Description of the Related Art In a chip-type resistor network, a plurality of electrodes are provided in regions adjacent to each other defined by a dividing groove on an insulating substrate, and a resistor (film) is connected between these electrodes and a common electrode. Circuit configuration. Therefore, when performing trimming to adjust the resistance value of this resistor,
A probe of a measuring instrument is brought into contact with both ends of each of these resistors to measure the resistance value.

However, when a plurality of resistors are provided between electrodes on an insulating substrate, and a closed circuit is formed by adjacent resistors and electrodes, the measured value of one resistor is determined by the resistance of the resistor. At the same time, the resistance value includes the resistance values of other resistors and electrodes constituting a closed circuit, and as a result, there is a disadvantage that accurate trimming cannot be performed.

On the other hand, the following technology for manufacturing a chip-type resistor network is disclosed in, for example, Japanese Patent Application Laid-Open No. H5-2347.
No. 25 has proposed this. As shown in FIG. 4A, a plurality of individual regions A shown in FIG. An electrode 3 is formed, and in each region, a common electrode 4 is arranged to face each of the individual electrodes 3, and a resistor 5 as shown in FIG. 4C is formed between each of the electrodes 3 and 4. Things.

[0005] In this forming process, each of the resistors 5 is held in a state in which a part of the common electrode 4 is opened for each resistor.
The trimming is performed, and after the trimming is completed, the opening 6 in the common electrode 4 is bridged using a conductor 7 as shown in FIG. 4D. FIG. 5 is a circuit diagram showing such a resistance network, and the same reference numerals are given to portions corresponding to FIG.

[0006]

However, even in such a conventional chip-type resistor network trimming, an arrow loop is shown in FIG. 5 through another partial resistor 5 adjacent to the resistor 5 to be trimmed. A closed circuit as shown by a line is formed. Therefore, in order to improve the trimming accuracy of the resistor 5, the effects of the other partial resistors 5 and electrodes have been canceled so far. It is necessary to apply a wraparound prevention voltage to these. For this reason, a power supply device or a probe for applying the sneak-prevention voltage is required, so that the trimming work is complicated and the work efficiency is extremely poor. Also,
There is also a problem that only the chip type resistor network having the common electrode can cope with the problem.

The present invention solves such a conventional problem, and eliminates the need for a resistor to be trimmed to form a closed circuit together with other adjacent resistors and electrodes, thereby achieving accurate operation with a simple operation. It is an object of the present invention to provide a chip-type resistor network capable of efficiently realizing a proper trimming and a method of manufacturing the chip-type resistor network.

[0008]

In order to achieve the above object, a chip-type resistor network according to the present invention is provided in a plurality of regions divided by a dividing groove on an insulating substrate and adjacent to each other and separated from the dividing groove. A plurality of first electrodes formed so as to face each other, a common electrode disposed opposite to the plurality of first electrodes in each of the regions, and a part of each of the common electrode and each of the first electrodes. A resistor provided on these so as to overlap and having a resistance value adjusted by trimming, and the first electrode and the common electrode which are located in the adjacent region and are opposed to each other are partially formed. And a second electrode connected so as to overlap the division groove so as to overlap. Thereby, at the time of trimming, the resistance value measurement of each resistor can be performed with high accuracy without being affected by other adjacent resistors or electrodes, and therefore, the trimming operation can be performed with high accuracy, quickly and easily. .

A chip-type resistor network according to a second aspect of the present invention is provided with a plurality of chip-shaped resistor networks formed in a plurality of regions divided by a dividing groove on an insulating substrate and adjacent to each other so as to be spaced apart from the dividing groove. A first electrode, and a third electrode which is disposed in each of the regions so as to face the plurality of first electrodes.
An electrode is provided on these third electrodes so as to overlap with the third electrode and each part of each of the first electrodes and so as to overlap with each part of adjacent third electrodes, and is trimmed. A resistor whose resistance value is to be adjusted; and a first electrode and a third electrode which are located in the adjacent region and face each other.
A second electrode connected to the electrode so as to overlap a part thereof and to straddle the division groove. Accordingly, even in a complicated chip-type resistor network in which a resistor is connected between the third electrodes, the resistance value measurement of each resistor during trimming can be performed without being affected by other adjacent resistors or electrodes. Therefore, the trimming operation can be performed with high precision, quickly, and easily.

The chip-type resistor network according to the third aspect of the present invention is characterized in that the second electrode is formed of a conductive resin. Thereby, the curing temperature of the second electrode formed after the trimming step can be suppressed to be lower than the firing temperature of the resistor, so that the resistance value after the trimming can be maintained with high accuracy.

According to a fourth aspect of the present invention, there is provided a method for manufacturing a chip-type resistor network, wherein a plurality of regions are defined on an insulating substrate and are adjacent to each other by a dividing groove so as to face away from the dividing groove. An electrode forming step of forming a first electrode and forming a common electrode in each of the regions so as to face the plurality of first electrodes; and overlapping the common electrode and each of the first electrodes. A resistor forming step of providing a resistor whose resistance value is adjusted by trimming on them, and the first electrode and the common electrode which are located in the adjacent region and are opposed to each other are partially formed. A second electrode forming step of connecting the second electrodes so as to overlap and straddle the division groove. This makes it possible to easily and accurately perform the trimming operation while avoiding the formation of a closed circuit by another resistor with respect to the resistor to be trimmed.

According to a fifth aspect of the present invention, there is provided a method of manufacturing a chip-type resistor network, wherein a plurality of regions are defined on an insulating substrate by dividing grooves and adjacent to each other so as to face away from the dividing grooves. Forming a first electrode, and forming a third electrode so as to face the plurality of first electrodes in each of the regions, and a part of each of the third electrode and each of the first electrodes. To overlap with
And a resistor forming step of providing a resistor whose resistance value is adjusted by trimming thereon so as to overlap each part of the adjacent third electrodes, and at a position facing each other in the adjacent region. A second electrode forming step of connecting the second electrode so that the first electrode and the third electrode overlap a part of the first electrode and the third electrode, and straddle the division groove. As a result, even in a chip-type resistor network having a complicated configuration in which a resistor is connected between the third electrodes, a closed circuit is formed by another resistor with respect to the resistor to be trimmed. The trimming operation can be performed easily and accurately while avoiding the problem.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a manufacturing process diagram of the chip-type resistor network of the present invention. In this manufacturing process, first, an insulating substrate 1 is prepared, and the insulating substrate 1 is placed on the insulating substrate 1 as shown in FIG.
A plurality of adjacent regions are defined by a plurality of division grooves 2 as shown in FIG. FIG. 1B is an enlarged view of one area partitioned by the dividing groove 2 in this manner. Note that a through hole 2a is formed along the dividing groove 2, thereby forming an external electrode.

Next, as shown in FIG. 1C, a plurality of individual electrodes, such as a plurality of individual electrodes as shown in FIG.
The electrodes 3 are formed, and one common electrode 4 is arranged in each region so as to face each of the first electrodes 3. Further, the common electrode 4 and each first electrode 3 are each overlapped with a part thereof by one resistor (film) 5 as shown in FIG.
Connect as shown in (d).

Subsequently, after the resistors 5 are subjected to the glass coating process, each resistor 5 is trimmed. In this trimming, although each resistor 5 is connected to each first electrode 3 and common electrode 4, one end of each first electrode 3 and an end of the common electrode that contacts the substrate dividing groove are opened to form a closed circuit. Since no resistor is formed, the resistance value of each resistor 5 can be measured with high accuracy.

Therefore, after finishing this trimming,
The first electrodes 3 facing each other in the adjacent regions are connected to each other by the second electrodes 8 so as to straddle the division grooves 2. Further, a predetermined coating process is performed on each of the electrodes 3, 4, and 8, and further, an end surface electrode forming process, a dividing process, and the like, which are not shown, are performed, so that a multi-unit chip type having each section as one unit. A resistor network will be obtained at the same time. FIG. 2 is a circuit diagram showing such a resistance network, and portions corresponding to FIG. 1 are denoted by the same reference numerals.

It is necessary to fire the resistor 5 at a temperature lower than the firing temperature of the resistor 5 in order to suppress the fluctuation of the resistance value after the trimming. For this reason, the second electrode 8 is formed of a conductive resin material such as an Ag-containing phenolic resin instead of a metal glaze.

The main manufacturing steps of the chip-type resistor network of the present invention are as described above, and are manufactured by the arrangement pattern of the first electrode 3, the second electrode 8, and the resistor 5. Next, All steps including the main manufacturing steps will be described. First, an insulating substrate 1 containing a dividing groove 2 is prepared, and a back electrode screen-printed with an Ag-based metal glaze paste is formed on one surface (back surface) of the insulating substrate 1 at a position corresponding to a common electrode or a second electrode described later. I do.

Next, on the other surface (front surface) of the insulating substrate 1, a plurality of adjacent regions defined by the division grooves 2 are opposed to each other while being separated from the division grooves 2.
A plurality of first electrodes 3 as first front electrodes;
Are formed by screen printing of an Ag / Pd-based metal glaze paste and baking the same at 850 ° C.

Subsequently, the first electrode 3 and the common electrode 4
Are connected to each other by a resistor 5 printed with a RuO ₂ metal glaze paste and baked at 850 ° C. so as to partially overlap with these, and then printed with lead borosilicate glass on the
A glass film baked at ℃ is formed. Then, laser trimming is performed on the resistor 5 from above the glass film to adjust the resistance value of the resistor 5.

Next, the first electrode 3 and the common electrode 4 located at positions facing away from the division groove 2 are printed by an Ag-containing phenolic resin and cured at 230 ° C. by the second electrode 8. The connection is made so as to straddle the groove 2. further,
The common electrode 4 is covered with an undercoat film of a phenolic resin cured at 230 ° C. so as to cover the second electrode 8 as the second front electrode, and an overcoat film of an epoxy resin cured at 230 ° C. Divide (primary division) by the groove 2. Further, the second electrode 8 and the back electrode (not shown) are connected to the end face of the insulating substrate 1 so that
After forming an end face electrode and performing secondary division, nickel plating and solder plating are performed so as to cover the end face electrode and a part of the second electrode 8, thereby obtaining a chip-type resistor network.

In the steps subsequent to the laser trimming, the second electrode 8 is printed with an Ag-based metal glaze paste and baked at 600 ° C., and the undercoat film and the overcoat film are made of lead borosilicate glass at 600 ° C. After the primary division of the insulating substrate 1, the Ag-based metal glaze paste is fired at 600 ° C., or the Ag-containing phenol-based resin is cured at 200 ° C. to form an end face electrode. Further, an undercoat film formed by firing lead borosilicate glass at 600 ° C. is formed on the second electrode 8 obtained by firing the Ag-based metal glaze paste at 600 ° C., and then the epoxy resin is cured at 230 ° C. After forming the overcoat film and further dividing the insulating substrate 1 into primary parts,
An end face electrode obtained by curing the Ag-containing phenolic resin at 200 ° C. may be formed on the end face of the insulating substrate 1.

Further, an undercoat obtained by curing a phenolic resin at 230 ° C. is formed on the second electrode 8 obtained by firing the Ag-based metal glaze paste at 600 ° C.
An overcoat film formed by curing an epoxy resin at 230 ° C. is formed on the undercoat film, and the insulating substrate 1 is divided into primary parts.
An end face electrode cured at a temperature of ° C. may be formed on the end face of the insulating substrate 1.

Although FIG. 2 has described the trimming in the manufacturing process of the chip resistor type network having the common electrode 4, even in the manufacturing process of the chip type network having no common electrode as shown in FIG. And connecting the first electrode 3 and the third electrode 9 located at positions facing each other by the second electrode 8 so as to overlap a part of them after trimming and to straddle the dividing groove 2. Thus, accurate trimming without generating a closed circuit can be realized. In FIG. 3, one third electrode 9 is disposed to face each of the first electrodes 3, and the third electrode 9 and the first
A resistor 5 is formed on each of the electrodes 3 so as to overlap each part of the electrodes 3 and so as to partially overlap each of the adjacent third electrodes 9 and 9. Also in this case, since the closed circuit is not formed until the second electrode 8 is provided after the trimming, accurate trimming can be realized.

[0025]

As described above, according to the first aspect of the present invention, the insulating substrate is formed in a plurality of regions divided by the dividing groove and adjacent to each other so as to be separated from the dividing groove and face each other. A plurality of first electrodes, a common electrode in each of the regions facing the plurality of first electrodes, and a common electrode provided on the common electrode and each of the first electrodes so as to overlap each part thereof. And the resistor in which the trimming groove is formed, and the first electrode and the common electrode located in the adjacent region and facing each other so as to partially overlap with each other and to straddle the division groove. And the second electrode connected to the resistor, so that the resistance value of each resistor can be measured during trimming.
It can be performed with high accuracy without being affected by other adjacent resistors and electrodes.
The effect that it can be easily realized is obtained.

According to the second aspect of the present invention, the plurality of first electrodes formed on the insulating substrate in a plurality of regions divided by the dividing groove and adjacent to each other are formed so as to be spaced apart from the dividing groove and face each other. And, in each of the regions, a third electrode disposed to face the plurality of first electrodes, and a third electrode that overlaps the third electrode and a part of each of the first electrodes and that is adjacent to each other. A resistor provided on these so as to overlap each part of the above, and a trimming groove is formed;
The first electrode and the third electrode in the adjacent region and facing each other overlap with a part thereof.
In addition, since the second electrode is provided so as to straddle the dividing groove, even in a complicated chip-type resistor network in which a resistor is connected between the third electrodes, the resistance value of each resistor can be measured at the time of trimming. Therefore, it is possible to carry out the trimming operation with high accuracy without being affected by other adjacent resistors and electrodes, and thus to achieve an effect that the trimming operation can be performed with high accuracy, quickly and easily.

According to the third aspect of the present invention, the second
Since the electrodes are formed of a conductive resin, the curing temperature of the second electrode formed after the trimming step can be kept lower than the firing temperature of the resistor, and the resistance value after the trimming can be maintained with high accuracy. Can be.

According to the fourth aspect of the present invention, a plurality of first regions are provided on a plurality of regions which are divided by the dividing groove on the insulating substrate and are adjacent to each other, so as to face away from the dividing groove.
A first electrode forming step of forming an electrode, a common electrode forming step of arranging a common electrode facing the plurality of first electrodes in each of the regions, and overlapping the common electrode and each of the first electrodes. A resistor forming step of providing a resistor thereon and forming a trimming groove as described above, and the first electrode and the common electrode located in the adjacent region and facing each other are partially formed. A second electrode forming step of connecting a second electrode so as to overlap and straddle the dividing groove, so that a closed circuit is formed by another resistor or electrode with respect to the resistor to be trimmed. It is possible to easily and accurately perform the trimming operation while avoiding the trimming operation.

According to the fifth aspect of the present invention, a plurality of first regions are provided on a plurality of regions defined by the dividing grooves on the insulating substrate and adjacent to each other so as to be spaced apart from the dividing grooves.
A first electrode forming step of forming an electrode, and a third step of arranging a third electrode opposite to the plurality of first electrodes in each of the regions.
An electrode forming step, and providing a resistor on these third electrodes so as to overlap each part of the first electrodes and so as to overlap each part of the adjacent third electrodes. And a resistor forming step of forming a trimming groove, and the first electrode and the third electrode, which are located in the adjacent region and face each other, are overlapped with a part of the first electrode and the third electrode, and straddle the division groove. And a second electrode forming step of connecting the second electrodes as described above. Therefore, even in the case of a chip-type resistor network having a complicated configuration in which a resistor is connected between the third electrodes, the trimming is attempted. It is possible to easily and accurately perform the trimming operation while avoiding the formation of a closed circuit by another resistor or an electrode with respect to the resistor to be formed.

[Brief description of the drawings]

FIG. 1 is a manufacturing process diagram showing a manufacturing procedure of a chip-type resistor network according to an embodiment of the present invention.

FIG. 2 is a circuit diagram of the chip-type resistor network shown in FIG.

FIG. 3 is a circuit diagram specifically illustrating a chip-type resistor network according to another embodiment of the present invention.

FIG. 4 is a manufacturing process diagram showing a manufacturing procedure of a conventional chip-type resistor network.

FIG. 5 is a circuit diagram of the chip-type resistor network shown in FIG. 4;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Insulating substrate 2 Dividing groove 3 Individual electrode (1st electrode) 4 Common electrode 5 Resistor 6 Opening part 7 Conductor 8 2nd electrode 9 3rd electrode

Claims (5)

[Claims] A plurality of first electrodes formed in a plurality of regions which are defined by a dividing groove on an insulating substrate and which are adjacent to each other, and which are formed so as to be spaced apart from the dividing groove and face each other; A common electrode disposed opposite to the first electrode, and a resistor provided on the common electrode and each of the first electrodes so as to overlap each part of the first electrode and having a resistance value adjusted by trimming. And a second electrode that connects the first electrode and the common electrode in the adjacent area and facing each other so as to overlap a part of the first electrode and the common electrode so as to straddle the division groove. A chip type resistor neck work characterized by the following. 2. A plurality of first electrodes formed in a plurality of regions partitioned by a dividing groove on an insulating substrate and adjacent to each other and formed so as to be spaced apart from the dividing groove and face each other. A third electrode opposed to the first electrode, and a third electrode and a part of each of the first electrodes, and a part of the third electrodes adjacent to each other. And a first electrode and a third electrode which are provided on the first electrode and whose resistance value is adjusted by trimming, and the first electrode and the third electrode which are located in the adjacent area and face each other are overlapped with a part thereof. And a second electrode connected so as to straddle the dividing groove. 3. The chip-type resistor neckwork according to claim 1, wherein the second electrode is formed of a conductive resin. 4. A plurality of first electrodes are formed in a plurality of regions partitioned by a dividing groove and adjacent to each other on an insulating substrate so as to face away from the dividing groove and face each other. An electrode forming step of forming a common electrode so as to face the first electrode, and a resistor whose resistance value is adjusted by trimming the common electrode and each of the first electrodes so as to overlap each part of the first electrode. A resistor forming step of providing a body, and a second step in which the first electrode and the common electrode located in the adjacent region and facing each other are overlapped with a part of the first electrode and the common electrode so as to straddle the division groove. And a second electrode forming step of connecting the electrodes. 5. A plurality of first electrodes are formed in a plurality of regions partitioned by a dividing groove and adjacent to each other on an insulating substrate so as to be spaced apart from the dividing groove and face each other. An electrode forming step of forming a third electrode so as to be opposed to the first electrode, and forming each of the third electrodes so as to overlap with the third electrode and each part of each of the first electrodes and between adjacent third electrodes. A resistor forming step of providing a resistor whose resistance value is adjusted by trimming thereon so as to partially overlap the first electrode and the third electrode which are located in the adjacent region and opposed to each other; In such a manner as to overlap a part thereof and to straddle the dividing groove.
And a second electrode forming step of connecting the electrodes.