JP2002261591A - 不正確な発振器を利用した正確な時間遅延システム及び方法 - Google Patents

不正確な発振器を利用した正確な時間遅延システム及び方法

Info

Publication number
JP2002261591A
JP2002261591A JP2001385522A JP2001385522A JP2002261591A JP 2002261591 A JP2002261591 A JP 2002261591A JP 2001385522 A JP2001385522 A JP 2001385522A JP 2001385522 A JP2001385522 A JP 2001385522A JP 2002261591 A JP2002261591 A JP 2002261591A
Authority
JP
Japan
Prior art keywords
clock signal
incorrect
time delay
periods
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001385522A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002261591A5 (enExample
Inventor
Thomas M Walley
トーマス・エム・ワリー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agilent Technologies Inc
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Publication of JP2002261591A publication Critical patent/JP2002261591A/ja
Publication of JP2002261591A5 publication Critical patent/JP2002261591A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00—Stabilisation of generator output against variations of physical values, e.g. power supply
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation

Landscapes

  • Pulse Circuits (AREA)
JP2001385522A 2001-01-18 2001-12-19 不正確な発振器を利用した正確な時間遅延システム及び方法 Pending JP2002261591A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US765188 2001-01-18
US09/765,188 US6326825B1 (en) 2001-01-18 2001-01-18 Accurate time delay system and method utilizing an inaccurate oscillator

Publications (2)

Publication Number Publication Date
JP2002261591A true JP2002261591A (ja) 2002-09-13
JP2002261591A5 JP2002261591A5 (enExample) 2005-07-28

Family

ID=25072884

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001385522A Pending JP2002261591A (ja) 2001-01-18 2001-12-19 不正確な発振器を利用した正確な時間遅延システム及び方法

Country Status (4)

Country Link
US (1) US6326825B1 (enExample)
JP (1) JP2002261591A (enExample)
DE (1) DE10200698B4 (enExample)
SG (1) SG115442A1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60206149D1 (de) * 2002-07-05 2005-10-20 St Microelectronics Sa Verfahren zum Betreiben eines Mikrokontrollerchips mit einem internen RC-Oszillator, und Mikrokontrollerchip zur Durchführung des Verfahrens
US20050221870A1 (en) * 2004-04-06 2005-10-06 Integration Associates Inc. Method and circuit for determining a slow clock calibration factor
US7864906B2 (en) * 2004-12-13 2011-01-04 Apexone Microelectronics Ltd. System and method for clock signal synchronization
WO2006069067A2 (en) * 2004-12-20 2006-06-29 Sensicast Systems Method for reporting and accumulating data in a wireless communication network
TW200733565A (en) * 2006-02-17 2007-09-01 Realtek Semiconductor Corp Circuit for self-corrected delay time and method thereof
WO2009076079A2 (en) * 2007-12-12 2009-06-18 Hewlett-Packard Development Company, L.P. Variably delayed wakeup transition
CN102165695A (zh) * 2008-09-30 2011-08-24 拉姆伯斯公司 信号校准方法及装置
US8533506B2 (en) * 2010-06-04 2013-09-10 Lenovo (Singapore) Pte. Ltd. System wakeup on wireless network messages
TWI446141B (zh) * 2010-11-09 2014-07-21 Nuvoton Technology Corp 時脈校正方法與裝置以及電子裝置
US9021287B2 (en) * 2012-09-04 2015-04-28 Intel Mobile Communications GmbH Circuit arrangement and method for low power mode management with delayable request
CN104679098A (zh) * 2013-11-29 2015-06-03 上海华虹集成电路有限责任公司 微控制器时钟频率自动校准电路

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2928371C2 (de) * 1979-07-13 1982-07-01 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zur Synchronisation von Zeitperioden zur Behandlung von Meßsignalen
US4795984A (en) * 1986-11-19 1989-01-03 Schlumberger Systems & Services, Inc. Multi-marker, multi-destination timing signal generator
DE19629869C2 (de) * 1995-08-01 2003-02-13 Schlumberger Technologies Inc Verfahren und Vorrichtung zum Ausfluchten der relativen Phase von asychronen Taktsignalen
EP0813321A3 (de) * 1996-06-14 2001-05-09 TEMIC TELEFUNKEN microelectronic GmbH Verfahren und Steuersystem zum Übertragen von Daten
US5815043A (en) * 1997-02-13 1998-09-29 Apple Computer, Inc. Frequency controlled ring oscillator having by passable stages
US6304979B1 (en) * 1998-08-25 2001-10-16 Infineon Technologies North America Corp. Logic to enable/disable a clock generator in a secure way

Also Published As

Publication number Publication date
DE10200698A1 (de) 2002-08-08
SG115442A1 (en) 2005-10-28
US6326825B1 (en) 2001-12-04
DE10200698B4 (de) 2004-01-22

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