JP2002110889A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法

Info

Publication number
JP2002110889A
JP2002110889A JP2000296380A JP2000296380A JP2002110889A JP 2002110889 A JP2002110889 A JP 2002110889A JP 2000296380 A JP2000296380 A JP 2000296380A JP 2000296380 A JP2000296380 A JP 2000296380A JP 2002110889 A JP2002110889 A JP 2002110889A
Authority
JP
Japan
Prior art keywords
tab
semiconductor chip
semiconductor device
sealing body
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2000296380A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002110889A5 (https=
Inventor
Yukihiro Sato
幸弘 佐藤
Tadatoshi Danno
忠敏 団野
Takashi Imai
俊 今井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2000296380A priority Critical patent/JP2002110889A/ja
Publication of JP2002110889A publication Critical patent/JP2002110889A/ja
Publication of JP2002110889A5 publication Critical patent/JP2002110889A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
JP2000296380A 2000-09-28 2000-09-28 半導体装置及びその製造方法 Withdrawn JP2002110889A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000296380A JP2002110889A (ja) 2000-09-28 2000-09-28 半導体装置及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000296380A JP2002110889A (ja) 2000-09-28 2000-09-28 半導体装置及びその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2005195940A Division JP4252563B2 (ja) 2005-07-05 2005-07-05 半導体装置

Publications (2)

Publication Number Publication Date
JP2002110889A true JP2002110889A (ja) 2002-04-12
JP2002110889A5 JP2002110889A5 (https=) 2005-06-23

Family

ID=18778669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000296380A Withdrawn JP2002110889A (ja) 2000-09-28 2000-09-28 半導体装置及びその製造方法

Country Status (1)

Country Link
JP (1) JP2002110889A (https=)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010258159A (ja) * 2009-04-23 2010-11-11 Renesas Electronics Corp 半導体装置
JP2011014758A (ja) * 2009-07-03 2011-01-20 Renesas Electronics Corp リードフレーム及びこれを用いた電子部品
CN110299341A (zh) * 2013-06-14 2019-10-01 瑞萨电子株式会社 半导体器件和电子器件
WO2020095474A1 (ja) * 2018-11-06 2020-05-14 パナソニックＩｐマネジメント株式会社 回路基板
JP2021174780A (ja) * 2020-04-17 2021-11-01 ルビコン株式会社 コンデンサデバイス、パワーユニット及びコンデンサデバイスの製造方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010258159A (ja) * 2009-04-23 2010-11-11 Renesas Electronics Corp 半導体装置
JP2011014758A (ja) * 2009-07-03 2011-01-20 Renesas Electronics Corp リードフレーム及びこれを用いた電子部品
CN110299341A (zh) * 2013-06-14 2019-10-01 瑞萨电子株式会社 半导体器件和电子器件
CN110299341B (zh) * 2013-06-14 2022-11-04 瑞萨电子株式会社 半导体器件和电子器件
WO2020095474A1 (ja) * 2018-11-06 2020-05-14 パナソニックＩｐマネジメント株式会社 回路基板
JP2021174780A (ja) * 2020-04-17 2021-11-01 ルビコン株式会社 コンデンサデバイス、パワーユニット及びコンデンサデバイスの製造方法
JP7475944B2 (ja) 2020-04-17 2024-04-30 ルビコン株式会社 コンデンサデバイス、パワーユニット及びコンデンサデバイスの製造方法

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