JP2002035244A - Power feeder for pachinko machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To miniaturize the control boards of a Pachinko machine and reliably and correctly terminates the control system of the Pachinko machine at a power stoppage. SOLUTION: Power supply power is converted into DC voltage of a plurality of kinds by a power circuit board 24, and the DC voltages are fed to the control boards 17-22. A system reset control circuit 32 provided on the power circuit board 24 transmits a system reset signal the control board 17-22 when detecting an abnormal drop of the power supply voltage at a power stoppage. Before transmitting the system reset signal, the system reset control circuit 32 transmits a power supply voltage abnormal signal for a backup process to the main control board 18 and the payoff control board 17 requiring the backup process before the power stoppage. When the power supply is recovered or turned on, the system reset control circuit 32 reverses the output level of the system reset signal to an off level and uses an off-level signal as a power-on reset signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply device of a pachinko machine for converting power from a power supply into a predetermined voltage by a power supply unit and supplying it to various control boards.

[0002]

2. Description of the Related Art In recent electronically controlled pachinko machines, various control boards mainly composed of microcomputers such as a main control board, a payout control board, and a launch control board are used to control a ball payout apparatus, a ball firing apparatus, and the like. The operation of the various devices is controlled. In this case, even if the power of the pachinko machine is cut off due to an unexpected power failure or the like, in order to normally end the control program of each control board,
A power supply voltage monitoring circuit and a reset signal output circuit are provided for each control board, and when an abnormal decrease in the power supply voltage is detected by each control board, a reset signal is output to the CPU of each control board, so that the power supply voltage is reduced. Each control board is forcibly reset before it falls below the normal operating voltage of the CPU.

[0003]

The recent pachinko machines are:
Since control boards are provided separately for each control target, the number of control boards tends to increase. Furthermore, with the recent increase in the number of functions of pachinko machines, the number of electronic components mounted on each control board has increased, and each circuit board has tended to become larger. For this reason, in a configuration in which a power supply voltage monitoring circuit and a reset signal output circuit are provided for each control board as in the related art, the size of each control board is further increased.
Many of the space on the back side of the pachinko machine is occupied by a large number of large control boards, making it difficult to secure an opening for arranging center accessory units and a space for arranging other back parts. .

Further, since control signals are transmitted and received between the control boards, in order to ensure that the control system of the entire pachinko machine normally ends normally, a reset signal is output from each control board at the same timing and each control board is output. It is desirable to reset at the same timing. However, in a configuration in which a power supply voltage monitoring circuit and a reset signal output circuit are provided for each control board as in the related art, the output timing of the reset signal of each control board (power supply voltage abnormality) There is a possibility that a situation may occur in which the control system of the entire pachinko machine cannot be normally terminated.

The present invention has been made in view of such circumstances, and accordingly, it is an object of the present invention to reduce the size of each control board of a pachinko machine so as to save space, and to reduce the size of the entire pachinko machine during a power failure. An object of the present invention is to provide a power supply device for a pachinko machine that can surely normally end a control system.

[0006]

In a pachinko machine that converts power supply power into a predetermined voltage by a power supply unit and supplies the same to various control boards, the power supply to each control board is monitored collectively by the power supply unit. be able to.

Focusing on this point, the power supply device for a pachinko machine according to the first aspect of the present invention comprises a power supply unit having a voltage abnormal drop detecting means for detecting an abnormal drop in the power supply voltage, A reset signal transmitting means for transmitting a reset signal to each control board is provided. This eliminates the need to provide a power supply voltage monitoring circuit and a reset signal output circuit for each control board, so that the circuit configuration of each control board can be simplified and downsized. In addition, since the reset signal is transmitted from the reset signal transmitting means provided in the power supply unit to each control board at a time, the reset signal is input to each control board at the same timing and each control board is reset at the same timing. As a result, the control system of the entire pachinko machine can be reliably terminated normally.

In this case, the power supply unit is provided with a power supply voltage abnormality signal transmitting means for transmitting a power supply voltage abnormality signal when the power supply voltage abnormality is detected, and the power supply unit is provided with a power supply voltage signal when the power supply voltage abnormality is detected. It is preferable that a power supply voltage abnormality signal be transmitted to a control board that needs to perform a backup process before a power outage before a reset signal is transmitted so that the control board performs the backup process. In this way, the control board that needs to perform the backup process before the power failure can surely complete the backup process of the control information immediately before the power failure when the power failure occurs, and perform the backup process after the power is restored. Based on the information, control following the control state immediately before the power failure can be performed.

Further, the power supply unit may be provided with a power-on reset signal transmitting means, and the power-on reset signal may be transmitted to each control board after the power supply voltage is restored. This eliminates the need to provide a power-on reset signal output circuit for each control board, so that each control board can be further reduced in size.

Here, the reset signal and the power-on reset signal are not transmitted simultaneously. Focusing on this point, the reset signal transmitting means also functions as the power-on reset signal transmitting means, and the output level of the reset signal is turned off from the on-level of the reset signal when the power is turned on or when the power is restored. The level may be inverted, and the off-level signal may be used as a power-on reset signal. With this configuration, both the reset signal and the power-on reset signal can be transmitted by one signal line, and the number of signal lines between the power supply unit and each control board can be reduced.

In a general pachinko machine, a sub-control board such as a payout control circuit controls an individual control target such as a ball payout device based on a control signal transmitted from a main control board. . Normally, the main control board and the sub-control board are started at the same time when the power-on reset signal is received at the same time. May occur. As a result, if the main control board is started up before the sub control board, the control signal is transmitted from the main control board to the sub control board even though the sub control board has not been started up yet. The operation of the pachinko machine may not start normally.

As a countermeasure, the sub-control board is started immediately after receiving the power-on reset signal, and the main control board is started after a predetermined delay time has elapsed after receiving the power-on reset signal. Good. With this configuration, it is possible to reliably prevent the main control board from transmitting a control signal to the sub-control board before the sub-control board is in the startup completed state, and to normally start the operation of the pachinko machine. Can be done.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. First, the configuration of the back side of the pachinko machine will be schematically described with reference to FIG. On the back side of the pachinko machine 11, a mechanism plate 12 for assembling back parts is attached. A ball tank 13 for storing pachinko balls is provided on the upper rear surface of the mechanism plate 12.
3 is connected to a tank rail 14 for causing the pachinko balls flowing out therefrom to flow down in an aligned state. A ball supply path 15 is provided at the lower end of the tank rail 14, and a ball payout device 16 is connected to the lower end of the ball supply path 15.

A payout control board 17 for controlling the ball payout device 16 is provided on the lower right side of the rear surface of the mechanism plate 12, and a main control board 18 for managing the control of the entire pachinko machine 11 is provided on the left side of the payout control board 17. Is provided. Furthermore,
On the back side of the pachinko machine 11, a ball launching device (not shown)
Control board 19 (see FIG. 1) for controlling the display, image control board 2 for controlling the center accessory display (not shown)
0 (see FIG. 1), a lamp control board 21 (see FIG. 1) for controlling lighting of various lamps (not shown), an audio control board 22 (see FIG. 1), and the like. In this case, the payout control board 17, the firing control board 19, the image control board 20,
The lamp control board 21 and the sound control board 22 correspond to the sub-control board in claims, and the main control board 1
These sub-control boards control individual control targets such as the ball payout device 16 based on the control signal transmitted from the control unit 8.

A power receiving board 23 connected to an external power supply (for example, 24 VAC) on the pachinko island side is provided on the upper rear surface of the pachinko machine 11, and each of the control boards 17 to A power supply circuit board 24 (power supply unit) for supplying a DC voltage to the power supply 22 and a power supply relay board 25 are provided.

As shown in FIG. 1, the AC voltage (24 V AC) supplied from the power receiving board 23 is
4, a plurality of types of DC voltages (for example, DC32V, DC24
V, DC12V, DC5V, etc.), and each DC voltage output from the power supply circuit board 24 is distributed by the power supply relay board 25 according to the power supply voltage required for each of the control boards 17 to 22. It is supplied to each of the control boards 17 to 22.

The power supply circuit board 24 is provided with a backup power supply (not shown) composed of a capacitor or the like. The backup power supply is connected to the main control board 18 and the payout control board 17 via a power supply relay board 25. Each CPU2
7 and 26 are connected to VBB terminals. The main control board 18 and the payout control board 17 have a built-in backup memory (not shown), and the storage information in the backup memory is held by the backup power supply even at the time of power failure.

Further, a system reset control circuit 32 is provided on the power supply circuit board 24. The system reset control circuit 32 monitors the AC 24 V power supply voltage and the DC 5 V power supply voltage as described later, and outputs a power supply voltage abnormality signal, a system reset signal, and a power-on reset signal based on the behavior. The output terminal of the power supply voltage abnormality signal of the system reset control circuit 32 is connected to the NMI terminals of the CPUs 27 and 26 of the main control board 18 and the payout control board 17 via the power supply relay board 25. The output terminal of the system reset signal of the system reset control circuit 32 is connected to the SRST terminal (system reset terminal) of each of the CPUs 26 to 31 of each of the control boards 17 to 22 via the power supply relay board 25. In this case, the system reset signal corresponds to the reset signal in the claims.

In this embodiment, the system reset signal and the power supply voltage abnormality signal are negative logic signals, and the power-on reset signal is a positive logic signal (FIGS. 3 and 4).
reference). Then, the system reset control circuit 32 uses the off-level signal obtained when the output level of the system reset signal is inverted from the on-level (low level) of the system reset signal to the off-level (high level) as a power-on reset signal. (See FIG. 4). Therefore,
The power-on reset signal is sent to each CPU 26 of each of the control boards 17 to 22 by using the signal line of the system reset signal.
Are transmitted to the SRST terminals of .about.31. Further, the system reset signal input port of the main control board 18 and the CPU 2
7, a delay circuit 33 is provided. After a predetermined delay time has elapsed since the input of the power-on reset signal, the delay circuit 33
27, a power-on reset signal is output.

As shown in the time chart of FIG. 3, when the 24 V AC power supplied to the power supply circuit board 24 is cut off due to a power failure or the like, the power supply circuit board 24 switches the control boards 17.
Each of the DC voltages supplied to .about.22 gradually decreases, and finally the power supply is completely stopped. For example, D which is a drive voltage of the CPUs 26 to 31 of the control boards 17 to 22 is D.
After a predetermined time Tc (for example, 30 ms or more) has passed since the AC 24 V power supply was cut off,
1 lowers to the lower limit of the normal operating voltage (eg, 4.75 V).

Therefore, even if the power of the pachinko machine 11 is cut off due to an unexpected power failure or the like, the system reset control circuit 32 of the power supply circuit board 24 controls the control boards 17-2.
In order to normally end the control operation of Step 2, the abnormal drop of the AC 24 V power supply voltage is detected to detect that the AC 24 V power supply is cut off. 22 CPUs 26-31
Before the DC5V power supply voltage falls below the normal operating voltage of the CPUs 26-31, the CPUs 26-31 are forcibly reset, and the control programs of the respective control boards 17-22 are normally restored. To end.

On the other hand, as shown in the time chart of FIG. 4, when the AC 24 V power is restored (or when the power is turned on), each DC voltage supplied from the power supply circuit board 24 to each of the control boards 17 to 22 gradually increases. To reach a predetermined voltage value. System reset control circuit 3 of power supply circuit board 24
2 detects that the DC 5V power supply voltage has risen to the normal operation voltage of the CPUs 26 to 31 in order to normally start the control operation of each of the control boards 17 to 22, and then controls the CPUs 26 to 31 of the control boards 17 to 22. , A power-on reset signal is transmitted to activate each of the control boards 17 to 22.

Hereinafter, the specific contents of the reset control at the time of power failure and the start control at the time of power restoration (or power-on) will be described with reference to the time charts of FIGS. 3 and 4, respectively.

[Reset Control During Power Outage] As shown in the time chart of FIG. 3, at the time of power outage, the system reset control circuit 32 first detects an abnormal drop in the AC 24V power supply voltage and cuts off the AC 24V power supply. Then, it is determined whether or not the power failure state of the AC 24 V power supply has continued for a predetermined time T1 (for example, a maximum of 18 ms). If AC
24 hours before the specified time T1 elapses from the start of the 24V power failure.
When the V power returns, the subsequent reset control is not executed. This prevents the control system of the pachinko machine 11 from being terminated at every momentary power failure that does not adversely affect the control system of the pachinko machine 11.

On the other hand, when the power failure state of the AC 24 V power supply continues for a predetermined time T 1, the output level of the power supply voltage abnormality signal is inverted to a low level (on level), and the CPU 27 of the main control board 18 and the payout control board 17 are turned off. , 26 N
The input level of the MI terminal is inverted to a low level. As a result, the main control board 18 and the payout control board 17 execute a backup process when an NMI interrupt occurs, and store necessary data (winning data, prize ball data, etc.) in the backup memory.

Thereafter, the system reset control circuit 32
Determines whether a predetermined time T2 has elapsed since the power supply voltage abnormality signal was inverted to a low level (on level). The predetermined time T2 is set to a time (for example, a maximum of 12 ms) sufficient for the main control board 18 and the payout control board 17 to complete the backup process. Also, a time obtained by adding the predetermined time T1 and the predetermined time T2 (T1 + T2
) Is set so as to be shorter than the above-mentioned predetermined time Tc (the time during which the power supply voltage of DC 5 V drops to the lower limit of the normal operating voltage of the CPUs 26 to 31 after the power supply of 24 V AC is cut off).

After a lapse of a predetermined time T2 from the inversion of the power supply voltage abnormality signal to the low level (on level), that is, after the lapse of (T1 + T2) from the 24 V AC power supply being cut off, the output level of the system reset signal is set to the low level. (ON level), and the input levels of the SRST terminals of the CPUs 26 to 31 of the control boards 17 to 22 are inverted to the low level. As a result, the DC5V power supply voltage becomes C
Before dropping below the normal operating voltage of PUs 26-31, C
PU26 to 31 are forcibly reset, and each control board 1
The control programs 7 to 22 are normally terminated.

In this case, the system reset control circuit 32
Plays a role corresponding to the abnormal voltage drop detecting means, the reset signal transmitting means and the power supply voltage abnormal signal transmitting means in the claims.

[Start-up control when power is restored (or when power is turned on)] As shown in the time chart of FIG. 4, when power is restored (or when power is turned on), the system reset control circuit 3 is activated.
2. First, the output level of the power supply voltage abnormality signal is changed to a high level (off level) after a lapse of a predetermined time T3 after the DC 5 V power supply voltage exceeds the lower limit value (eg, 4.75 V) of the normal operating voltage of the CPUs 26 to 31. Invert, the N of each of the CPUs 27 and 26 of the main control board 18 and the payout control board 17 is changed.
The input level of the MI terminal is returned to the high level.

Thereafter, the system reset control circuit 32
Sets the output level of the system reset signal output terminal to high level (off level) after a lapse of a predetermined time T4 after inverting the power supply voltage abnormality signal to high level (off level).
Inverting the system reset signal from the system reset signal output terminal to the off signal (high level signal) of the system reset signal
Is used as a power-on reset signal.
Send to Thereby, the CP of each of the control boards 17 to 22 is
The reset state is released by inverting the input level of the SRST terminal of U26 to U31 to the high level, and the control boards 17 to
22 is started. In this case, the system reset control circuit 32 plays a role corresponding to a power-on reset signal transmitting means described in the claims.

At this time, the main control board 18 delays the power-on reset signal received at the system reset signal
27 is input to the SRST terminal. As a result, the main control board 18 inverts the input level of the SRST terminal of the CPU 27 to the high level after a predetermined delay time has elapsed from the reception of the power-on reset signal. As a result, the control program of the main control board 18 is activated after a predetermined delay time has elapsed after receiving the power-on reset signal.

On the other hand, the payout control board 17 and the firing control board 1
9. Since the image control board 20, the lamp control board 21 and the sound control board 22 input the received power-on reset signal to the CPUs 26, 28 to 30 without delay, the control program is executed immediately after receiving the power-on reset signal. to start.

According to the present embodiment described above, the system reset control circuit 32 provided on the power supply circuit board 24
Since the system reset signal is transmitted to each of the control boards 17 to 22 upon detecting an abnormal decrease in the power supply voltage, it is not necessary to provide a power supply voltage monitoring circuit and a system reset signal output circuit for each of the control boards 17 to 22. In addition, the circuit configuration of each of the control boards 17 to 22 can be simplified and downsized, and the demand for space saving can be satisfied. In addition, at the time of a power failure, the system reset signal is transmitted from the system reset control circuit 32 to the control boards 17 to 22 collectively, so that the control boards 17 to 22 can always be reset at the same timing. Control system can be normally terminated normally.

Further, in this embodiment, when an abnormal decrease in the power supply voltage is detected, the main control board 18 and the payout control board 17 need to perform a backup process before the power outage.
Before transmitting the system reset signal, the power supply voltage abnormality signal is transmitted to the main control board 18 and the payout control board 1.
7, the main control board 18 and the payout control board 17 ensure that the backup process of winning data, prize ball data, etc. immediately before the power failure is completed when the power failure occurs. Can be. For this reason, after the power is restored, the main control board 18 and the payout control board 17 can carry out the control following the control state immediately before the power failure based on the backup information, and improve the operation reliability of the pachinko machine 11. be able to.

In this embodiment, the power supply circuit board 24
A power-on reset signal is transmitted to each of the control boards 17 to 22 when the power is restored or the power is turned on by the system reset control circuit 32 provided for the control boards 17 to 22.
There is no need to provide a power-on reset signal output circuit for every 22, and the space saving effect can be further enhanced.

Further, noting that the system reset signal and the power-on reset signal are not transmitted simultaneously, the system reset signal is set to a negative logic signal, the power-on reset signal is set to a positive logic signal, and the power supply is reset. The output level of the system reset signal is set to the ON level (low level) of the system reset signal when the system is restored or the power is turned on.
To an off level (high level), and the off level signal is used as a power on reset signal. Therefore, it is possible to transmit both the system reset signal and the power on reset signal through one signal line. Thus, the number of signal lines between the power supply circuit board 24 and each of the control boards 17 to 22 can be reduced. However, it goes without saying that the system reset signal and the power-on reset signal may be transmitted through signal lines of different systems.

By the way, the sub-control boards such as the main control board 18 and the payout control board 17 are activated at the same time when the power-on reset signal is received at the same time. There may be slight differences in the time to complete. As a result, if the main control board 18 is started before the sub-control board, the control signal is transmitted from the main control board 18 to the sub-control board even though the sub-control board has not been started yet. The operation of the pachinko machine 11 may not be started normally.

In this regard, in this embodiment, the sub-control boards (such as the payout control board 17) other than the main control board 18 are activated immediately after receiving the power-on reset signal.
The main control board 18 delays the power-on reset signal received simultaneously with the sub-control board by a predetermined time by the delay circuit 33 and inputs the signal to the CPU 27. Can be activated after the elapse of the delay time. Therefore, it is possible to reliably prevent a control signal from being transmitted from the main control board 18 to the sub-control board before the sub-control board is in the startup completed state, and to normally start the operation of the pachinko machine 11 normally. Can be done.

In this embodiment, the main control board 18
By delaying the input timing of the power-on reset signal to the CPU 27 by the delay circuit 33 (hardware), the activation timing of the main control board 18 is delayed from the activation timing of the sub-control board.
The function 3 may be realized by software.
For example, a start-up control program for starting the control program of the main control board 18 after a predetermined time has elapsed after the power-on reset signal is input to the CPU 27 of the main control board 18 may be installed.

Also, instead of delaying the input timing of the power-on reset signal to the CPU 27 of the main control board 18, when the control signal is transmitted from the main control board 18 to each sub-control board when the power is restored or the power is turned on. Alternatively, the signal transmission start timing may be delayed. Even in this case, it is possible to reliably prevent a control signal from being transmitted from the main control board 18 to the sub-control board before the sub-control board enters the startup completed state.

Also, in this embodiment, the 24 V AC power supply is monitored to detect an abnormal drop in the power supply voltage.
The DC voltage converted by the power supply circuit board 24 (for example, DC32
V) may be monitored to detect an abnormal drop in the power supply voltage.

In the present embodiment, the power supply voltage abnormality signal is transmitted to the main control board 18 and the dispensing control board 17, but may be transmitted to other sub-control boards. What is necessary is just to transmit a power supply voltage abnormality signal to the sub-control board that needs to perform the above.

[0043]

As is apparent from the above description, according to the power supply apparatus for a pachinko machine of the first aspect of the present invention, the power supply unit includes a voltage abnormal drop detecting means for detecting an abnormal drop in the power supply voltage, Since reset signal transmitting means for collectively transmitting a reset signal to each control board when an abnormal drop in the power supply voltage is detected is provided, space saving of each control board can be realized, and each control board can be realized at the time of a power failure. Can be reset at the same timing to reliably end the control system normally.

Further, according to the present invention, the power supply voltage abnormality signal is transmitted before the reset signal is transmitted to the control board which needs to perform the backup processing when the power supply voltage abnormality drop is detected, and the backup processing is performed on the control board. As a result, the backup process can be executed reliably when the power supply fails, and the control that continues from the control state immediately before the power failure after the power supply is restored can be performed accurately, improving the operation reliability of the pachinko machine. Can be improved.

According to a third aspect of the present invention, the power supply unit is provided with a power-on reset signal transmitting means.
Further miniaturization of each control board can be realized.

Further, in the present invention, the off-level signal obtained by inverting the output level of the reset signal from the on-level of the reset signal to the off-level is used as the power-on reset signal, thereby reducing the number of signal lines. can do.

According to the fifth aspect, the sub-control board is started immediately after receiving the power-on reset signal, and the main control board is started after a predetermined delay time has elapsed after receiving the power-on reset signal. The control system of the pachinko machine can be started up normally.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a power supply system of a pachinko machine according to an embodiment of the present invention.

FIG. 2 is a back view of the pachinko machine.

FIG. 3 is a time chart for explaining a reset control method at the time of power failure.

FIG. 4 is a time chart for explaining a startup control method at the time of power return.

[Explanation of symbols]

11 pachinko machine, 17 payout control board (sub-control board), 18 main control board, 19 launch control board (sub-control board), 20 image control board (sub-control board),
21: lamp control board (sub-control board), 22: voice control board (sub-control board), 23: power receiving board, 24:
Power supply circuit board (power supply unit), 25 ... power supply relay board,
32: System reset control circuit (voltage abnormal drop detecting means, reset signal transmitting means, power supply voltage abnormal signal transmitting means, power-on reset signal transmitting means), 33 ... delay circuit.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G06F 1/00 350B F term (Reference) 2C088 BC56 BC58 EA10 5B011 EA10 GG04 GG12 HH04 JA04 5B054 AA13 BB05 5G015 FA08 GB02 HA18 JA32 KA06

Claims (5)

[Claims] 1. A power supply device of a pachinko machine for converting power supply power into a predetermined voltage by a power supply unit and supplying the voltage to various control boards, wherein the power supply unit detects an abnormal drop in power supply voltage. And a reset signal transmitting means for transmitting a reset signal to each of the control boards when an abnormal decrease in the power supply voltage is detected by the abnormal voltage drop detecting means. apparatus. 2. The power supply unit according to claim 1, wherein when the abnormal voltage drop detecting means detects an abnormal drop in the power supply voltage, the control board needs to perform a backup process before a power outage among the control boards. The pachinko machine according to claim 1, further comprising: a power supply voltage abnormality signal transmitting unit that transmits a power supply voltage abnormality signal before transmitting the reset signal and causes the control board to perform a backup process. Power supply. 3. The power supply unit according to claim 1, further comprising a power-on reset signal transmitting unit that transmits a power-on reset signal to each of the control boards when power is turned on or when power is restored. A power supply device for a pachinko machine as described in the above. 4. The reset signal transmitting means also serves as the power-on reset signal transmitting means, and inverts the output level of the reset signal from an on level of the reset signal to an off level at power-on or power-on. The power supply device of a pachinko machine according to claim 3, wherein an off-level signal is used as the power-on reset signal. 5. A main control board for managing control of the entire pachinko machine, and at least one sub-control board for controlling an individual control target of the pachinko machine based on a control signal transmitted from the main control board. The sub-control board is configured to start immediately after receiving the power-on reset signal, and the main control board is configured to start after a predetermined delay time has elapsed after receiving the power-on reset signal. The power supply device for a pachinko machine according to claim 3 or 4.