JP2001237266A - 半導体チップ及びその実装方法 - Google Patents

半導体チップ及びその実装方法

Info

Publication number
JP2001237266A
JP2001237266A JP2000045689A JP2000045689A JP2001237266A JP 2001237266 A JP2001237266 A JP 2001237266A JP 2000045689 A JP2000045689 A JP 2000045689A JP 2000045689 A JP2000045689 A JP 2000045689A JP 2001237266 A JP2001237266 A JP 2001237266A
Authority
JP
Japan
Prior art keywords
semiconductor chip
substrate
electrode
ferromagnetic material
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000045689A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001237266A5 (enExample
Inventor
Isamu Nakao
勇 中尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2000045689A priority Critical patent/JP2001237266A/ja
Publication of JP2001237266A publication Critical patent/JP2001237266A/ja
Publication of JP2001237266A5 publication Critical patent/JP2001237266A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/95053Bonding environment
    • H01L2224/95085Bonding environment being a liquid, e.g. for fluidic self-assembly
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP2000045689A 2000-02-23 2000-02-23 半導体チップ及びその実装方法 Pending JP2001237266A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000045689A JP2001237266A (ja) 2000-02-23 2000-02-23 半導体チップ及びその実装方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000045689A JP2001237266A (ja) 2000-02-23 2000-02-23 半導体チップ及びその実装方法

Publications (2)

Publication Number Publication Date
JP2001237266A true JP2001237266A (ja) 2001-08-31
JP2001237266A5 JP2001237266A5 (enExample) 2007-01-11

Family

ID=18568229

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000045689A Pending JP2001237266A (ja) 2000-02-23 2000-02-23 半導体チップ及びその実装方法

Country Status (1)

Country Link
JP (1) JP2001237266A (enExample)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007273628A (ja) * 2006-03-30 2007-10-18 Fujitsu Ltd 半導体装置の製造方法
JP2012019036A (ja) * 2010-07-07 2012-01-26 Nec Corp 電子部品の実装構造及び実装方法
WO2013158949A1 (en) 2012-04-20 2013-10-24 Rensselaer Polytechnic Institute Light emitting diodes and a method of packaging the same
JP2015153931A (ja) * 2014-02-17 2015-08-24 スタンレー電気株式会社 半導体発光装置、半導体発光素子、及び、半導体発光装置の製造方法
JP2016018966A (ja) * 2014-07-11 2016-02-01 スタンレー電気株式会社 半導体光学素子、及び、素子分散溶液
JP2018503986A (ja) * 2015-07-14 2018-02-08 ゴルテック.インク マイクロ発光ダイオードの搬送方法、製造方法、マイクロ発光ダイオード装置及び電子機器
KR20200026762A (ko) * 2019-09-26 2020-03-11 엘지전자 주식회사 반도체 발광소자의 자가조립 장치
US10928145B2 (en) 2011-10-27 2021-02-23 Applied Materials, Inc. Dual zone common catch heat exchanger/chiller
JP2021071595A (ja) * 2019-10-31 2021-05-06 アルディーテック株式会社 マイクロledディスプレイの製造方法およびマイクロledディスプレイ
WO2021084783A1 (ja) * 2019-10-31 2021-05-06 アルディーテック株式会社 半導体チップ集積装置の製造方法、半導体チップ集積装置、半導体チップ集積装置集合体、半導体チップインクおよび半導体チップインク吐出装置
US12159800B2 (en) 2019-09-19 2024-12-03 Lg Electronics Inc. Device for self-assembling semiconductor light-emitting diodes

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007273628A (ja) * 2006-03-30 2007-10-18 Fujitsu Ltd 半導体装置の製造方法
JP2012019036A (ja) * 2010-07-07 2012-01-26 Nec Corp 電子部品の実装構造及び実装方法
US10928145B2 (en) 2011-10-27 2021-02-23 Applied Materials, Inc. Dual zone common catch heat exchanger/chiller
KR102031296B1 (ko) * 2012-04-20 2019-10-11 렌슬러 폴리테크닉 인스티튜트 발광 다이오드들 및 이를 패키징하는 방법
WO2013158949A1 (en) 2012-04-20 2013-10-24 Rensselaer Polytechnic Institute Light emitting diodes and a method of packaging the same
KR20150005628A (ko) * 2012-04-20 2015-01-14 렌슬러 폴리테크닉 인스티튜트 발광 다이오드들 및 이를 패키징하는 방법
JP2015515149A (ja) * 2012-04-20 2015-05-21 レンセレイアー ポリテクニック インスティテュート 発光ダイオード及びそのパッケージング方法
EP2839522A4 (en) * 2012-04-20 2015-12-09 Rensselaer Polytech Inst LIGHT-EMITTING DIODES AND METHOD OF PACKAGING THEREOF
US9245875B2 (en) 2012-04-20 2016-01-26 Rensselaer Polytechnic Institute Light emitting diodes and a method of packaging the same
US9418979B2 (en) 2012-04-20 2016-08-16 Renssealer Polytechnic Institute Light emitting diodes and a method of packaging the same
CN104508843B (zh) * 2012-04-20 2017-04-26 伦斯勒理工学院 一种用于将一排发光二极管裸片组装于衬底上的方法
JP2015153931A (ja) * 2014-02-17 2015-08-24 スタンレー電気株式会社 半導体発光装置、半導体発光素子、及び、半導体発光装置の製造方法
JP2016018966A (ja) * 2014-07-11 2016-02-01 スタンレー電気株式会社 半導体光学素子、及び、素子分散溶液
JP2018503986A (ja) * 2015-07-14 2018-02-08 ゴルテック.インク マイクロ発光ダイオードの搬送方法、製造方法、マイクロ発光ダイオード装置及び電子機器
US12159800B2 (en) 2019-09-19 2024-12-03 Lg Electronics Inc. Device for self-assembling semiconductor light-emitting diodes
KR20200026762A (ko) * 2019-09-26 2020-03-11 엘지전자 주식회사 반도체 발광소자의 자가조립 장치
KR102260638B1 (ko) 2019-09-26 2021-06-04 엘지전자 주식회사 반도체 발광소자의 자가조립 장치
JP2021071595A (ja) * 2019-10-31 2021-05-06 アルディーテック株式会社 マイクロledディスプレイの製造方法およびマイクロledディスプレイ
WO2021084783A1 (ja) * 2019-10-31 2021-05-06 アルディーテック株式会社 半導体チップ集積装置の製造方法、半導体チップ集積装置、半導体チップ集積装置集合体、半導体チップインクおよび半導体チップインク吐出装置
US12176463B2 (en) 2019-10-31 2024-12-24 Uldtec Co., Ltd. Semiconductor chip integrated device manufacturing method, semiconductor chip integrated device, semiconductor chip integrated device assembly, semiconductor chip ink, and semiconductor chip ink ejection device

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