JP2001203229A - 半導体装置及びその製造方法、回路基板並びに電子機器 - Google Patents

半導体装置及びその製造方法、回路基板並びに電子機器

Info

Publication number
JP2001203229A
JP2001203229A JP2000008761A JP2000008761A JP2001203229A JP 2001203229 A JP2001203229 A JP 2001203229A JP 2000008761 A JP2000008761 A JP 2000008761A JP 2000008761 A JP2000008761 A JP 2000008761A JP 2001203229 A JP2001203229 A JP 2001203229A
Authority
JP
Japan
Prior art keywords
bump
semiconductor device
conductive layer
insulating layer
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2000008761A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001203229A5 (enExample
Inventor
Yohei Kurashima
羊平 倉島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2000008761A priority Critical patent/JP2001203229A/ja
Publication of JP2001203229A publication Critical patent/JP2001203229A/ja
Publication of JP2001203229A5 publication Critical patent/JP2001203229A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1301—Shape
    • H01L2224/13016—Shape in side view
    • H01L2224/13018—Shape in side view comprising protrusions or indentations
    • H01L2224/13019—Shape in side view comprising protrusions or indentations at the bonding interface of the bump connector, i.e. on the surface of the bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
JP2000008761A 2000-01-18 2000-01-18 半導体装置及びその製造方法、回路基板並びに電子機器 Withdrawn JP2001203229A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000008761A JP2001203229A (ja) 2000-01-18 2000-01-18 半導体装置及びその製造方法、回路基板並びに電子機器

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000008761A JP2001203229A (ja) 2000-01-18 2000-01-18 半導体装置及びその製造方法、回路基板並びに電子機器

Publications (2)

Publication Number Publication Date
JP2001203229A true JP2001203229A (ja) 2001-07-27
JP2001203229A5 JP2001203229A5 (enExample) 2005-02-24

Family

ID=18536979

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000008761A Withdrawn JP2001203229A (ja) 2000-01-18 2000-01-18 半導体装置及びその製造方法、回路基板並びに電子機器

Country Status (1)

Country Link
JP (1) JP2001203229A (enExample)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003021664A1 (en) * 2001-08-31 2003-03-13 Hitachi, Ltd. Semiconductor device, structural body and electronic device
JP2006179652A (ja) * 2004-12-22 2006-07-06 Sanyo Electric Co Ltd 回路装置
JP2009049059A (ja) * 2007-08-14 2009-03-05 Toppan Forms Co Ltd 部品実装基板およびその製造方法
JP2009070865A (ja) * 2007-09-11 2009-04-02 Rohm Co Ltd 半導体装置
JP2009117496A (ja) * 2007-11-05 2009-05-28 Panasonic Corp 実装構造体およびその製造方法
JP2014086616A (ja) * 2012-10-25 2014-05-12 Denso Corp 電子装置およびその製造方法
US10207503B2 (en) 2016-01-20 2019-02-19 Seiko Epson Corporation MEMS device, liquid ejecting head, liquid ejecting apparatus, and MEMS device manufacturing method
US10498260B2 (en) 2015-11-13 2019-12-03 Seiko Epson Corporation Electric device, piezoelectric motor, robot, hand, and liquid transport pump

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003021664A1 (en) * 2001-08-31 2003-03-13 Hitachi, Ltd. Semiconductor device, structural body and electronic device
JP2006179652A (ja) * 2004-12-22 2006-07-06 Sanyo Electric Co Ltd 回路装置
US8093699B2 (en) 2004-12-22 2012-01-10 Sanyo Electric Co., Ltd. Circuit device with circuit board and semiconductor chip mounted thereon
JP2009049059A (ja) * 2007-08-14 2009-03-05 Toppan Forms Co Ltd 部品実装基板およびその製造方法
JP2009070865A (ja) * 2007-09-11 2009-04-02 Rohm Co Ltd 半導体装置
JP2009117496A (ja) * 2007-11-05 2009-05-28 Panasonic Corp 実装構造体およびその製造方法
JP2014086616A (ja) * 2012-10-25 2014-05-12 Denso Corp 電子装置およびその製造方法
US10498260B2 (en) 2015-11-13 2019-12-03 Seiko Epson Corporation Electric device, piezoelectric motor, robot, hand, and liquid transport pump
US10207503B2 (en) 2016-01-20 2019-02-19 Seiko Epson Corporation MEMS device, liquid ejecting head, liquid ejecting apparatus, and MEMS device manufacturing method

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