JP2001203205A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法Info
- Publication number
- JP2001203205A JP2001203205A JP2000012979A JP2000012979A JP2001203205A JP 2001203205 A JP2001203205 A JP 2001203205A JP 2000012979 A JP2000012979 A JP 2000012979A JP 2000012979 A JP2000012979 A JP 2000012979A JP 2001203205 A JP2001203205 A JP 2001203205A
- Authority
- JP
- Japan
- Prior art keywords
- copper
- film
- wire
- layer
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 36
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 88
- 229910052802 copper Inorganic materials 0.000 claims abstract description 88
- 239000010949 copper Substances 0.000 claims abstract description 88
- 239000010410 layer Substances 0.000 claims abstract description 44
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 17
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 17
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052796 boron Inorganic materials 0.000 claims abstract description 13
- 150000001875 compounds Chemical class 0.000 claims abstract description 13
- JUZTWRXHHZRLED-UHFFFAOYSA-N [Si].[Cu].[Cu].[Cu].[Cu].[Cu] Chemical compound [Si].[Cu].[Cu].[Cu].[Cu].[Cu] JUZTWRXHHZRLED-UHFFFAOYSA-N 0.000 claims abstract description 12
- 229910021360 copper silicide Inorganic materials 0.000 claims abstract description 12
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 6
- 239000002344 surface layer Substances 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 30
- 229910052751 metal Inorganic materials 0.000 claims description 26
- 239000002184 metal Substances 0.000 claims description 26
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 238000009413 insulation Methods 0.000 abstract description 4
- 238000009792 diffusion process Methods 0.000 description 22
- 239000007789 gas Substances 0.000 description 14
- 230000003647 oxidation Effects 0.000 description 12
- 238000007254 oxidation reaction Methods 0.000 description 12
- 239000011229 interlayer Substances 0.000 description 10
- 230000002265 prevention Effects 0.000 description 10
- 238000005530 etching Methods 0.000 description 7
- 238000006243 chemical reaction Methods 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 238000000206 photolithography Methods 0.000 description 5
- 229910004298 SiO 2 Inorganic materials 0.000 description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 4
- 239000012298 atmosphere Substances 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- KRKNYBCHXYNGOX-UHFFFAOYSA-N citric acid Chemical compound OC(=O)CC(O)(C(O)=O)CC(O)=O KRKNYBCHXYNGOX-UHFFFAOYSA-N 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000005885 boration reaction Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910001316 Ag alloy Inorganic materials 0.000 description 1
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 239000005751 Copper oxide Substances 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 101150016011 RR11 gene Proteins 0.000 description 1
- 229910001093 Zr alloy Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 229910000431 copper oxide Inorganic materials 0.000 description 1
- YCKOAAUKSGOOJH-UHFFFAOYSA-N copper silver Chemical compound [Cu].[Ag].[Ag] YCKOAAUKSGOOJH-UHFFFAOYSA-N 0.000 description 1
- XTYUEDCPRIMJNG-UHFFFAOYSA-N copper zirconium Chemical compound [Cu].[Zr] XTYUEDCPRIMJNG-UHFFFAOYSA-N 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- PUUOOWSPWTVMDS-UHFFFAOYSA-N difluorosilane Chemical compound F[SiH2]F PUUOOWSPWTVMDS-UHFFFAOYSA-N 0.000 description 1
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- VEDJZFSRVVQBIL-UHFFFAOYSA-N trisilane Chemical compound [SiH3][SiH2][SiH3] VEDJZFSRVVQBIL-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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Abstract
グ用のアルミニウムパッドを形成することなく、直接ワ
イヤをボンディングしうる半導体装置及びその製造方法
を提供することを課題とする。 【解決手段】 半導体基板上に形成された銅を主成分と
する金属配線の上にワイヤをボンディングする工程を含
む半導体装置の製造方法であって、半導体基板上に銅を
主成分とする金属配線を形成する工程と、全面に絶縁膜
を形成する工程と、金又はアルミニウムのワイヤをボン
ディングする部分のみの絶縁膜を除去して金属配線の一
部を露出する工程と、露出した金属配線の一部の表面層
に銅シリサイド層又は銅とホウ素との化合物層を形成す
る工程と、銅シリサイド層又は銅とホウ素との化合物層
の表面にワイヤをボンディングする工程とを含むことを
特徴とする半導体装置の製造方法により上記の課題を解
決する。
Description
の製造方法に関する。更に詳しくは、本発明は、銅を主
成分とする金属配線上に、ボンディング用のアルミニウ
ムパッドを形成することなく、直接ワイヤをボンディン
グしうる半導体装置及びその製造方法に関する。
かつ高いマイグレーション耐性を有する。そのため、半
導体装置を構成する集積回路の金属配線による信号遅延
を低減することができ、特に高密度で電流を流す動作の
場合、高い信頼性を保証することができる。このような
観点から、銅は、アルミニウムに代わる金属配線層用の
材料として、半導体装置に使用され始めている。
ロプロセッサのような高速論理回路を有する半導体装置
に用いられている。この半導体装置のパッケージングに
は、半導体装置(半導体チップ)上にバンプを形成する
フリップチップ技術が用いられている。汎用の半導体装
置では、金又はアルミニウムからなるワイヤを用いてボ
ンディングが行われる。しかし、このボンディングは最
低200℃程度の加熱を伴い、銅はこの温度では容易に
内部まで酸化されるので、安定にボンディングを行うこ
とが難しい。このため、銅からなる金属配線の上に、拡
散バリア性の金属層を介するか、介さずにアルミニウム
のパッドを設ける方法が提案されている(特開平8−7
8410号公報、特開平11−135506号公報)。
いて以下で説明する。シリコンの基板1に拡散層10を
形成した後、SiO2、SiN等の絶縁膜を層間絶縁膜
2として形成する。次に、コンタクトホールを層間絶縁
膜2に開口し、後に形成する銅配線5と層間絶縁膜2と
の密着性を向上させるためのTiNからなる密着層4を
CVD法により形成する。この密着層4は、銅配線5か
ら層間絶縁膜2への銅の拡散防止膜としての役割も兼ね
備えている。この密着層4の上に銅膜をDCスパッタリ
ング法で形成することで、銅膜5′でコンタクトホール
を埋め込む(図3(a)参照)。
成する(図3(b)参照)。次に、銅膜5′をフォトリ
ソグラフィ工程及びエッチング工程に付すことで、所望
のパターンを有する銅配線5を形成する。次いで、銅配
線5の表面にSiO 2、SiN等の絶縁膜からなる表面
保護膜12を形成する。更に、所定領域の表面保護膜1
2及び反射防止膜11を選択的に除去して銅配線5を露
出させることにより、パッド領域7aを開口する(図3
(c)参照)。
iNのような拡散防止膜3を20〜100nm形成し、
更にAlSiCuのような耐酸化性金属膜13を2μm
の厚さで形成する。次いで、パッド領域7aの近傍のみ
に拡散防止膜3及び耐酸化性金属膜13を残存させる
(図3(d)参照)。銅配線5のパッド領域7aを耐酸
化性金属膜13で覆う構造を採用することで、ボンデン
グが行われる面(ボンディング面)を200℃以上に加
熱して行う超音波圧着法でも、又は400℃以上に加熱
して行う熱圧着法でも、ボンディングの際の銅配線5の
酸化を防止することが可能となる。なお、図3(e)
は、ワイヤ8がパッド領域7aにおいてワイヤボンディ
ングされた状態を示している。
号に記載された、配線材料に銅を用いた場合のボンディ
ングされた二層配線を有する半導体装置の一例の概略断
面図である。この半導体装置は、次のように製造され
る。まず、ダマシン法により形成した銅配線5b上を絶
縁膜6で被覆し、ボンディングパッド部を開口する。こ
の後、アルミニウム系膜9で絶縁膜6を被覆し、フォト
リソグラフィ工程とエッチング工程によりボンディング
パッド部にアルミニウム系膜9を残す。次いで、金、ア
ルミニウム等のワイヤ8をボンディングパッド部にボン
ディングすることにより製造される。図中、2a〜2d
は層間絶縁膜、3a〜3cは拡散防止膜、4aと4bは
銅拡散防止膜、5aは銅配線を示す。
示された方法では、全面に拡散防止層及び耐酸化性層を
形成した後、フォトリソグラフィ工程及びエッチング工
程によりボンディングパッド部に拡散防止層及び耐酸化
性層を残存させている。そのため工程数が多く、製造コ
ストが増加するという問題があった。また、ボンディン
グパッド用のアルミニウムパッドを銅配線層上に形成す
る図4の方法は、アルミニウム又はアルミニウムと拡散
バリア性金属を堆積する工程、フォトリソグラフィ工程
とエッチング工程又は、化学機械研磨工程が増える。そ
のため、アルミニウム配線に比べて工程数が増加し、製
造コストが増加するという問題があった。
ば、半導体基板上に形成された銅を主成分とする金属配
線の上にワイヤをボンディングする工程を含む半導体装
置の製造方法であって、半導体基板上に銅を主成分とす
る金属配線を形成する工程と、全面に絶縁膜を形成する
工程と、金又はアルミニウムのワイヤをボンディングす
る部分のみの絶縁膜を除去して金属配線の一部を露出す
る工程と、露出した金属配線の一部の表面層に銅シリサ
イド層又は銅とホウ素との化合物層を形成する工程と、
銅シリサイド層又は銅とホウ素との化合物層の表面にワ
イヤをボンディングする工程とを含むことを特徴とする
半導体装置の製造方法が提供される。
主成分とする金属配線を備え、金属配線の一部の表面層
にワイヤのボンディング用の銅シリサイド層又は銅とホ
ウ素との化合物層を備えていることを特徴とする半導体
装置が提供される。
図2を用いて説明する。なお、これら図は、単なる一例
であって、本発明はこれらに限定されるものではない。
図1(a)〜(e)は、半導体装置の製造方法の一例を
製造工程順に示した概略工程断面図である。なお、ここ
では2層配線に適用した例を示している。なお、本発明
の方法は、1層配線でも、3層以上の多層配線でも適用
することができる。
止膜3aを、例えばCVD法、スピン塗布法により形成
する。ここで、基板は、特に限定されず公知の基板を使
用することができる。例えば、シリコン基板、ゲルマニ
ウム基板等の元素基板、GaAsのような化合物基板が
挙げられる。更に、基板上には、トランジスタ、負荷等
の素子が予め形成されていてもよい。なお、図1(a)
〜(e)では基板上に存在する素子が省略されている。
SiN膜、SiON膜、PSG膜、BPSG膜、F含有
SiO2膜や、これら以外にも各種低誘電率膜が使用で
きる。拡散防止膜としては、層間絶縁膜とエッチングの
選択比がとれ、銅の拡散を防止できる絶縁膜を使用する
ことができる。そのような絶縁膜としては、SiNx、
SiC等が挙げられる。
グ工程により、コンタクトホールと一層目の配線溝が形
成される。配線溝形成後に、銅拡散防止膜及び銅配線形
成用の銅膜をこの順に、被着する。次いで、CMP法に
より不要な部分の銅拡散防止膜及び銅膜を除去すること
により、銅拡散防止膜4aと銅配線5aからなる一層目
の配線を形成することができる(図1(a)参照)。
膜、TaN膜、TiN膜、TiW膜、TiWN膜、WN
膜、NbN膜等が挙げられ、スパッタ法、CVD法等に
より形成することができる。一方、銅膜の形成方法とし
ては、スパッタ法、CVD法、電解メッキ法等が挙げら
れる。更に、銅膜以外にも、銅銀合金、銅ジルコニウム
合金等の銅を主成分として含む膜も使用することができ
る。
目の銅配線を形成する(図1(b)及び(c)参照)。
図中、2b〜2dは層間絶縁膜、3bと3cは拡散防止
膜、4bは銅拡散防止膜、5bは2層目の銅配線を示
す。なお、以下の工程で露出するボンディングパッド部
の銅配線の厚さは、その表面のシリサイド化及びホウ素
化を考慮して、0.5〜2μmであることが好ましい。
えばCVD法により全面に形成し、フォトリソグラフィ
工程及びエッチング工程に付してボンディングパッド部
の銅配線の表面を露出させる(図1(d)参照)。その
後に、大気から隔離され、窒素雰囲気又は真空に維持さ
れた反応室で、ボンディングパッド部の銅表面を加熱す
る。窒素雰囲気又は真空に維持する理由は、銅の露出し
たウェハを大気中で加熱すると、銅が酸化されてしまう
からである。そのため、本発明の方法には、ロードロッ
ク室を有する装置を使用することが好ましい。
(SiH4ガス)又はジボランガス(B2H6ガス)を導
入し、これらガスに銅表面を暴露し、露出した銅表面に
銅シリサイド層又は銅とホウ素との化合物層7を形成す
る(図1(e)参照)。シリサイド化のためのガスとし
ては、モノシランガス以外にジシランガス(Si2H6ガ
ス)、ジフルオロシランガス(SiH2F2ガス)、トリ
シラン(Si3H8ガス)等が挙げられる。ここで、基板
を反応室に入れる前に、銅表面に形成される酸化膜を除
去して、新鮮な金属銅面が選択的に露出した状態である
ことが好ましい。除去の方法としては、フッ酸、クエン
酸等の酸化銅を銅に対して選択的に除去することができ
るエッチング液で処理する方法が挙げられる。
ド部の銅表面をシリサイド化又はホウ素化するだけなの
で、銅配線の抵抗にはほとんど影響を及ぼさない。むし
ろ、ボンディング時の酸化を確実に防止するため、銅表
面を10〜100nmだけシリサイド化又はホウ素化す
ることが望ましい。
045号公報に示されているような従来の銅配線表面を
シリサイド化する技術では、銅配線の側壁又は上部全面
をシリサイド化する必要があるため、シリサイド化を充
分に行うと抵抗が高くなり、その結果銅配線を使用する
利点が失われる。また、抵抗が許容できる程度にシリサ
イド化する場合、SiO2をCVD法により減圧下で成
膜する際の数秒の範囲では充分に耐えられるが、最終的
に銅が露出するボンディングパット部に対するボンディ
ングの際の加熱雰囲気及び湿度雰囲気では充分な耐酸化
性を得ることができない。
は、装置の大きさ、ウェハの大きさ、反応室内の全圧力
で最適な条件に調整される。例えば、6インチのウェハ
を、直径30cm、深さ30cmの円筒型の反応室内で
直径20cmの円板型ヒータ上でウェハを加熱する場
合、基板温度を300〜400℃、ガス流量を10〜1
00cc/分、暴露時間を30秒〜2分間とすることが
できる。また、反応室内の圧力は、常圧でもよく、0.
1〜10Torrの減圧でもよい。常圧で行う場合は、
シラン又はジボランと共に窒素のような不活性ガスを毎
分1リットル以上導入することで、シラン又はジボラン
の分圧を制御することが好ましい。
層を形成した部分の銅の見かけの抵抗率は、2.5〜5
μΩcmの範囲になるように各種条件を調整することが
好ましい。更に、本発明の方法によりシリサイド化又は
ホウ素化する部分はパッドの開口部のみであり、他の配
線は絶縁膜6で完全に保護されている。このため本発明
では、露出部分の銅の抵抗率のみが上昇するだけであ
り、回路の性能に悪影響を及ぼすことなく充分な耐酸化
性が得られるまで銅表面のシリサイド化又はホウ素化を
進めることができる。次いで、得られた半導体装置を切
り出し、パッケージへ固定した後、公知のボンディング
法により、例えば金のワイヤ8でボンディングすること
ができる(図2参照)。
ッド部にアルミニウムパッドを形成することなく、直接
ワイヤをパッド部にボンディングすることができ、
(2)銅の耐酸化性を向上させる部分をボンディングパ
ッド部分に限定できるため、半導体装置の回路性能に寄
与する部分の配線の抵抗を上昇させることがなく、ボン
ディングパッド部の耐酸化性を向上させることができ
る。また、本発明によれば、銅配線に対して安定にワイ
ヤがボンディングされた半導体装置を提供することがで
きる。
図である。
である。
Claims (4)
- 【請求項1】 半導体基板上に形成された銅を主成分と
する金属配線の上にワイヤをボンディングする工程を含
む半導体装置の製造方法であって、 半導体基板上に銅を主成分とする金属配線を形成する工
程と、 全面に絶縁膜を形成する工程と、 金又はアルミニウムのワイヤをボンディングする部分の
みの絶縁膜を除去して金属配線の一部を露出する工程
と、 露出した金属配線の一部の表面層に銅シリサイド層又は
銅とホウ素との化合物層を形成する工程と、 銅シリサイド層又は銅とホウ素との化合物層の表面にワ
イヤをボンディングする工程とを含むことを特徴とする
半導体装置の製造方法。 - 【請求項2】 銅を主成分とする金属配線の表面に形成
される銅シリサイド層又は銅とホウ素との化合物層が、
10〜100nmの厚さを有する請求項1に記載の製造
方法。 - 【請求項3】 銅とホウ素との化合物層が、金属配線を
構成する銅と、ジボランとを反応させることにより形成
される請求項1又は2に記載の製造方法。 - 【請求項4】 半導体基板上に銅を主成分とする金属配
線を備え、金属配線の一部の表面層にワイヤのボンディ
ング用の銅シリサイド層又は銅とホウ素との化合物層を
備えていることを特徴とする半導体装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000012979A JP3602024B2 (ja) | 2000-01-21 | 2000-01-21 | 半導体装置及びその製造方法 |
US09/697,161 US6569767B1 (en) | 2000-01-21 | 2000-10-27 | Semiconductor device and its production process |
TW089122811A TW501201B (en) | 2000-01-21 | 2000-10-30 | Semiconductor device and its production process |
KR10-2001-0001905A KR100421826B1 (ko) | 2000-01-21 | 2001-01-12 | 반도체 장치 및 그 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000012979A JP3602024B2 (ja) | 2000-01-21 | 2000-01-21 | 半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2001203205A true JP2001203205A (ja) | 2001-07-27 |
JP3602024B2 JP3602024B2 (ja) | 2004-12-15 |
Family
ID=18540636
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000012979A Expired - Fee Related JP3602024B2 (ja) | 2000-01-21 | 2000-01-21 | 半導体装置及びその製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US6569767B1 (ja) |
JP (1) | JP3602024B2 (ja) |
KR (1) | KR100421826B1 (ja) |
TW (1) | TW501201B (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003045960A (ja) * | 2001-08-01 | 2003-02-14 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US7170172B2 (en) | 2001-12-13 | 2007-01-30 | Nec Electronics Corporation | Semiconductor device having a roughened surface |
JP2009088548A (ja) * | 2008-12-01 | 2009-04-23 | Renesas Technology Corp | 半導体集積回路装置およびその製造方法 |
JP2021193745A (ja) * | 2015-12-18 | 2021-12-23 | ローム株式会社 | 半導体装置 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003031575A (ja) * | 2001-07-17 | 2003-01-31 | Nec Corp | 半導体装置及びその製造方法 |
JP2003045877A (ja) * | 2001-08-01 | 2003-02-14 | Sharp Corp | 半導体装置およびその製造方法 |
US6683383B2 (en) * | 2001-10-18 | 2004-01-27 | Intel Corporation | Wirebond structure and method to connect to a microelectronic die |
JP2003133312A (ja) * | 2001-10-25 | 2003-05-09 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP2004221098A (ja) * | 2003-01-09 | 2004-08-05 | Renesas Technology Corp | 半導体装置およびその製造方法 |
US20050224987A1 (en) * | 2004-04-07 | 2005-10-13 | Hortaleza Edgardo R | Structure and method for contact pads having double overcoat-protected bondable metal plugs over copper-metallized integrated circuits |
DE102004021261B4 (de) * | 2004-04-30 | 2007-03-22 | Advanced Micro Devices, Inc., Sunnyvale | Halbleiterbauelement mit einem Hybrid-Metallisierungsschichtstapel für eine verbesserte mechanische Festigkeit während und nach dem Einbringen in ein Gehäuse |
US7790611B2 (en) * | 2007-05-17 | 2010-09-07 | International Business Machines Corporation | Method for FEOL and BEOL wiring |
US8282846B2 (en) * | 2010-02-27 | 2012-10-09 | National Semiconductor Corporation | Metal interconnect structure with a side wall spacer that protects an ARC layer and a bond pad from corrosion and method of forming the metal interconnect structure |
US8339798B2 (en) * | 2010-07-08 | 2012-12-25 | Apple Inc. | Printed circuit boards with embedded components |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6459938A (en) * | 1987-08-31 | 1989-03-07 | Fujitsu Ltd | Manufacture of semiconductor device |
JPH0878410A (ja) | 1994-09-05 | 1996-03-22 | Mitsubishi Electric Corp | 配線接続部及びその製造方法 |
JPH11135506A (ja) | 1997-10-31 | 1999-05-21 | Nec Corp | 半導体装置の製造方法 |
US6303505B1 (en) * | 1998-07-09 | 2001-10-16 | Advanced Micro Devices, Inc. | Copper interconnect with improved electromigration resistance |
US6251775B1 (en) * | 1999-04-23 | 2001-06-26 | International Business Machines Corporation | Self-aligned copper silicide formation for improved adhesion/electromigration |
US6046108A (en) * | 1999-06-25 | 2000-04-04 | Taiwan Semiconductor Manufacturing Company | Method for selective growth of Cu3 Ge or Cu5 Si for passivation of damascene copper structures and device manufactured thereby |
-
2000
- 2000-01-21 JP JP2000012979A patent/JP3602024B2/ja not_active Expired - Fee Related
- 2000-10-27 US US09/697,161 patent/US6569767B1/en not_active Expired - Fee Related
- 2000-10-30 TW TW089122811A patent/TW501201B/zh not_active IP Right Cessation
-
2001
- 2001-01-12 KR KR10-2001-0001905A patent/KR100421826B1/ko not_active IP Right Cessation
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003045960A (ja) * | 2001-08-01 | 2003-02-14 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US7170172B2 (en) | 2001-12-13 | 2007-01-30 | Nec Electronics Corporation | Semiconductor device having a roughened surface |
US7560372B2 (en) | 2001-12-13 | 2009-07-14 | Nec Electronics Corporation | Process for making a semiconductor device having a roughened surface |
JP2009088548A (ja) * | 2008-12-01 | 2009-04-23 | Renesas Technology Corp | 半導体集積回路装置およびその製造方法 |
JP2021193745A (ja) * | 2015-12-18 | 2021-12-23 | ローム株式会社 | 半導体装置 |
JP7247289B2 (ja) | 2015-12-18 | 2023-03-28 | ローム株式会社 | 半導体装置 |
US11674983B2 (en) | 2015-12-18 | 2023-06-13 | Rohm Co., Ltd. | SiC semiconductor device with current sensing capability |
Also Published As
Publication number | Publication date |
---|---|
TW501201B (en) | 2002-09-01 |
JP3602024B2 (ja) | 2004-12-15 |
KR100421826B1 (ko) | 2004-03-10 |
US6569767B1 (en) | 2003-05-27 |
KR20010086329A (ko) | 2001-09-10 |
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