JP2001127248A5 - - Google Patents
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- Publication number
- JP2001127248A5 JP2001127248A5 JP1999310345A JP31034599A JP2001127248A5 JP 2001127248 A5 JP2001127248 A5 JP 2001127248A5 JP 1999310345 A JP1999310345 A JP 1999310345A JP 31034599 A JP31034599 A JP 31034599A JP 2001127248 A5 JP2001127248 A5 JP 2001127248A5
- Authority
- JP
- Japan
- Prior art keywords
- power
- signal
- control device
- input
- down signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 15
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000007599 discharging Methods 0.000 description 3
- 238000003786 synthesis reaction Methods 0.000 description 3
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31034599A JP3613095B2 (ja) | 1999-10-29 | 1999-10-29 | 電源制御装置 |
| US09/696,190 US6411070B1 (en) | 1999-10-29 | 2000-10-26 | Power control apparatus for timely powering down individual circuit block |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31034599A JP3613095B2 (ja) | 1999-10-29 | 1999-10-29 | 電源制御装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001127248A JP2001127248A (ja) | 2001-05-11 |
| JP2001127248A5 true JP2001127248A5 (enExample) | 2004-07-22 |
| JP3613095B2 JP3613095B2 (ja) | 2005-01-26 |
Family
ID=18004124
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP31034599A Expired - Fee Related JP3613095B2 (ja) | 1999-10-29 | 1999-10-29 | 電源制御装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6411070B1 (enExample) |
| JP (1) | JP3613095B2 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10349092B4 (de) * | 2003-10-22 | 2020-06-18 | Atmel Corp. | Integrierte Schaltungsanordnung zum Erkennen und Ausgeben von Steuersignalen |
| JP4546217B2 (ja) * | 2004-10-29 | 2010-09-15 | セイコーNpc株式会社 | パワーダウン回路 |
| JP6163319B2 (ja) * | 2013-02-25 | 2017-07-12 | エスアイアイ・セミコンダクタ株式会社 | 発振停止検出回路及び電子機器 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09103068A (ja) * | 1995-10-05 | 1997-04-15 | Hitachi Ltd | 電源装置 |
| US5864225A (en) * | 1997-06-04 | 1999-01-26 | Fairchild Semiconductor Corporation | Dual adjustable voltage regulators |
| US6272029B1 (en) * | 1999-02-05 | 2001-08-07 | United Microelectronics Corporation | Dynamic regulation scheme for high speed charge pumps |
-
1999
- 1999-10-29 JP JP31034599A patent/JP3613095B2/ja not_active Expired - Fee Related
-
2000
- 2000-10-26 US US09/696,190 patent/US6411070B1/en not_active Expired - Fee Related
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