JP2000279616A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a game board which can prevent illegal action allowing criminal game operation based on the possibility of the illegal passage and detection using a radio wave. SOLUTION: A second circuit part (a Zener diode 10 or an inverter 102b) receives a detection output of a starting port switch 17 from a first circuit part (a circuit for inputting a signal to a data input terminal 311 corresponding to the detection output of the starting port switch 17) and when the detection output gives an abnormal potential, it performs a signal processing to allow specifying of the occurrence of the abnormal potential. Moreover, when the detection output of the starting port switch 17 gives an abnormal potential, a third circuit part (an OR gate 110 or an inversion input buffer 109) receiving an output of the second circuit part performs a signal processing to input an interrupt signal indicating that the detection output of the starting port switch 17 corresponds to a criminal detection output. Then, a microcomputer 31 for game control performs an NMI interrupt processing to disable the game control based on an input of the interrupt signal from the third circuit part.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a game machine represented by, for example, a pachinko game machine and a coin game machine.
More specifically, the present invention relates to a gaming machine capable of controlling a gaming state in accordance with the passing of a ball to a ball passing area provided in a gaming area.

[0002]

2. Description of the Related Art A game machine of this type, which is generally known in the related art, is capable of controlling a game state in accordance with the passing of a ball to a ball passing area provided in a game area. There was something that was done. For example, as a typical example of such a gaming machine, there has been one in which control for performing a variable display operation of a variable display device is performed in accordance with a start winning of a hit ball in a starting winning area.

Such a gaming machine is provided with a passage detector for electrically detecting the passage of a ball to a ball passing area and inputting the detection output to a game control microcomputer. The game control microcomputer performs the above-described game operation based on the detection output of the detector.

[0004]

However, this type of conventional gaming machine has the following problems.
The above-mentioned passage detection means has a problem that it is susceptible to illegal radio waves because it is an electric device. In addition, even if the passage detecting means is not easily affected by the unauthorized radio wave, if the passage detecting means is replaced with a device susceptible to the unauthorized radio wave, it will be affected by the unauthorized radio wave. There was a problem. For this reason, in a conventional gaming machine, it is easy for an illegal act (hereinafter, also referred to as a radio wave goto) to perform an illegal game operation based on detecting an illegal passage using an illegal radio wave. In contrast,
In a conventional gaming machine, it is not possible to grasp that an illegal passage detection using an illegal radio wave is performed, and there is no defense against an illegal passage detection using an illegal electric wave.

The present invention has been conceived in view of the above circumstances, and an object of the present invention is to prevent an illegal act of performing an illegal game operation based on detecting an illegal passage using radio waves. Is to provide a simple gaming machine.

[0006]

According to the present invention, there is provided a gaming machine capable of controlling a gaming state in accordance with the passing of a ball to a ball passing area provided in a gaming area. Means for controlling the gaming state of the gaming machine based on the execution of information processing, comprising: an information input terminal capable of receiving input of information for controlling the gaming state; and information for interrupt processing. And an interrupt terminal capable of receiving the information, and it is possible to perform a process for controlling a game state based on the information input from the information input terminal, and to receive information from the interrupt terminal. Game control means capable of performing an interrupting process when inputted, pass detection means for detecting the passage of a hit ball in the ball pass area, and hitting the ball based on a detection output of the pass detecting means. The passing ball is detected in the passing area First signal processing means for performing signal processing for inputting a detection signal capable of specifying whether or not the signal is input to the information input terminal; and receiving a detection output of the passage detection means from the first signal processing means; When the detection output becomes an abnormal potential outside a predetermined range in which the detection output of the normal passage detection unit can fluctuate, the detection signal is input from the first signal processing unit to the information input terminal. Second signal processing means for performing signal processing for specifying that an abnormal potential has occurred, and an interrupt for performing the interrupt processing when the detection output of the passage detecting means has become the abnormal potential. And a third signal processing means for performing signal processing for inputting an interrupt signal to the interrupt terminal, wherein the second signal processing means includes a first signal processing means for receiving the interrupt signal from the first signal processing means. The detection output is An abnormal potential detecting means for detecting occurrence of the abnormal potential in response to the normal potential, wherein the third signal processing means includes a branch path for branching an output path of a detection output of the abnormal potential detecting means. In response to receiving the detection output of the abnormal potential detecting means from (i), an interrupt signal is input to the interrupt terminal, and the game control means determines the interrupt signal based on the detection signal input from the first signal processing means. The game state is controlled in accordance with the passing of the ball to the ball passing area, and the control of the game state is deactivated when receiving the interrupt signal from the third signal processing means. Interrupt processing is performed.

According to a second aspect of the present invention, in addition to the configuration of the first aspect, the second signal processing means includes:
An inverting means for performing signal processing for inverting a logic level of a detection output of the abnormal potential detecting means;
Wherein the signal processing means receives a detection output of the abnormal potential detecting means from a branch path provided between the abnormal potential detecting means and the inverting means.

According to a third aspect of the present invention, in addition to the configuration of the first aspect, the third signal processing means includes:
An inversion input means for performing a process of inverting a logic level of a signal to be input to the interrupt terminal as the interrupt signal before inputting the signal to the interrupt terminal is provided.

According to a fourth aspect of the present invention, in addition to the configuration of the first aspect, the abnormal potential detecting means includes a Zener diode element.

According to a fifth aspect of the present invention, in addition to the configuration of the first aspect, when an interrupt signal is input to the interrupt terminal from the third signal processing means, The game control unit further includes a notifying unit capable of notifying that the illegality has been performed with respect to the passage detecting unit, and the interruption process performed by the game control unit in response to the input of the interruption signal includes the passage detection unit. It is characterized in that the method includes a process of causing the notifying unit to perform a notification that an improper operation has been performed on the unit.

According to a sixth aspect of the present invention, in addition to the configuration of the first aspect, the interrupt terminal is a non-maskable interrupt terminal for which interrupts cannot be inhibited. .

According to a seventh aspect of the present invention, in addition to the configuration of the first aspect, a ball payout means capable of paying out a premium ball, and the payout of the premium ball output from the game control means. Further comprising ball payout control means capable of receiving command information about the payout of prize balls by the ball payout means in accordance with the command information,
When the control of the game state is deactivated in response to receiving the input of the interrupt signal, the game control means outputs command information for commanding prohibition of payout of the prize ball. .

According to an eighth aspect of the present invention, in addition to the configuration of the fifth aspect of the present invention, the notifying means includes a sound generating means for performing the notification by generating a sound. I do.

According to a ninth aspect of the present invention, in addition to the configuration of the fifth aspect of the present invention, the notifying means includes a displaying means for making the notification by a display.

According to a tenth aspect of the present invention, in addition to the configuration of the first aspect, the third signal processing means receives a detection output of the abnormal potential detecting means from the branch path. Preferably, the apparatus further comprises output holding means for holding the level of the detection output for a predetermined period.

[0016]

According to the first aspect of the present invention, the following operation is performed. A means for controlling a gaming state of a gaming machine based on execution of information processing, wherein an information input terminal capable of receiving input of information for controlling a gaming state and receiving information for interrupt processing. By the function of the game control means having a possible interrupt terminal, it is possible to perform a process for controlling the game state based on the information input from the information input terminal, and the information from the interrupt terminal It is possible to perform an interrupt process when an input is made. The passage of the hit ball in the ball passage area is detected by the function of the passage detecting means. By the operation of the first signal processing means, based on the detection output of the passage detection means, a detection signal capable of specifying whether or not the passing of a hit ball in the hit ball passing area is detected is input to the information input terminal. Is performed.
By the function of the second signal processing means, the detection output of the passage detection means is received from the first signal processing means, and the detection output becomes an abnormal potential outside a predetermined range where the detection output of the normal passage detection means can fluctuate. In this case, signal processing is performed to enable the occurrence of the abnormal potential to be specified by the detection signal input from the first signal processing means to the information input terminal. By the function of the third signal processing means, signal processing for inputting an interrupt signal for performing an interrupt processing to the interrupt terminal when the detection output of the passage detecting means has an abnormal potential is performed. Due to the function of the abnormal potential detecting means included in the second signal processing means, the occurrence of the abnormal potential is detected in response to the detection output of the passage detecting means received from the first signal processing means becoming the abnormal potential. Is done. With the further function of the third signal processing means, in response to receiving the detection output of the abnormal potential detection means from a branch path branched from the output path of the detection output of the abnormal potential detection means, the interruption signal is sent to the interruption terminal. Let me enter. By the further function of the game control means, the control of the game state according to the passing of the ball to the ball passing area is executed based on the detection signal input from the first signal processing means, and the third signal processing means When an interrupt signal is received, an interrupt process for inactivating the control of the game state is performed.

As described above, the control of the game state according to the passing of the ball to the ball passage area is executed based on the detection signal input to the information input terminal based on the detection output of the passage detecting means. Deactivates the control of the game state based on an interrupt signal input to the interrupt terminal in response to the detection output potential of the passage detection means becoming an abnormal potential outside a range that can fluctuate when normal. Is performed. Typically,
If the potential of the detection output of the passage detection means becomes a potential outside the range that can fluctuate when it is normal, there is a high possibility that unauthorized passage detection (radio wave goto) using radio waves has been performed. In such a case, the occurrence of the abnormal potential is detected by the abnormal potential detecting means included in the second signal processing means, and the third signal processing means branches the output path of the detection output of the abnormal potential detecting means. An interrupt signal is input from the third signal processing unit to an interrupt terminal of the game control unit in response to the detection output received from the path, and the game control unit inactively controls the game state based on the signal. Therefore, it is possible to prevent a fraudulent act of performing a fraudulent game operation based on a detection of a fraudulent passage using a radio wave. Further, the deactivation of the control of the game state in such a situation is performed by an interrupt process based on the input of an interrupt signal to the interrupt terminal, and thus is performed with priority over other control processes. For,
It is possible to immediately prevent an illegal act of performing an illegal game operation based on an illegal passage detection using radio waves. Whether the detection output of the passage detecting means is normal or not is determined by the third signal processing means, and the game control means performs the interrupt processing from the third signal processing means. It is only necessary to deactivate the control of the game state in response to the input of the signal of (i), so that it is not necessary for the game control means to perform the process of determining the detection output of the passage detection means. This makes it possible to reduce the load of the control processing of the game control means. In addition, since the control of the game state is deactivated when the detection output of the normal passage detection means has a potential outside the range that can fluctuate, noise intrusion and fluctuations in the power supply potential may occur. Even if the potential of the detection output of the passage detection unit fluctuates, it is possible to prevent the execution of erroneous control based on erroneous detection of the passage detection unit due to the fluctuation. Also, it is considered that the detection output of the passage detection unit may have an abnormal potential due to the short circuit of the passage detection unit. In such a case, the control of the game state is deactivated, and the radio wave is transmitted. When an abnormality occurs in the passage detection means due to a cause other than the misconduct used, the player can immediately notice the abnormal state of the gaming machine. Further, based on the input of the interrupt signal to the interrupt terminal, the game control means recognizes the occurrence of an abnormal state of the passage detection means. Therefore, it is not necessary to use the information transmission line used for transmitting the information for the game state control to recognize the occurrence of the abnormal state of the passage detection means, and it is possible to effectively use the information transmission line. become.

According to the second aspect of the present invention, in addition to the operation of the first aspect, the following operation is performed.
By the function of the inversion means included in the second signal processing means,
Signal processing for inverting the logic level of the detection output of the abnormal potential detection means is performed. The detection output of the abnormal potential detecting means is received by the third signal processing means from a branch path provided between the abnormal potential detecting means and the inverting means. As described above, the detection output of the abnormal potential detection means used in the signal processing by the second signal processing means is branched at a stage before receiving the inversion processing by the inversion means, and the abnormal potential is detected by the third signal processing means. Is used for signal processing according to the above, it is possible to avoid using redundant and unnecessary signal processing configurations.

According to the third aspect of the present invention, in addition to the effect of the first aspect, the following operation is performed.
By the function of the inverting input means included in the third signal processing means, a process of inverting the logic level of the signal to be input to the interrupt terminal as an interrupt signal before the input to the interrupt terminal is performed. As described above, since the process of inverting the logic level of the signal input to the interrupt terminal is performed before inputting the signal to the interrupt terminal, the detection output of the abnormal potential detecting means received from the second signal processing means is extremely low. Even if it becomes a high abnormal high potential, the abnormal high potential is not directly transmitted to the game control means, so that the game control means can be protected from the abnormal high potential.

According to the fourth aspect of the present invention, the following operation is performed in addition to the operation of the first aspect.
The second signal processing means includes a Zener diode element. By the function of this Zener diode element, an interrupt signal for causing an interrupt process when the potential of the detection output of the passage detection means becomes an abnormal potential outside the range in which the detection output of the normal passage detection means can fluctuate. Input to the interrupt terminal is allowed. Thus, the Zener diode element is
When used in the signal processing means, the operation of the element is stable, so that it is possible to prevent malfunction of signal processing by the second signal processing means as much as possible. In addition, since the Zener diode element is easy to handle, the use of the Zener diode element makes it easy to manufacture and maintain the gaming machine. Further, since the Zener diode element is inexpensive, the use of the Zener diode element can reduce the manufacturing cost of the gaming machine.

According to the fifth aspect of the present invention, in addition to the operation of the first aspect, the following operation is performed.
By the function of the notifying means, when an interrupt signal is input to the interrupt terminal from the third signal processing means, it is possible to notify that the illegality has been performed on the passage detecting means. The interruption process performed by the game control unit in response to the input of the interruption signal includes a process of causing the notifying unit to notify the passage detecting unit that an illegal operation has been performed. As described above, when a signal for causing the interrupt terminal to perform an interrupt process in response to the detection of an illegal passage is input,
As an interrupt process, it is possible to notify that the fraud targeting the passage detection means has been performed. Based on the notification, it is possible to notify that the fraudulent activity targeting the passage detection means has been performed. While being able to easily recognize,
The staff can promptly deal with such misconduct.

According to the present invention described in claim 6, in addition to the effect of the invention described in claim 1, the following operation is performed.
The interrupt terminal is a non-maskable interrupt terminal whose interrupt cannot be prohibited. An interrupt based on an input signal from a non-maskable interrupt terminal is not prohibited and is performed with higher priority than other controls. It becomes possible to do.

According to the seventh aspect of the present invention, the following operation is performed in addition to the operation of the first aspect.
By the function of the ball payout means, it is possible to pay out prize balls.
By the function of the ball payout control means, command information on payout of prize balls output from the game control means is received, and control on payout of prize balls is performed by the ball payout means according to the command information. When the control of the game state is deactivated in response to the input of the interrupt signal by the further operation of the game control means, the command information for commanding the prohibition of the payout of the prize ball is output. In this way, when fraudulent acts using radio waves are performed on the passage detecting means, the payout of the prize ball is prohibited, so that it is possible to prevent the fraudster from benefiting.

According to the present invention described in claim 8, in addition to the function of the invention described in claim 5, it operates as follows.
The notification is performed by generating sound by the function of the sound generation means included in the notification means. In this way, the fact that a wrongdoing has been performed on the passage detection means is notified by the sound, so that such a wrongdoing can be recognized even from a distance away from the gaming machine. become. Therefore, it becomes easier for the staff at the game hall to deal with such misconduct.

According to the ninth aspect of the present invention, the following operation is performed in addition to the operation of the fifth aspect of the invention.
By the function of the display means included in the notification means, notification is performed by display. As described above, the fact that an improper act has been performed on the passage detection means is notified by the display, so that such improper act can be visually and clearly recognized. Therefore, it becomes possible for the staff at the game hall to reliably recognize that the wrongdoing has been performed.

The present invention described in claim 10 acts as follows in addition to the effect of the invention described in claim 1. By the function of the output holding means included in the third signal processing means, in response to receiving the detection output of the abnormal potential detection means from the branch path, the level of the detection output is held for a predetermined period.
As described above, when the detection output of the abnormal potential detecting means is received from the branch path, the level of the detection output is held for a predetermined period, so that even when the level of the detection output of the abnormal potential detecting means becomes unstable, Since the level of the detection output is held for a predetermined period, a stable interrupt signal can be input to the interrupt terminal.

[0027]

Embodiments of the present invention will be described below in detail with reference to the drawings. In the following embodiments, a pachinko gaming machine will be described as an example of a gaming machine, but the present invention is not limited to this, and may be, for example, a coin gaming machine or the like, and a ball passing area provided in a gaming area. It can be applied to all gaming machines that can control the gaming state in accordance with the passing of a hit ball.

First Embodiment FIG. 1 shows a pachinko gaming machine 1 as an example of a gaming machine according to the present invention.
FIG. 5 is a front view of a card unit 50 installed correspondingly.

The card unit 50 is provided with a card available indicator lamp 161.
Is available to the player by lighting or flashing of the card availability indicator lamp 161. The card unit 50 is installed in a state where it is inserted between a plurality of pachinko gaming machines 1 installed on the gaming machine installation island, and a connection stand direction display indicates which of the left and right gaming machines is connected. Is displayed by the display 163.

When a player inserts a so-called nationwide common card having a card balance recorded therein into the card insertion slot 165, the card balance recorded on the nationwide common card is read. Next, when the player performs a predetermined ball lending operation, the balance of the lending unit amount set in advance is reduced, and the hit ball of the pachinko gaming machine 1 is supplied with the ball for the lending unit amount. Lent to plate 3.

The card unit 50 is provided with a fraction display switch 162. This fraction display switch 162
By pressing, information such as a card balance and an error code when an error occurs is displayed on an information display (not shown) provided in the pachinko gaming machine 1. In the figure, reference numeral 166 denotes a card unit lock. The front side of the card unit 50 can be opened by inserting a predetermined key into the card unit lock 166 and performing an unlocking operation.

The pachinko gaming machine 1 has a glass door frame 2 formed in a circular shape. Behind this glass door frame 2,
The game board 6 is detachably mounted. Further, on the lower surface of the glass door frame 2, there is a hit ball supply tray 3. A surplus ball tray 4 for storing balls overflowing from the hit ball supply tray 3 and an operation knob 5 for a player to operate the hit ball are provided below the hit ball supply tray 3.
Are provided. When the operation knob 5 is operated by the player, the pachinko balls stored in the hit ball supply tray 3 can be fired one by one. In the center of the game area 7, there is provided a variable display device 8 for variably displaying a special symbol, which is an example of identification information, on condition that a starting ball is hit into the starting port 14. The variable display device 8 includes a variable display 10 for normally displaying a symbol variably as a hit ball passes through the passing gate 11a, a passing storage display 10a,
A variable display section 9 for variably displaying a special symbol and a start storage display 18 are provided. Further, the variable display device 8
A movable piece 15 is provided below the starter port 14 provided on the left and right.
And a variable winning ball device 19 that is in an open state in which a hit ball can be won by tilting the opening / closing plate 20. Also,
As a general winning opening, a winning opening 2 is provided above the variable display device 8.
4a, a winning opening 24d on the left and right of the variable winning ball device 19,
24e, winning prize ports 24b, 2
4c are provided respectively. Reference numeral 26 denotes an out port which is collected as an out ball when the hit ball does not win any of the winning ports or the variable winning ball devices, and 25 is a decorative lamp.

Frame lamps (game effect LED 28a and game effect lamps 28b, 28c) are provided on the outer periphery of the game area 7.
And a prize ball lamp 51 which is lit when the prize ball is paid out, and a ball cut lamp 52 which is lit when the ball to be paid out is cut out. Speakers 27 and 2 for generating sound effects such as
7 are provided.

FIG. 2 is a front view of the game board 6. With reference to this front view, an outline of various game machines and games will be described below.

The variable display device 8 comprises a CRT display capable of variably displaying a plurality of types of special symbols. On the variable display unit 9 at the center of the variable display device 8, a plurality of types of special symbols are scroll-displayed from top to bottom on condition that a start winning has occurred. Thereafter, as a result of the variable display being terminated after a lapse of a predetermined period of time, the big hit becomes a big hit if the slotted pattern of the big hit symbol is stopped and displayed. In addition, when a big hit occurs in a predetermined positively changing symbol among the big hit symbols, the state changes to a probability fluctuation state, and the big hit probability changes to a high probability. When a big hit occurs, the open / close plate 20 of the variable winning ball device 19 is tilted to open a big winning opening. As a result, the first state is controlled to be advantageous to the player who can make the ball hit the large winning opening, and the gaming state becomes a gaming state (specific gaming state) advantageous to the player.

The large winning opening of the variable winning ball device 19 is divided into a specific winning area and a normal winning area. The winning ball that has won the specific winning area is detected by the V count switch 22. On the other hand, a normal winning ball that has won a normal winning area is detected by the count switch 23. The V count switch 22 and the count switch 23 are both
The prize balls that have won each prize area are promptly detected by the switches 22 and 23, and 15 prize balls are paid out each time a prize ball is detected.

The first state of the variable winning ball apparatus 19 is when the number of hit balls entering the special winning opening reaches a predetermined number (for example, nine) or when a predetermined period (for example, 30 seconds) has elapsed. When one of the earlier conditions is satisfied, the process is temporarily terminated and the opening / closing plate 20 is closed. As a result, the variable winning ball device 19 is controlled to the second state which is disadvantageous for a player who cannot make a hit ball. And
The ball that has entered during the period in which the variable prize ball device 19 is in the first state makes a specific prize in the specific prize area and is detected by the V count switch 22 again, and the variable prize ball device 19 is again set. Is set to the first state. The upper limit number of executions of the repetition continuation control is set to, for example, 16 times. In the repetition continuation control, a state in which the variable winning ball device 19 is in the first state is called a round. When the upper limit number of times of the execution of the repetition continuation control is 16, the variable prize ball device 19 is used for the first round to the 16th round for 16 rounds.
State.

The left and right portions of the variable display device 8 are provided with warp entrances 11 respectively.
The hit ball that has entered the warp entrance 11 is
The water flows downward through the back side of the game and is discharged again to the game area 7 from the warp outlet 13. Therefore, the warp exit 13
The ball that has been ejected from the ball is in a state where it is relatively easy to win the starting port 14. Usually, a symbol starting gate 11a is provided on the passage of the ball hitting the warp entrance 11 provided on the left side portion of the variable display device 8.

A hit ball that has entered the normal symbol starting gate 11 a is detected by the gate switch 12. On condition that the hit ball is detected by the gate switch, the variable display 10
Is variably started. If a further hit ball is detected by the gate switch 12 while the variable display 10 is variably displaying, the passing ball is stored with “4” as the upper limit of the storage number, and the stored number is passed. It is displayed on the storage display 10a.

The variable display 10 is composed of a seven-segment display, and variably displays identification information usually called a symbol. If the display result of the variable display 10 becomes a predetermined special display mode (for example, 7), "hit" is obtained.
When the display result of "hit" is derived on the variable display 10,
A pair of left and right movable pieces 15 provided in the starting port 14 is opened. As a result, the starting port 14 is in an open state, and the hit ball can be more easily started and won. If one of the hit balls wins while the starting port 14 is in the open state, the movable piece 15 closes to the original position, and the hit ball returns to a state in which it is difficult to win. Further, if a predetermined period has elapsed since the opening of the starting port 14, the movable piece 15 is closed to the original position and the open state ends even if a start winning does not occur. The starting winning ball that has won the starting opening 14 is promptly detected by the starting opening switch 17 provided on the game board 6. When the starting winning ball is detected by the starting port switch 17, six winning balls are paid out, and the variable display device 8 is variably started based on the detected output. The start winning detected by the start port switch 17 while the variable display device 8 is variably displayed is stored with “4” as the upper limit of the number of storages, and the stored number is displayed on the start storage display 18.

The general winning opening 24 (24a, 24b,
24c, 24d, and 24e), the winning balls switch 240 (240a, 2) provided on the gaming board 6
40b, 240c, 240d, 240e), which are promptly detected, and ten prize balls are paid out based on this.

Further, on the back surface of the pachinko gaming machine 1, a mechanism plate (not shown) is provided in a U-shape so as to be freely interposed. On the mechanism plate, a winning ball collecting gutter provided with an all winning ball detection switch for detecting all winning balls collectively,
A ball payout device that pays out a predetermined number of prize balls based on a winning ball,
There are provided a main board provided with various control circuits for control, a lamp control board provided with a control circuit for controlling various lamps, and various devices such as a driving motor for hitting a ball for firing.

The main board includes a game control microcomputer for controlling the game operation of a game device such as the variable display device 8 and the variable winning ball device 19, and a prize for controlling the payout of prize balls by driving a ball payout device. A ball payout control microcomputer is mounted. Further, the main board is provided with a firing control circuit for controlling the driving motor for hitting the ball. In this way, the main board controls the game operation of the pachinko gaming machine 1, controls the payout of prize balls in the pachinko gaming machine 1, controls the firing of hit balls, and the like.

The ball lending control board is connected to the card unit 50 via a unit relay board (not shown).
The ball payout device is driven to control the payout of ball lending. The lamp control board controls the operation of the electric decorative parts on the front of the pachinko gaming machine 1 based on commands or data from the main board. The driving motor for hitting ball is operated by the player operating the operation knob 5 () to fire hit balls one by one into the game area.

Next, with reference to FIG. 3 and FIG. 4, various control boards used for controlling the pachinko gaming machine 1 and components related thereto will be described. 3 and 4
FIG. 2 is a block diagram showing various control boards used for controlling the pachinko gaming machine 1 and components related thereto.

FIGS. 3 and 4 show a main board 87a, a ball rental control board 37, a lamp control board 35,
Voice control board 70, balance control board 74, buzzer board 7
5, a terminal board 67, and a display control board 216 are shown.

On the main board 87a, a microcomputer 31 for game control and a microcomputer 32 for controlling award ball payout are mounted, and a launch control circuit 91 is provided. These are sealed in the internal space of the board box. I have. The game control microcomputer 31 and the prize ball payout control microcomputer 32 may be provided on different boards. However, in the present embodiment, since both are mounted on the same board, the microcomputers are different from each other. The cost can be reduced as compared with the case of mounting on a substrate. Although various circuits for driving a solenoid, a motor and a lamp are mounted on the main board 87a, these circuits are omitted in the figure.

On the other hand, on the ball lending control board 37, a CPU 371 and the like for performing ball lending control are mounted. This CPU 37
Reference numeral 1 is provided at a predetermined position outside the board box of the main board 87a. Therefore, the card unit 50 and the CPU for ball lending control are compared with the case where the CPU 37 for ball lending control is mounted on the main board 87a and housed in the main board box.
By using a communication line for communication with the game device 37, an illegal signal can be prevented from being externally input to the game control microcomputer 31 or the prize ball payout control microcomputer 32.

The game control microcomputer 31 is
ROM 31c for storing a game control program and the like,
It includes a RAM 31b used as a work memory, and a CPU 31a that performs a control operation according to a control program. The game control microcomputer 31 is reset when the power is turned on. The game control microcomputer 31 periodically (for example, every 2 ms) executes an interrupt process, and every time the interrupt process is executed, the game control program is executed again from the beginning. The game control microcomputer 31 includes a gate switch 12,
Starting port switch 17, V count switch 22, 10 count switch 23, all winning ball detection switch 171, winning port switch 240 (240a, 240b, 240c,
240d, 240e), a full-battery switch 402 for detecting the fullness of the surplus ball tray 4, a ball-out detection switch 167,
Detection signals from the prize ball count switches 301A and 301B, the prize ball motor position sensor 300A, and the ball out switch 187 are input.

The detection output of the starting port switch 17 is input to the game control microcomputer 31 via a starting winning detection circuit, which will be described later, to be used for detecting a winning start. Further, the detection output of the starting port switch 17 is
The information is also input to the game control microcomputer 31 via an illegality detection circuit, which will be described later, to be used for determining whether or not the illegal operation has been performed on the starting port switch 17.

From the game control microcomputer 31 to the prize ball payout control microcomputer 32, command data (hereinafter, also simply referred to as a command) as command information relating to prize ball payout control, and payout control of ball lending are provided. A prize ball command including command data as command information is transmitted. When a prize ball command is output from the game control microcomputer 31, an INT signal indicating a valid period of the prize ball command is output accordingly. The INT signal has a low level (off state) in an invalid state, and has a high level (on state) in a valid state. The prize ball command is composed of 7-bit data. The lower 4 bits are used to specify the number of prize balls, and the upper 3 bits are used to specify the control content. The winning ball payout control microcomputer 32 that has received the winning ball command controls the ball payout device 59 according to the winning ball command.

The command data is composed of, for example, 7 bits of 8-bit transmittable data. Of these, bit 7 is used for the INT signal.
In command data for award ball control, bit 0 to bit 3
The number of prize balls is specified by a binary number using
The control contents are specified by a binary number using .about.bit 6. The bit 7 is not used for specifying the number of winning balls, but is used for an INT signal. For example, when bits 4 to 6 are “001”, normal payout is designated. The prize ball command for which the normal payout is specified in this way is called a prize ball number command. When bits 4 to 6 are “010”, a prize ball stop (forcible stop of the prize ball) is specified. The award ball command in which the award ball stop is specified in this way is called an award ball stop command. Bit 4
When the bit 6 is "100", the prohibition of firing (prohibition of firing of hit balls) is designated. Bits 4 to 6 are "10
In the case of "1", release of prohibition of firing is specified. Bit 4 ~
When bit 6 is “110”, prize ball prohibition is designated. When bits 4 to 6 are “111”, award ball prohibition cancellation is designated.

When the normal payout is performed in accordance with the winning, the normal payout is designated by bits 4 to 6 and
Bits 0 to 3 specify the number of payouts according to the winning. In the case other than the normal payout, the control content is specified by bits 4 to 6, but “0001” is fixedly specified by bits 0 to 3. That is,
“0001” in bits 0 to 3 specifies non-payout. Therefore, in commands other than the normal payout, the number of balls to be paid out is not specified, and payout is not performed.

R of the game control microcomputer 31
The OM 31c stores prize ball number information capable of specifying the number of prize balls to be paid out in accordance with the detection signals of the winning detection switches (240, 17, 22, 23) among the above switches. The game control microcomputer 31 specifies the number of prize balls to be paid out based on the detection signal of each switch, changes the INT signal for prize ball control from an invalid state to a valid state, and promptly transmits a prize ball command. Output to the payout control microcomputer 32. The INT signal has a high level (on state) in an invalid state, and has a low level (off state) in a valid state.

If the payout of the winning balls based on the previously output winning ball number command is not completed, the input detection signal is used as the RA of the game control microcomputer 31.
It is stored cumulatively in M31b. Then, on condition that the payout of the winning balls based on the preceding winning ball number command is completed, the winning ball number command based on the storage in the RAM 31b is output at a predetermined timing. Until the input detection signal can be processed, the RAM 31b stores counters (counters A, B, and C) that can be stored for each number of prize balls to be paid out. Counter A has
V count switch 22 and 10 count switch 2
3, the detection signals corresponding to the number of payouts = 15 are collectively stored. The counter B stores a detection signal of the starting port switch 17, that is, a detection signal corresponding to the number of payouts = 6. The counter C has a detection signal of each winning opening switch 240, that is, the number of payouts = 10
The corresponding detection signal is stored.

Microcomputer 32 for controlling prize ball payout
Is a ROM 3 for storing a program for controlling award ball payout, and the like.
2c, a RAM 32b used as a work memory, a CPU 32 performing a control operation in accordance with a control program
a. Microcomputer 32 for controlling prize ball payout
Controls the payout of balls in accordance with the prize ball command input on condition that the INT signal is in the valid state. For example, when a prize ball number command is input on condition that the INT signal is in a valid state, a drive signal is output to the ball payout device 59,
The payout control for paying out the number of winning balls specified by the winning ball number signal is performed. In the ball payout device 59, the drive signal drives the prize ball motor 289A to pay out the prize balls. If a prize ball stop command is input on condition that the INT signal is in the valid state, the drive signal is output to the ball payout device 59 even if the prize ball is being paid out. Is stopped, and the payout operation of the prize ball is forcibly stopped.

As described above, the game control microcomputer 31 immediately receives the prize balls based on the detection signals of the various prize detection switches (240, 17, 22, 23) provided on the game board 6. Since the number command can be output to the prize ball payout control microcomputer 32, a prize ball is paid out immediately after a hit ball enters various winning ports. For this reason, the payout control of the prize ball can be performed more quickly than the conventional gaming machine that pays out the prize ball after the detection of the all-prize-ball detecting switch 171 provided on the mechanism plate 53 on the back of the game board. . Furthermore, since the various winning detection switches (240, 17, 22, 23) are provided individually on the game board 6 corresponding to the respective winning ports, it is possible to detect the winning of the hit ball more quickly. The payout control of the prize balls can be performed more quickly.

The game control microcomputer 31 comprises:
Various winning detection switches (240, 17, 22, 23)
After the prize ball number command is output to the prize ball payout control microcomputer 32 promptly based on the input of the detection signal, the CPU waits for a prize ball to be detected by the all prize ball detection switch 171. If no prize ball is detected even after a predetermined time has elapsed, a lamp control signal (command data) is output to the lamp control board 35 together with a lamp control INT signal. The lamp control board 35 generates a game effect lamp 28 (28a, 28a, 28a,
28b, 28c) in a predetermined manner.

Since the gaming effect lamp 28 blinks in a predetermined manner, the prize ball is quickly paid out based on the winning of the ball at the winning opening, but the prize ball is not actually generated. It is determined whether or not an act of generating a radio wave and outputting a detection signal from a winning detection switch (240, 17, 22, 23) provided corresponding to each winning opening to illegally obtain a prize ball is performed. You can check. In addition, the game effect lamp 28 is not only flickered,
A buzzer signal may be output to the buzzer board 75 so that a warning sound is generated from the buzzer 75a.

The game control microcomputer 3
1 indicates that when a prize ball is paid out, the prize ball lamp 5 is displayed on the lamp control board 35 together with the lamp control INT signal.
A lamp control signal (command data) for lighting 1 is output. As a result, when the payout of the prize ball is performed, the lighting of the prize ball lamp 51 is controlled by the lamp control board 35. In addition, the microcomputer 31 for game control, when the ball for paying out a prize ball is out of ball,
A lamp control signal (command data) for turning on the burnout lamp 52 is output to the lamp control board 35 together with a lamp control INT signal. As a result, when the ball is cut out, the lamp control board 35 causes the lamp 5 to cut out.
2 is controlled to be lit. Such a prize ball lamp 51 and a ball out lamp 52 are controlled so that both do not light or blink simultaneously in the normal state.

The game control microcomputer 3
Reference numeral 1 denotes a fraud detection error related to the start-up switch 17 (the start-up switch 1
7), a lamp control board 35 and a prize ball lamp 51 and a ball out lamp 52 are simultaneously transmitted to the lamp control board 35 to notify a fraud detection error. Outputs the lamp control signal to turn on (error detection error lamp lighting command). As a result, when a fraud detection error occurs, the prize ball 51
And the ball out lamp 52 are simultaneously turned on. The display of the lamp in this manner is called a fraud detection error lamp display.

The error display LED 350 comprises a seven-segment display capable of displaying an error code, and is connected to the lamp control board 35. Error display LED 35
0 is provided to indicate the type of error relating to the payout of award balls by an error code. When an abnormal state (error state) relating to the payout of award balls occurs, the game control microcomputer 31 uses command data for instructing to specify the type of error and to notify the occurrence of the error state as a lamp control signal. Lamp control board 35
Give to. Upon receiving the command data, the lamp control board 35 controls the error display LED 350 to display an error code indicating the type of error.

The game control microcomputer 31
Burnout switch 167 or burnout switch 187
The detection signal from indicates that the ball is broken, or
If the detection signal from the full tank switch 402 indicates a full tank state, the prize ball payout control microcomputer 32
The process for paying out the prize ball is stopped.

The game control microcomputer 31
The solenoid 16 is controlled to open and close the movable piece 15 of the starting port 14. Game control microcomputer 31
Opens the movable piece 15 in response to the variable display result of the variable display 10 becoming a special display mode, and detects two starting winning balls by the starting port switch 17 while the movable piece 15 is open. In this case, control is performed to close the movable piece 15. The game control microcomputer 31 controls the solenoid 21 to open and close the open / close plate 20 of the variable winning ball device 15. Further, the game control microcomputer 31 controls the start storage display 18, the variable display 10, and the decoration lamp 25. Also,
The game control microcomputer 31 is provided with jackpot information indicating occurrence of a jackpot, start information indicating the number of start winning balls,
Probable variation information indicating that a probability change has occurred, symbol determination frequency information indicating the number of times the variable display result has been derived and displayed, prize ball information on the number of prize balls paid out, and the like are provided on the mechanism plate of the pachinko gaming machine 1. It is output to a host computer such as a hall management computer via the terminal board 67.

The game control microcomputer 31
An image display control signal is output to the display control board 216 together with the INT signal. The display control board 216 controls the image display of the variable display device 8 based on the display control command data, provided that the INT signal is in the valid state. Specifically, the image display control signal includes data for an image display control command called a display control command. Various commands relating to image display control of the variable display device 8 are performed by the display control command.

For example, when the above-described fraud detection error occurs, the game control microcomputer 31
Outputs, to the display control board 216, a display control INT signal and a fraud detection error display command for notifying the occurrence of a fraud detection error by image display. As a result, when a fraud detection error has occurred, the variable display unit 9 displays a fraud detection error image for notifying that a fraud detection error has occurred.

The game control microcomputer 31
An audio control signal is output to the audio control board 70 together with the INT signal. The sound control board 70 generates a predetermined sound effect from the speakers 27 based on the sound control signal, provided that the INT signal is in a valid state.
Specifically, the voice control signal includes voice control command data called a voice command. By the voice command, various commands relating to voice such as the type of voice to be output from the speakers 27 are performed. Voice control board 70
The voice control circuit provided in the speaker 27 performs a process of outputting the voice commanded by the voice command from the speakers 27 and 27.

For example, when the above-described fraud detection error occurs, the game control microcomputer 31
Outputs, to the voice control board 70, a voice message INT signal and a fraud detection error voice command for notifying by voice that a fraud detection error has occurred. This ensures that if a fraud detection error occurs,
Speakers 27, 27 output a fraud detection error sound for notifying that a fraud detection error has occurred.

The firing control circuit 9 provided on the main board 87a
Reference numeral 1 denotes an operation knob 5, a driving motor 94 for hitting a ball, and a touch ring 168 for detecting whether or not a game is being played by utilizing the fact that a change occurs in static electricity when a player touches the operation knob 5. , And a single fire switch 169. The firing control circuit 91 controls the driving of the hit ball driving motor 94 so that the hit ball is fired at a speed corresponding to the operation amount of the operation knob 5. In addition, the single fire switch 169
When the detection signal is detected, the driving motor 94 is controlled so that the ball is fired at a predetermined interval. further,
The firing control circuit 91 responds to a hitting prohibition signal input from the game control microcomputer 31 or the prize ball payout control microcomputer 32 to drive the ball driving motor 9.
4 is stopped, and the ball is controlled so as not to be hit.

The ball payout device 59 is provided with a prize ball mechanism for paying out a prize ball and a ball lending mechanism for lending a lending ball as independent mechanism portions. Screw (not shown) for feeding the ball and a motor (prize ball motor 289) for driving the ball feeding screw
A, a ball lending motor 289C) is provided. A drive signal is input to the prize ball motor 289A from the prize ball payout control microcomputer 32. On the other hand, ball rental motor 2
A drive signal is input to 89C from the ball lending control board 37. The ball payout device 59 can simultaneously perform the payout of the prize balls and the lending of the balls in parallel.

Further, the prize ball mechanism portion of the ball payout device 59 has a prize ball motor position sensor 300 for detecting the ball fed by the ball feeding screw on the upper side of the prize ball mechanism portion.
A, a prize ball count switch 30 for detecting, on the lower side of the prize ball mechanism portion, a ball that is fed from the prize ball mechanism portion toward the hitting ball supply tray 3 after being fed by the ball feeding screw.
1A and 301B are provided. Similarly, in the ball lending mechanism portion of the ball payout device 59, a ball lending motor position sensor 300C for detecting the ball fed by the ball feeding screw on the upper side of the ball lending mechanism portion, and a ball feeding screw. A ball lending count switch 301C for detecting a ball falling from the ball lending mechanism portion toward the hitting ball supply tray 3 after being fed out on the lower side of the ball lending mechanism portion is provided.

The detection signals from the ball lending count switch 301C and the ball lending motor position sensor 300C are input to the I / O port 372 of the ball lending control board 37. The detection signals from the prize ball count switches 301A and 301B are input to the game control microcomputer 31 of the main board 87a. The detection signal from the prize ball motor position sensor 300A is input to the game control microcomputer 31 and the prize ball payout control microcomputer 32 of the main board 87a.

Microcomputer 32 for controlling prize ball payout
Outputs a buzzer signal to the buzzer board 75 when a predetermined error such as a ball biting error is detected, and stops the buzzer signal on condition that a reset operation is detected by the reset switch 400A.

The ball lending control board 37 includes an I / O port 372
, A ball lending number signal indicating the number of lending balls is output to the terminal board 67. When a predetermined error is detected, a buzzer signal is output to the buzzer board 75 and an error signal is output to the error display LED 374. Then, the buzzer signal and the error signal are stopped on condition that the reset operation is detected by the reset switch 400B.

The balance display board 74 is connected to a frequency display LED, a ball lending switch, and a return switch provided near the hit ball supply tray 3. A card unit control microcomputer (not shown) is mounted on the card unit 50, and a ball lending switch signal and a return switch signal are supplied to the card unit control microcomputer via the ball lending control board 37.

Further, a card balance display signal indicating the balance of the prepaid card and a ball lending possible display signal are given from the card unit 50 to the balance display board 74 via the ball lending control board 37. Between the card unit 50 and the ball lending control board 37, a unit operation signal (BRDY signal), a ball lending request signal (BRQ signal), and a ball lending completion signal (EXS)
Signal) and a pachinko machine operation signal (PRDY signal) are exchanged.

When the power of the pachinko gaming machine 1 is turned on,
The CPU 371 of the ball rental control board 37 includes the card unit 5
The PRDY signal is output to 0. When the card is accepted in the card unit 50 and the ball lending switch is operated and the ball lending switch signal is input, the microcomputer for controlling the card unit sends a BRD to the ball lending control board 37.
Outputs Y signal. When a predetermined delay time has elapsed from this point, the microcomputer for controlling the card unit outputs a BRQ signal to the ball lending control board 37. Then, the lending control CPU 371 of the ball lending control board 37 drives the ball lending motor 289C and pays out a predetermined number of lending balls to the player. When the payout is completed, the lending control CPU 371 outputs an EXS signal to the card unit 50.

As described above, all signals from the card unit 50 are input to the ball lending control board 37. Therefore, regarding the ball lending control, the card unit 5
No signal is input to the main board 87a from 0, and there is no room for illegally inputting a signal from the card unit 50 side to the game control microcomputer 31 of the main board 87a.

Next, a detection circuit related to the starting port switch 17 will be described. FIG. 5 is a block diagram showing a detection circuit related to the starting port switch 17.

The starting port switch has a coil for detection, and detects a pachinko ball using a back electromotive force generated in the coil for detection when the pachinko ball passes through the hole for detection. In FIG. 5, the detection coil is equivalently shown as a resistor.

Power supply node 20 receiving power supply potential of 12 V
0a and the ground node 200b receiving the ground potential, the coil 170 of the starting port switch 17 and the resistance element 105a are connected in series. A connection node between the coil 170 and the resistance element 105, and a ground node 200b
, The capacitor 106 is connected. A connection node between the coil 170 and the resistance element 105 is connected to the input terminal of the inverter 102a via the resistance element 111. The inverter 102a, the inverter 102b described later, and the inverting input buffer 10 described later
Each of the inverters used in the inverters 4 and 109 has a threshold of a predetermined potential level, and inverts the potential level of the input signal when the potential level of the input signal exceeds the threshold value (in the case of high level). A signal inverting circuit that outputs a low-level signal and outputs a high-level signal obtained by inverting the potential level of the input signal when the potential level of the input signal becomes equal to or lower than the threshold (low level). Is a logic gate circuit used as a logic gate circuit.

A resistance element 103a and an inverting input buffer 104 are connected between an output terminal of the inverter 102a and a data input terminal 311 for detecting a winning start in the microcomputer 31 for game control. The inverting input buffer 104 is composed of a group of inverters and outputs a signal obtained by inverting the signal level of the input signal. The signal output from the output terminal of the inverter 102a is supplied to the data input terminal 311 via the inversion input buffer 104a for detecting the start winning in the inversion input buffer 104. A connection node between the inverter 102a and the inverting input buffer 104 is connected at one end to the other end of the resistance element 103a receiving a potential of 5V. This resistance element 103a is for maintaining the high-level output potential of the inverter 102a at a predetermined potential level. A connection node between the inverting input buffer 104 and the data input terminal 311 is connected to a data bus.

A zener diode 107 for fraud detection and an inverter 102b are connected in series between a connection node between the coil 170 and the resistance element 105 and an input terminal of the inverter 102a. The zener diode 107 and the inverter 102b are connected in parallel with the resistance element 111. That is, the detection output of the starting port switch 17 is branched into a signal path toward the resistance element 111 and a signal path toward the zener diode 107. Zener diode 107 supplies current to the input terminal side of inverter 102b when the potential of the connection node between coil 170 and resistance element 105 becomes an abnormal potential equal to or higher than a predetermined potential (6.8 V) as a threshold value. Connected.

Zener diode 107 and inverter 1
02b is connected to one of the input terminals of the OR gate 110. That is, the OR gate 110
Receives one input signal from a signal path branched from a connection node between the Zener diode 107 and the inverter 102b. The OR gate 110 includes a gate switch 12 including the starting port switch 17, and each winning port switch 2.
The detection output from the Zener diode 107 as described above provided corresponding to various game ball detection switches for detecting the passing of a hit ball, such as the 40, 10 count switch 23, and the V count switch 22, is input signal. And a logic gate circuit that sets the level of the output signal to a high level when the detection output from the Zener diode 107 corresponding to any of the detection switches goes to a high level.

An inverting input buffer 109 is connected between the output terminal of the OR gate 110 and the non-maskable interrupt terminal (hereinafter referred to as NMI terminal) 312 of the game control microcomputer 31. The inverting input buffer 109 is composed of a group of inverters and outputs a signal obtained by inverting the signal level of the input signal. The signal output from the output terminal of the OR gate 110 is supplied to the NMI terminal 312 via the inverted input buffer unit 109 a for detecting a winning start in the inverted input buffer 109. A connection node between the inverting input buffer 109 and the NMI terminal 312 is connected at one end to the other end of the resistance element 103b receiving a potential of 5V. This resistance element 1
03b is for holding the high-level output potential of the inverting input buffer 109 at a predetermined potential level.

Here, the non-maskable interrupt is a kind of hardware interrupt, and refers to an interrupt process whose generation cannot be prohibited. Non-maskable interrupt processing is performed on the NMI terminal 3
When the level of the signal input to 12 becomes low, the processing is executed in preference to other processing that can be executed in the game control microcomputer 31.
In the case of this embodiment, when the level of the signal input to the NMI terminal 312 becomes low, the interrupt processing for fraud detection (NMI interrupt processing) shown in FIG. 25 is executed.

The above-described resistance element 10 for detecting the start winning prize.
5, capacitor 106, resistance element 111, inverter 1
02a, a resistance element 103a, an inverting input buffer unit 104a in the inverting input buffer 104, a zener diode 107 for fraud detection, and an inverter 102b.
Are the gate switch 12 connected to the game control microcomputer 31, each winning opening switch 240, the 10 count switch 23, and the V count switch 22
And the like, corresponding to various game ball detection switches for detecting the passage of the hit ball. Therefore, the detection outputs of these sensors are subjected to the same processing as the start winning signal.

Here, the resistance element 105 and the capacitor 10
6, resistance element 111, inverter 102a, resistance element 1
03a and the inverting input buffer unit 104a in the inverting input buffer 104 are referred to as a first circuit unit in the following description. The first circuit unit outputs a detection signal to the data input terminal 311 which can specify whether or not the passing of a hit ball has been detected, based on the detection output of the game ball detection switch (in this case, the starting port switch 17). This is for performing signal processing for inputting. Zener diode 1
07 and the inverter 102b are referred to as a second circuit unit in the following description. The second circuit unit receives a detection output of the game ball detection switch (in this case, the starting port switch 17) from the first circuit unit, and a predetermined output that allows the detection output of the game ball detection switch having a normal detection output to fluctuate. When the potential becomes abnormal outside the range, the data input terminal 3
This is for performing signal processing for enabling the detection signal input to 11 to specify that the abnormal potential has occurred. Further, the OR gate 110, the inverting input buffer 109, and the resistance element 103b are referred to as a third circuit unit in the following description. The third circuit unit causes the NMI terminal 312 to input an interrupt signal for performing an interrupt process when the detection output of the game ball detection switch (in this case, the starting port switch 17) becomes the abnormal potential. For performing signal processing.

Each of the above-described inverted input buffer 104 and inverted input buffer 109 has a function as an input port of the game control microcomputer 31. In the inverting input buffer 104, the inverting input buffer unit 104a as a component for the start winning detection circuit is called a first port.

In this embodiment, the zener diode 107 is used to detect fraud in the fraud detecting circuit.
The example which used was shown. Since the operation of the Zener diode element is stable, it is possible to prevent the malfunction of signal processing by the improper detection circuit as much as possible. Further, since the Zener diode element is easy to handle, the use of the Zener diode element facilitates the manufacture and maintenance of the pachinko gaming machine 1. Further, since the Zener diode element is inexpensive, by using it, the manufacturing cost of the main board 87a can be reduced, and as a result, the manufacturing cost of the pachinko gaming machine 1 can be reduced.

FIG. 5 shows an example in which a signal from the third circuit unit is received by NMI terminal 312 to perform an interrupt process for fraud detection. However, not limited to this, the third
A signal from the circuit unit may be received by a maskable interrupt terminal that receives a general INT signal, and interrupt processing for fraud detection may be performed. Here, the maskable interrupt is
This is a type of hardware interrupt, and refers to interrupt processing that can be prohibited from occurring.

The OR gate 110 and the inverting input buffer 109 in the third circuit section described above may be replaced with a NOR gate, which is a logic gate circuit that performs the same operation as the operation when these are combined.

FIG. 6 is a table showing potential levels in respective parts of the circuit shown in FIG. 5 according to operating states in a table format. In FIG. 6, at normal times (when the start-up switch 17 is not detected), when a winning is detected (when the start-up switch 17 is detected), a radio wave (a radio wave target for the start-up switch 17)
The potential level of each part in each state of a short circuit (short circuit of the startup port switch 17) and a removal state (when the startup port switch 17 is removed) is shown.

In FIG. 6, the potential level of each part is
The potential level on the input side (input terminal) of the first port (inverting input buffer unit 104a), the potential level on the output side (output terminal) of the first port, and the input level (input of the Zener diode 107) in the second circuit unit A potential level on the output side (output terminal of the inverter 102b) in the second circuit portion, a potential level on the input side (input terminal of the OR gate 110) in the third circuit portion, and NM.
The input potential level of the I terminal 312 is shown.

In FIG. 6, the low level is changed to "LO
W ", and the high level is indicated by" HIGH ".
The operation of the circuit shown in FIG. 5 will be described below with reference to FIGS.

First, a case where the pachinko ball is not detected by the starting port switch 17 in a normal state will be described. In a normal state in which the pachinko ball is not detected by the starting port switch 17, the resistance value of the coil 170 becomes a predetermined value (680).
Ohm), and the power supply node 200a
And a potential difference is generated between both ends of the resistance element 105. As a result, the potential of the connection node between the coil 170 and the resistance element 105 does not exceed the threshold of the Zener diode 107, but becomes the potential at which the input potential of the inverter 102a exceeds the threshold. As a result, the input of the second circuit unit becomes a high level (less than the threshold of the Zener diode 107) based on the threshold of the inverter 102a. In that case, a charge corresponding to the voltage between both ends of the resistance element 105 is accumulated in the capacitor 106.

As described above, in the normal state in which the pachinko ball is not detected by the starting port switch 17, the potential of the connection node between the coil 170 and the resistance element 105 is lower than the threshold value of the Zener diode 107. It becomes the potential at the time of detection. Therefore, no current is supplied from the Zener diode 107 to the inverter 102b. As a result, the input potential of the inverter 102b becomes a low level equal to or lower than the threshold. When the input potential is inverted by the inverter 102b, the inverter 102a
, Ie, the output potential of the second circuit unit is at a high level based on the threshold value of the inverter 102a. As a result, the input of the inverter 102a becomes a high level, and the output of the inverter 102a becomes a low level by inverting the level.

In the inverting input buffer 104, the input of the inverting input buffer 104a goes low, and the level is inverted, so that the output of the inverting input buffer 104a goes high. That is, the input of the first port goes low, and the output of the first port goes high. As a result, a high-level signal is supplied to the data input terminal 311 of the game control microcomputer 31.

In this case, as described above, the inverter 10
Since the input potential of 2b goes low, the OR gate 1
The input of 10, ie, the input of the third circuit unit, goes low. Thus, when the input of the OR gate 110 is at a low level, the output of the OR gate 110 is at a low level. Therefore, in the inverting input buffer 109 receiving the low level, the input of the inverting input buffer unit 109a becomes a low level, and the output of the inverting input buffer unit 109a becomes a high level by inverting the level. That is, the potential level of the input of the NMI terminal 312 becomes a high level.

Next, a description will be given of a case where a winning state is detected in which a pachinko ball has been detected by the starting port switch 17. In the first circuit unit, the resistance value of the coil 170 becomes infinite ohm, and the electric charge of the capacitor 106 is discharged through the resistance element 105. However, the potential becomes a low-level potential (0 V) that does not exceed the threshold value of the Zener diode 107 or the threshold value of the inverter 102a. As a result, the input of the second circuit unit is at a low level based on the threshold value of the inverter 102a. In this case, the resistance element 111
Since the Zener diode 107 does not receive the potential and the Zener diode 107 becomes inactive, the potential of the connection node between the resistance element 111 and the input terminal of the inverter 102a becomes low level (0 V).

As described above, the output potential of the inverter 102a, that is, the output potential of the second circuit portion,
It becomes a low level based on the threshold value of 02a. When the input potential is inverted by the inverter 102a, the input of the inverting input buffer unit 104a goes high in the inverting input buffer 104, and the output of the inverting input buffer unit 104a goes low by inverting the level. Level. That is, the input of the first port goes high and the output of the first port goes low. As a result, a low-level signal is supplied to the data input terminal 311 of the game control microcomputer 31.

In this case, the level of the input signal to the input terminal of the game control microcomputer 31 becomes high after a predetermined period of time after passing the pachinko ball. Regarding the starting port switch 17, when the input signal goes low for a predetermined period of the winning state, the game control microcomputer 31 determines that the starting port switch 17 has normally detected the starting winning ball. .

In this case, as described above, the Zener diode 107 is inactive and the input potential of the inverter 102b goes low, so that the input of the OR gate 110, that is, the input of the third circuit section, goes low. Become. Thus, when the input of the OR gate 110 is at a low level, the output of the OR gate 110 is at a low level.
Therefore, the inverting input buffer 1 receiving the low level
At 09, the input of the inverting input buffer unit 109a becomes low level, and the level is inverted, so that the output of the inverting input buffer unit 109a becomes high level. That is, the potential level of the input of the NMI terminal 312 becomes a high level. That is, in the case of the winning state, a signal of the same level as in the normal state is given from the third circuit unit to the game control microcomputer 31.

Next, a description will be given of a case where the detection output of the starting port switch 17 becomes an incorrect detection output due to an illegal radio wave, that is, a case where a radio wave is performed. When the radio wave is performed, the resistance value of the coil 170 becomes 0 ohm, the potential of the connection node between the coil 170 and the resistance element 105b is higher than the threshold value of the inverter 102a, and the The potential becomes a high level potential higher than the threshold value.

In this case, since the input potential of the Zener diode 107 becomes a high-level potential exceeding the threshold value of the Zener diode 107, a current is supplied to the inverter 102b. Thereby, the inverter 102
The input potential of b becomes a high level exceeding the threshold value. Then, the input potential is inverted by the inverter 102b, so that the output potential of the inverter 102b, that is, the output potential of the second circuit portion is at a low level based on the threshold value of the inverter 102a. In this case, on the input terminal side of the inverter 102a, the high-level potential generated by the above-described illegal radio wave is blocked by the resistance element 111.
The potential of the input terminal of 2a depends on the output potential of inverter 102b. However, in this case, the inverter 102
a operates by receiving a low-level potential.

As a result, the input of the inverter 102a goes to a low level, and the level is inverted, so that the output of the inverter 102a goes to a high level. In this case, in the inverting input buffer 104, the input of the inverting input buffer unit 104a becomes a high level, and the level is inverted, so that the output of the inverting input buffer unit 104a becomes a low level. That is, the input of the first port goes high and the output of the first port goes low. Thereby, the game control microcomputer 31
Is supplied with a low-level signal.

As described above, during normal times (when no winning ball is detected)
, The potential level received by the data input terminal 311 is at the high level, while the potential level received by the data input terminal 311 is the low level when radio waves are transmitted. For this reason, the above-described second circuit unit receives the detection output of the game ball detection switch (in this case, the starting port switch 17) from the first circuit unit, and outputs the detection output of the game ball detection switch having the normal detection output. To perform signal processing for enabling the occurrence of the abnormal potential to be specified by a detection signal input from the first circuit unit to the data input terminal 311 when the potential becomes an abnormal potential outside a predetermined range that can fluctuate. It can be said that.

In this case, as described above, the level of the potential applied to Zener diode 107 exceeds the threshold value, and the input potential of inverter 102b becomes high level. 3
The input of the circuit section becomes high level. Thus, when the input of the OR gate 110 is at the high level, the OR gate 11
The output of 0 is high level. Therefore, in the inverting input buffer 109 receiving the high level, the input of the inverting input buffer unit 109a becomes a high level, and the level is inverted, so that the inverting input buffer unit 10
The output of 9a goes low. That is, the NMI terminal 3
The potential level of the twelve inputs goes low. That is,
At the time of radio wave reception, the potential level of the input to the NMI terminal 312 becomes low, unlike the other states.

Next, when the starting port switch 17 is short-circuited (short-circuited), the resistance value of the coil 170 becomes 0 ohm, and the potential of the connection node between the coil 170 and the resistance element 105b becomes the threshold value of the inverter 102a. And a high-level potential higher than the threshold value of the Zener diode 107. As a result, when the starting port switch 17 is short-circuited (short-circuited), the input of the second circuit unit becomes high level and the output of the second circuit unit becomes low level by the same circuit operation as that at the time of the radio wave as described above. Becomes Then, the input of the first port goes high, and the output of the first port goes low. Thereby, the data input terminal 311 of the game control microcomputer 31 is
A low level signal is provided.

In this case, the level of the potential applied to the Zener diode 107 exceeds the threshold value, and the inverter 102
b becomes the high level, the OR gate 11
The input of 0, that is, the input of the third circuit unit goes high. Then, when the input of the OR gate 110 is at a high level, the potential level of the input of the NMI terminal 312 becomes low at the time of short-circuiting by the same circuit operation as that at the time of the radio wave. If a short circuit occurs, it is considered that the short circuit state will not be easily resolved unless an operation of repairing the short circuit is performed.
The level of the input signal to is fixed to a low level. On the other hand, at the time of radio wave reception, if transmission of illegal radio waves stops, the level of the input signal to the NMI terminal 312 returns to the high level. Therefore, by determining whether or not the level of the input signal to the NMI terminal 312 is fixed at a low level, it is possible to distinguish between a radio wave goto and a short circuit.

Next, when the starting port switch 17 is pulled out, the coil 170 itself disappears.
The potential of the connection node between 0 and the resistance element 105 becomes a low-level potential lower than the threshold value of the inverter 102a. A low-level potential (0) that does not exceed the threshold of the Zener diode 107 or the threshold of the inverter 102a.
V). As a result, the input of the second circuit unit is at a low level based on the threshold value of the inverter 102a. In this case, the resistance element 111 and the Zener diode 107 do not receive the potential, and the Zener diode 10
7, the potential of the connection node between the resistance element 111 and the input terminal of the inverter 102a becomes low level (0 V).

As described above, the output potential of the inverter 102a, that is, the output potential of the second circuit portion,
It becomes a low level based on the threshold value of 02a. When the input potential is inverted by the inverter 102a, the input of the inverting input buffer unit 104a goes high in the inverting input buffer 104, and the output of the inverting input buffer unit 104a goes low by inverting the level. Level. That is, the input of the first port goes high and the output of the first port goes low. As a result, a low-level signal is supplied to the data input terminal 311 of the game control microcomputer 31. When the pull-out operation is performed, the drawn-out state is not canceled unless a repair work for mounting the starting port switch 17 is performed. The level of the input signal is fixed at a low level.

In this case, as described above, the Zener diode 107 is inactive and the input potential of the inverter 102b goes low, so that the input of the OR gate 110, that is, the input of the third circuit section goes low. Become. Thus, when the input of the OR gate 110 is at a low level, the output of the OR gate 110 is at a low level.
Therefore, the inverting input buffer 1 receiving the low level
At 09, the input of the inverting input buffer unit 109a becomes low level, and the level is inverted, so that the output of the inverting input buffer unit 109a becomes high level. That is, the potential level of the input of the NMI terminal 312 becomes a high level. That is, in the case of the pull-out state, a signal of the same level as in the case of the winning detection state is given to the game control microcomputer 31.

As described above, in the third circuit section,
Normal time, radio wave short, winning detection, and
The level of the output of the inverting input buffer 109 (low level) when the radio wave is short-circuited during extraction.
However, there is a characteristic that the output level is different from the output level (high level) in other states. Therefore, when the level of the signal received from the NMI terminal 312 becomes low, the game control microcomputer 31 can easily determine that the radio wave has been performed from other states.

In the third circuit section, the starting port switch 1
7 has a potential outside the range where the detection output of the normal opening switch 17 can fluctuate (potential exceeding the threshold value of the Zener diode 107), the detection of the starting port switch 17 is performed. A signal specifying that the output corresponds to an incorrect detection output is input to the game control microcomputer 31. Therefore, even if the potential of the detection output of the starting port switch 17 fluctuates due to intrusion of noise, fluctuation of the power supply potential, or the like, erroneous detection of the starting port switch 17 due to the fluctuation can be prevented.

Further, since the starting port switch 17 is also used for counting a winning start, a short-circuit detecting function is required. On the other hand, the second circuit unit and the third circuit unit
In addition to the determination as to whether or not tampering with the starting port switch 17 has been performed, it is also used to determine whether or not the starting port switch 17 is short-circuited. Can be determined by the same level determination as in the case of the improper determination whether or not the starting port switch 17 is short-circuited. For this reason, the short-circuit detection function and the fraud judgment function for the
It can be realized with one circuit. As a result, it is possible to suppress an increase in the number of components when adding the fraud determining function of the starting port switch 17 to the pachinko gaming machine, and to reduce the manufacturing cost.

Further, based on the input level of the interrupt signal to the NMI terminal 312 which is an interrupt terminal, the game control microcomputer 31 recognizes the occurrence of an abnormal state of the starting port switch 17. Therefore, it is not necessary to use a data bus used for transmission of game control data to recognize occurrence of an abnormal state of the start-up switch 17, and the data bus can be used effectively.

Further, the detection output of the Zener diode 107 used in the signal processing in the second circuit portion is branched at a stage before receiving the inversion process by the inverter 102b, and divided in accordance with the abnormal potential in the third circuit portion. Since it is used for input processing of the embedded signal, it is possible to avoid using redundant and unnecessary signal processing components such as a Zener diode.

Further, since the inversion input buffer 109 performs a process of inverting the logic level of the signal to be input to the NMI terminal 312 before inputting the signal to the NMI terminal 312, the detection output of the starting port switch 17 by the radio wave is output. Even if the detection output of the Zener diode 107 received from the second circuit unit becomes extremely high due to the abnormally high potential, the abnormal high potential is not directly transmitted to the game control means. Therefore, the game control microcomputer 31 can be protected from an abnormally high potential.

Next, the main random counter used in the pachinko gaming machine 1 will be described. FIG. 7 is an explanatory diagram showing types of main random counters used in the pachinko gaming machine 1 and their contents.

The random counter is a counter that counts random numbers used for control such as variable display control of a special symbol of the variable display device 8. In this embodiment, C
RND1, C RND L, C RND C, C RN
Five kinds of random counters of DR and C RNDRCH are shown. The values of these random counters are read at a predetermined timing during the pachinko game, and the variable display operation of the variable display device 8 is controlled based on the values. The CPU 31a provided in the game control microcomputer 31 executes the process of extracting the counter value of the random counter in accordance with the game control program stored in the ROM 31b.

C RND1 is a random jackpot determining random counter for determining in advance whether or not to generate a jackpot as a result of variable display of a special symbol on the variable display device 8. C RND1 is counted up (added) by one every 0.002 seconds in a count range of 0 to 225.

When the C RND1 is counted up to its upper limit, it is configured to start counting from 0 again. Note that 0.002 seconds is an interval at which the game control program is repeatedly executed by the interrupt processing in the game control microcomputer 31.

C RND L, C RND C, C R
The NDR sets the left, center, and right to be stopped and displayed on each of the left, middle, and right variable display portions when the special display of the variable display device 8 is determined in advance to be other than the jackpot as a result of the variable display. This is a random counter for determining the type of symbol (scheduled stop symbol) (for symbol display). CRN
The count range of each of DL, C, and R is 0 to 14. The counter value of C RND L is incremented by one every 0.002 seconds. The counter value of C RNDC is incremented by one every 0.002 seconds, and is incremented by using the remaining time of the interrupt processing operation of the game control microcomputer 31. The C RND R counter value is counted up one by one at the time of C RND C carry. C RND
L is also used for determining a jackpot symbol when a jackpot is generated. C RND L, C RND C,
Each of the C RND Rs is configured to restart counting from 0 when counted up to its upper limit.

[0125] C RND RCH is a random counter for determining the operation designation number for designating the type of the reach operation to be selectively executed from the plurality of types of reach operations. The count range of C RND RCH is 0
~ 11. The C RNDRCH counter value is 0.
The count is incremented by one every 002 seconds, and is incremented by one using the remaining time of the interrupt processing operation of the game control microcomputer 31. When the C RND RCH is counted up to its upper limit, it is configured to start counting from 0 again.

In the case of this embodiment, there are a plurality of types of reach, the counter value of C RND RCH is allocated to each reach, and the reach operation corresponding to the extracted counter value is selectively executed. You. In the reach operation, the reach line (the left symbol and the right symbol are aligned) according to the case where the jackpot is determined in advance by the C RND1 and the scheduled stop symbol of the left symbol and the right symbol when the departure is determined in advance. Is determined to be formed.

When the reach state occurs as described above, the type of the reach operation is selected and determined according to the extracted value of C RND RCH, and the reach operation of the determined type is executed.

The values of the various random counters described above are extracted at the timing determined for each random counter and used for various controls.

Next, the arrangement of special symbols displayed on the variable display device 8 will be described. Each special symbol of the left symbol, the middle symbol, and the right symbol is composed of a plurality of types of symbols indicating numbers. Each special symbol is stored in the ROM 31c of the game control microcomputer 31 as symbol data in which a plurality of symbols are arranged in a predetermined order.

The specific structure of the special symbol data is as follows. Each of the left, middle and right symbols is constituted by a numeral symbol which is a symbol indicating a numeral. The arrangement of each of the left and right symbols is determined in the order of numerical symbols 0, 1,..., 13, 14. Then, in each of the left, middle, and right symbols, 0, 1,...
Symbol position numbers 13 and 14 are assigned.
Such symbol position numbers are C RND L,
It corresponds to each extracted value of C and R.

If the outlier is predetermined, CR
A symbol at a location where each of the extracted values of NDL, C, and R matches the symbol position number is selected and determined as a scheduled stop symbol of each symbol. On the other hand, when the jackpot is determined in advance, the symbol at the location where the extracted value of C RND L matches the symbol position number is selected and determined as the left symbol, and the respective scheduled stop symbols on the middle and right sides are selected. It is selected and determined so as to be aligned with the same symbol as the left symbol.

FIG. 8 is a flowchart showing a control procedure for determining in advance whether a jackpot is to be generated based on the value of the random counter C RND1. With reference to the figure, it is determined whether the result of the variable display of the special symbol on the variable display device 8 is a big hit or a non-big hit. The procedure for determining the type of the right symbol will be described.

If the value of C RND1 is a jackpot determination value, a jackpot is determined. If the value is not the jackpot determination value, a jackpot is not determined. If it is determined that a big hit is to be made, the type of a special symbol (big hit symbol) for generating a big hit is determined by subsequently determining the value of C RND L.

On the other hand, if it is determined that the hit is not a jackpot, then C RNDL, C RND C,
By determining each value of C RND R, the types of the left symbol, the middle symbol, and the right symbol to be stopped and displayed are determined. In addition, when the combination of the determined stop symbols is accidentally a combination of the big hits when it is other than the big hit, “1” is added to the value of C RND C, and the pattern is forcibly removed (losing). Adjust so that stop display is performed in the combination of.

Next, a description will be given of a specific example of the notification performed in the above-described fraud detection error state regarding the opening switch 17.

FIG. 9 is a display screen diagram showing a specific example of a fraud detection error image display performed on the variable display section 9. As shown in FIG. As shown in the figure, in the variable display unit 9,
The fact that there is a risk of fraud informs the user that a fraud detection error has occurred. In this example, the fraud detection error image is displayed using characters. However, the present invention is not limited to this. By using an image other than a character such as a graphic, a notification indicating the fraud detection error state is performed. Is also good.

FIG. 10 is a table showing a specific example of a fraud detection error voice and a fraud detection error lamp display, and a specific example of a normal error voice and a normal error lamp display. As shown in the figure, the normal error sound is a sound in which short sounds are continuously generated, whereas the fraud detection error sound is a sound in which long sounds are continuously generated. As described above, the fraud detection error sound has a different sound generation mode from the normal error sound, so that the person who hears the sound can easily recognize and recognize the normal error sound. In this example, it has been described that the fraud detection error voice can be identified by the duration of the sound. However, the present invention is not limited to this, and the fraud detection error voice may include other configurations of sounds such as scale, tone, and timbre. It may be different from the normal error sound. Also,
As the fraud detection error voice, a message sound such as “there is a possibility of fraud” may be output.

As shown in the figure, in the case of the normal error lamp display, the award ball lamp 51 and the ball out lamp 5 are displayed.
One of the two is blinking for a short time. On the other hand, in the case of the fraud detection error lamp display, the prize ball lamp 51 and the ball out lamp 52 are simultaneously turned on. As described above, the fraud detection error lamp display is configured such that the lighting mode of the lamp is different from the normal error sound, so that a person who views the lamp display can easily recognize and recognize the normal error lamp display. . The following lamp control can be considered as a method for distinguishing the fraud detection error lamp display from the normal error lamp display. That is, for example, when one lamp is commonly used, the lamp may be blinked for a short time in the case of a normal error lamp display, and may be lit for a long time in the case of a fraud detection error lamp display. In addition, a lamp for displaying a normal error lamp and a lamp for displaying a fraud detection error lamp may be separately provided to distinguish the lamp display between a normal error and a fraud detection error.

Next, the game control microcomputer 3
The processing related to the control executed by the control unit 1 will be described in detail based on a flowchart.

FIG. 11 is a flowchart showing main processing and interrupt processing executed by the game control microcomputer 31. In FIG.
(A) shows the main process, and (b) shows the interrupt process.

Referring to FIG. 11A, in the main process, first, an initialization process is performed (S1). In the initialization process, the game control microcomputer 31
It is determined whether an error is included in the AM 31b, and if an error is included, processing such as initializing the RAM 31b is performed.

Next, a timer interrupt setting process is performed (S
2). In the game control microcomputer 31, a predetermined time elapses (for example, 0.
Every 002 seconds), an interrupt process described later is performed. In this timer interrupt setting process, a process for setting data necessary for a timer interrupt such as a timer interrupt time (period of performing a timer interrupt) in the CPU 31a is performed. By the timer interrupt setting process, time measurement for defining the execution timing of the first interrupt process after resetting due to power-on or the like is started. Specific processing contents of the timer interrupt setting processing will be described later with reference to FIG.

Next, NMI processing is performed (S3). In this NMI process, data for performing a non-maskable interrupt process is set. Specific processing contents of the NMI processing will be described later with reference to FIG. Next, a stack setting process for setting the designated address of the stack pointer is performed (S4).

Next, a display random number updating process for determining a stop symbol or the like is performed (S5). Specifically, in the display random number update process, C RND C, C RND R, and C RN of the random counters shown in FIG.
DRCH may be updated. The display random number update process is continuously executed repeatedly by an infinite loop. However, when an interrupt process described later is started, the display random number update process is temporarily stopped at an executing position in a program constituting the display random number update process. When the interrupt processing is completed, the execution is resumed from the position of the suspended program.

Next, referring to FIG. 11B, in the interrupt processing, the time value of the timer for the timer interrupt managed by the CPU 31a is set to the interrupt time set value (2 mS).
Execution is started each time.

In the interrupt processing, a timer interrupt resetting processing is performed (S6). First, in response to the shift from the main processing to the interrupt processing, resetting of data relating to a timer interrupt such as a timer interrupt time required for performing the next interrupt processing is performed. By this timer interrupt resetting processing, the time measurement for defining the execution timing of the next interrupt processing is started. The specific processing content of the timer interrupt resetting processing will be described later with reference to FIG.

Next, after performing a display control data setting process for setting a command code sent to the display control board 216 in a predetermined area of the RAM 31b (S7), a display control data output for outputting the command code as display control data is performed. Processing is performed (S8).

Next, processing for transmitting a predetermined command for sound generation and LED lighting control to the lamp control board 35 and the voice control board 70 is performed, and the jackpot information, the start information, the probability variation information are transmitted to the hall management computer. A data output process for transmitting such data is performed (S9). In addition, various abnormality diagnosis processes are performed by a self-diagnosis function provided inside the pachinko gaming machine 1, and an error process is performed according to the result, if necessary, to issue an alarm if necessary (S10).

Next, a process of updating each counter indicating various random numbers for determination used in game control is performed (S1).
1). In S11, specifically, the game control microcomputer 31 counts up (adds 1) to a jackpot determination random number C RND1 as a determination random number.

Next, the game control microcomputer 3
1 performs special symbol process processing (S12). In the special symbol process process, a corresponding process is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to a gaming state.
Then, the value of the special symbol process flag is updated during each processing according to the gaming state. Also, a normal symbol process is performed (S13). In normal symbol processing, 7
A corresponding process is selected and executed according to a normal symbol process flag for controlling the variable indicator 10 by the segment LED in a predetermined order. Then, the value of the normal symbol process flag is updated during each process according to the gaming state.

Further, the microcomputer 31 for game control includes a gate switch 12, a starting port switch 17,
The state of the count switch 22, the count switch 23, and the like is input, and a switch process is performed to determine whether or not there is a prize for each prize port or the variable prize ball device (S14).
Further, the game control microcomputer 31 performs a winning ball signal process with the winning ball payout control microcomputer 32 (S15). That is, when a predetermined condition is satisfied, a prize ball number command is output to the microcomputer 32 for controlling a prize ball payout. The winning ball payout control microcomputer 32 drives the ball payout device 59 according to the winning ball number command.

The game control microcomputer 31 is
Further, a display random number updating process for updating the display random number for determining a stop symbol or the like is performed (S16). Specifically, in S12, C RND L, C RND
C, C RND R, C RND RCH, etc. are counted up. After S16, this interrupt processing ends. As a result, the process returns to the main process, and the execution of the program for the main process is resumed from the position where the program was paused. Then, thereafter, each time the timer interrupt time elapses, an interrupt process is executed.

Next, the contents of the timer interrupt setting process executed in S2 of the main process will be described. FIG. 12 is a flowchart showing the processing contents of the timer interrupt setting processing.

First, in step SG (hereinafter simply referred to as SG) 1, the current value of the free running counter is
The processing of loading (reading) into the register of the PU 31a is performed. Here, the free running counter is a general-purpose counter included in the game control microcomputer 31. When the power of the pachinko gaming machine 1 is turned on, the free running counter starts timing until the power is cut off. This free running counter is a counter that counts at a predetermined cycle,
An upper limit value is set for the count, and when counting up to the upper limit, the count is restarted from 0. Such a free-running counter is used to define the above-described timer interrupt timing (timer interrupt time). Also,
The CPU 31a has a register as a built-in memory. In this case, the set value of the timer interrupt time is stored in the register of the CPU 31a, and is used for the timer interrupt. In SG1, the current counter value of the free-running counter is read into a register in order to define the initial value of the timer for timer interruption.

Next, the process proceeds to SG2, in which a counter value of the free running counter corresponding to the time period of 2 ms is added to the counter value read into the above-described register, and the result of addition is stored in the register. You. The addition result obtained in this way represents the set value of the timing of the next interrupt to be performed by the counter value of the free running counter. The interrupt timing set value set in this way is constantly monitored by the CPU 31a. Specifically, the CPU 31a constantly compares the current value of the free-running counter with the set value of the interrupt timing set in the register, and sets the current value of the free running counter to the set value of the interrupt timing set in the register. If they match, the CPU 31a executes the above-described interrupt processing. As a result, an interrupt process is executed every 2 ms.

Next, the process proceeds to SG3, in which processing for storing the set value of the interrupt timing stored in the register of the CPU 31a in the buffer, that is, in the RAM 31b, is performed. As a result, the stored interrupt timing set value can be used for setting the next interrupt timing.

Next, the process proceeds to SG4, in which the data of the timer interrupt mask register as a register for storing data indicating whether or not execution of the timer interrupt is permitted is set to the data indicating the interrupt enabled state. Done. As a result, a state in which the timer interrupt can be executed is set.

Then, the flow advances to SG5, where a process of setting the data of the clock monitor control register to data indicating the enable state is performed. Here, the clock monitor is a monitor circuit for detecting a decrease or stop of the frequency of the clock signal that defines the operation cycle of the CPU 31a, and the clock monitor control register indicates whether to operate the clock monitor. This is a register for storing data. In SG5, the clock monitor is set to the operating state by setting the data of the clock monitor control register to the data indicating the enable state.

Next, the flow advances to SG6, where processing for clearing the I interrupt mask is performed. The I interrupt mask is data for making a maskable interrupt impossible.
In an initial state such as when the power is turned on, the I interrupt mask is set, and execution of a maskable interrupt is not permitted. Thus, the SG6 clears the I interrupt mask, and the maskable interrupt is made executable. After SG6, the timer interrupt setting process ends.

Next, the contents of the NMI setting processing executed in S3 of the main processing will be described. FIG.
9 is a flowchart showing the details of the NMI setting process.

First, in step SH (hereinafter simply referred to as SH) 1, a process of clearing the X interrupt mask is performed. The X interrupt mask is data for making a non-maskable interrupt impossible. In an initial state such as when power is turned on, the X interrupt mask is set, and execution of a non-maskable interrupt is not permitted. Therefore,
With this SH1, the X interrupt mask is cleared, and the non-maskable interrupt can be executed. SH1
Thereafter, the NMI setting process ends.

Next, the contents of the timer interrupt resetting processing executed in S1 of the above-described interrupt processing will be described. FIG. 14 is a flowchart showing the processing contents of the timer interrupt resetting processing. In the timer interrupt resetting process, the process to be executed shifts from the main process to the interrupt process, so that the process for resetting the timer interrupt performed in the main process described above is performed again.

First, in step SN (hereinafter simply referred to as SN) 1, the data stored in the buffer stored by SG3 in the above-described timer interrupt setting process, ie, the set value of the interrupt timing is loaded into the register of the CPU 31a ( (Read). As a result, the set value of the interrupt timing previously set (the set value of the previous interrupt timing) is read into the register in order to define the initial value of the time for the next timer interrupt.

Then, the flow advances to SN2 to add a counter value of the free-running counter corresponding to a period of 2 ms to the counter value read into the above-described register, and store (store) the addition result in the register. You. The addition result obtained in this way represents the set value of the timing of the next interrupt to be performed by the counter value of the free running counter. The set value of the interrupt timing thus set is, as described above, the value of the CPU 31a.
Is monitored constantly. Specifically, the CPU 31a constantly compares the current value of the free-running counter with the set value of the interrupt timing set in the register, and sets the current value of the free running counter to the set value of the interrupt timing set in the register. If it matches, CP
U31a causes the above-described interrupt processing to be executed. As a result, an interrupt process is executed every 2 ms.

Next, the process proceeds to SN3, in which processing for storing the set value of the interrupt timing stored in the register of the CPU 31a in the buffer, that is, the RAM 31b is performed. As a result, the stored interrupt timing set value can be used for setting the next interrupt timing.

Next, the flow advances to SN4 to perform processing for setting the data of the above-described timer interrupt mask register to data indicating an interruptible state. As a result, a state in which the timer interrupt can be executed is set.

Then, the flow advances to SN5 to perform processing for resetting data in the timer interrupt flag register indicating that a timer interrupt is being performed. This makes it possible to return to the main processing at the end of the interrupt processing.

Then, the flow advances to SN6 to perform processing for clearing the above-mentioned I interrupt mask. Thereby, the maskable interrupt is made executable. Since the setting of the state of the non-maskable interrupt is performed separately from the processing related to the timer interrupt, the state is set to be executable without resetting. After SN6, the timer interrupt resetting process ends.

By executing the timer interrupt resetting process as described above, the data relating to the timer interrupt is reset every time the interrupting process is executed, whereby the interrupting process is executed every 2 mS. You.

FIG. 15 is a flowchart showing the start-up switch processing executed by the game control microcomputer 31. The starting port switch process is a subroutine program executed by a switch process described later (see SF3).

The game control microcomputer 31
First, a switch check process is performed to check the detection state of the starting port switch 17 (SA
1). The switch check process is a process executed to check the detection state of various detection switches, and is similarly used in a process related to various detection switches. The specific contents of the switch check processing will be described later with reference to FIG.

Next, it is confirmed whether or not the type 1 starter switch counter does not match the switch-on judgment value (SA).
2). The first-type starting port switch counter is a counter that is added and updated as the output of the detection signal of the starting port switch 17 continues. When the type 1 starter switch counter does not match the switch-on determination value, that is,
If the duration of the input signal has not yet reached the specified value, the process ends because the input signal may be noise or the like. On the other hand, when the type 1 starter switch counter matches the switch-on determination value, the starter switch 1
7 determines that the start winning has been detected, and updates (+1) the counter B (SA3). As described above, the counter B is a counter that stores the detection signal of the starting port switch 17, that is, the detection signal corresponding to the number of payouts = 6. Next, the special symbol winning memory counter for counting the number of starting memories is the maximum value of the special symbol winning memory counter (= 4).
It is determined whether or not this is the case (SA4). If the maximum value has been reached, the process ends without storing the start. If the maximum value has not been reached, the special symbol winning storage counter is updated (+1) (SA5). Next, a special symbol determination bank address corresponding to the count value of the newly stored special symbol winning storage counter is calculated (SA
6). Next, the fluctuation shortening set time for shortening the variable display time of the special symbol is temporarily set in the fluctuation shortening timer bank (SA7). Note that the change reduction setting time set here can be changed to a normal variable display time according to the number of start storages evaluated in SA12 described later. That is, when the number of stored memories is large, the setting is maintained as it is, and when the number of stored memories is small, the display time is changed to a normal variable display time.

Next, a random number for special symbol determination for determining whether or not the variable display result is a big hit is extracted (SA
8). Next, a reach determination random number for deciding whether or not to establish reach during variable display is extracted (SA).
9). Next, the special symbol determination random number extracted in SA8 is set in the special symbol determination bank, and the reach determination random number extracted in SA9 is set in the reach determination bank (SA1).
0). Next, the special symbol determination random number extracted in SA8 is set in the specific symbol determination bank (SA11). The special symbol determination bank is a bank that determines whether to generate a big hit based on the special symbol determination random number, or whether to generate a probability variable big hit that causes a probability variation,
The specific symbol determination bank is a bank used to determine the type of the stopped symbol according to the determination result by the special symbol determination bank.

Next, after executing the special symbol determination process (S
A12), the process ends. In the special symbol determination process, the variable display result of the variable display device 8 is determined based on the values stored in the specific symbol determination bank and the special symbol determination bank.

FIG. 16 is a flowchart showing a special winning opening switch process executed by the game control microcomputer 31. This special winning opening switch process is a subroutine program executed by a switch process described later (see SF5).

The game control microcomputer 31
First, the V count switch 22 and the count switch 2
3. Each winning opening switch 240 (240a, 240b, 2
40c, 240d, 240e) to perform a switch check process to check the detection state (SB1).
1). The specific contents of the switch check processing will be described later with reference to FIG.

Next, it is checked whether the count switch counter does not match the switch-on judgment value (SB1).
2). The count switch counter is a counter that is added and updated as the output of the detection signal from the count switch 23 continues. If the count switch counter does not match the switch-on determination value, the control proceeds to SB16 to be described later.
To the count switch 23
Determines that a winning has been detected, and sets a count passage flag indicating that (step SB13). Next, it is determined whether or not the special symbol process flag value indicating the gaming state is other than the value indicating that the special winning opening is being opened (SB14). If the value is other than the value indicating that the special winning opening is being opened, the process proceeds to SB16 described later. If the value indicates that the special winning opening is being opened, a special winning opening winning counter updating process is executed (SB15). Here, the counter A is added and updated based on the previously set count passage flag. As described above, the counter A is a counter that stores the detection signals of the V count switch 22 and the count switch 23, that is, the detection signals corresponding to the number of payouts = 15. Next, it is checked whether the V count switch counter (specific area count switch counter) does not match the switch-on determination value (SB16). The V count switch counter is a counter that is added and updated as the detection signal output from the V count switch 22 continues. If the V count switch counter does not match the switch-on determination value, the process proceeds to SB21 described later. If they match, it is determined that the V count switch 22 has detected a winning. Then, it is determined whether or not the special symbol process flag value is a value other than the value indicating that the special winning opening is being opened (SB17). If the value is other than the value indicating that the special winning opening is being opened, the process proceeds to SB19 described below. If the value indicates that the special winning opening is being opened, a special winning opening winning counter updating process is executed (SB18).
Here, the counter A is added and updated based on the detection signal of the V count switch 22. Next, the variable winning ball device 1
It is determined whether or not the continuation number counter for counting the number of executions of the repetition continuation control of No. 9 is equal to or more than the final value (= 16) of the continuation number counter (SB19). If the final value is reached, the process proceeds to SB21 described later. If the final value is not reached, a specific area passage flag indicating that the hit ball has passed the specific area is set (SB20).

Next, it is confirmed whether or not the winning opening switch counter does not coincide with the switch-on judgment value (SB21).
The winning opening switch counter is provided for each winning opening switch 240.
(240a, 240b, 240c, 240d, 240
The counter is added and updated as the output of the detection signal of e) continues. If the winning opening switch counter does not match the switch-on determination value, the process ends,
If they match, it is determined that the winning opening switch 240 has detected a winning, and the counter C is incremented and updated (SB22).
After that, the process ends. As described above, the counter C is a counter that stores a detection signal of each winning port switch 240, that is, a detection signal corresponding to the number of payouts = 10.

Next, with reference to the flowcharts shown in FIGS. 17 to 21, the details of the prize ball signal processing, the prize ball confirmation processing, and the output processing of the notification command and the like executed by the game control microcomputer 31 will be described in detail. . Note that each process is executed once every 2 ms when the above-described interrupt process in FIG. 11 is executed.

FIGS. 17 to 19 are flowcharts showing the winning ball signal processing, FIG. 20 is a flowchart showing the winning ball confirmation processing, and FIG. 21 is a flowchart showing the output processing of the notification command and the like.

Referring to FIG. 17, in the winning ball signal processing, first, it is determined whether or not the winning ball count switch ON flag is set (SC11A). Here, the prize ball count switch ON flag is a flag for indicating that the prize ball count switch is in an ON (ON) state.

If the award ball count switch ON flag is set, the flow advances to SC12 described later. on the other hand,
If the winning ball count switch ON flag is not set, it is determined whether or not the winning ball count switch is turned on (SC11B). When it is determined that the prize ball count switch is turned on, a process of setting a prize ball count switch ON flag in response to the turning on of the prize ball count switch is performed, and then the process proceeds to SC12.

At SC12, it is determined whether or not the award ball count switch is turned off. If it is determined that the prize ball count switch has not been turned off, it is determined whether 2.9 ms has elapsed since the prize ball count switch was turned on (SC15). If it is determined that 2.9 ms has not yet elapsed, the winning ball signal processing ends. That is, in SC12, the CPU waits for the prize ball count switch to be turned off from the time the prize ball count switch is turned on to the time 2.9 ms determined by SC15 elapses. Normally, the prize ball is turned off within 2.9 ms after the prize ball count switch is turned on, and one prize ball is paid out based on the turning off of the prize ball count switch. The number is counted.
However, if the prize ball count switch is not turned off until 2.9 ms elapses, the prize ball count switch disconnection / short circuit error (the disconnection or short circuit due to the prize ball count switch being on for a long time) It is determined that an error (an error state in which an error is expected) has occurred, and a notification command etc. output process (see FIG. 21) is executed (SC1).
6A).

Here, with reference to FIG. 21, the contents of the output processing of the notification command and the like will be described. First, the game control microcomputer 31 performs a process of outputting an error notification command for each type of error to the lamp control board 35 (SE1). Here, the error notification command is a type of command data sent from the game control microcomputer 31 to the lamp control board 35, and is command information for displaying an error code on the error display LED 350 and information for specifying the type of error. It is data containing.

The output of the error notification command causes the lamp control board 35 to display the error code specified by the error notification command on the error display LED 350.
Is displayed. Thereby, the fact that an error has occurred and the type of the error are reported. Once receiving the error notification command, the lamp control board 35 continues to display the error code until receiving the subsequent error release command (command data for instructing the release of the error code display).

After SE1, it is determined whether or not the prize ball error canceling switch (the reset switch 400A described above) has been turned on (SE2). Here, the reset switch 400A is turned on by the attendant when the attendant confirms the type of the error specified by the error code and the error state is resolved by the attendant's recovery work or the like. Therefore, in SE2, it is determined whether or not the error state has been resolved. The game control microcomputer 31 includes a reset switch 4
Since 00A is connected to the main board 87a, it is possible to determine whether or not the reset switch 400A is operated.

If it is determined that the award ball error canceling switch has been operated to the ON state, a process of outputting an error canceling command to the lamp control board 35 is performed (SE).
3). As a result, when the error release command is output, the lamp control board 3 receiving the error release command
5 performs control to end the display of the error code on the error display LED 350. After that, the output processing of the notification command or the like ends.

According to the output processing of the notification command etc., when an error state occurs, it is notified that the error has occurred,
Since the type of the error is notified, the attendant can clearly know that the error has occurred, and can clearly understand the type of the error. Therefore, it is possible to make it easier for the attendant to deal with the error state.

As described above, by executing the output processing of the notification command or the like by the SC 16A, the occurrence of the "prize ball number count switch disconnection / short circuit error" is notified by the error code. Then, after the process of resetting the prize ball count switch ON flag (SC16B) is performed, the prize ball signal process ends.

On the other hand, if the award ball count switch is turned off in SC12, it is in a normal state, and a process for resetting the award ball count switch ON flag is performed (SC1).
2A). Next, it is determined whether or not the award ball paying flag is on (SC13). The prize ball paying flag is a flag that is set in the SC 30 on condition that the prize ball number command is output as described later. Based on this flag, the game control microcomputer 31 determines whether or not award balls are being paid out. SC12 despite prize ball paying flag not being set to ON
When the prize ball count switch is turned on / off in SC13, the payout is detected during normal times other than during the prize ball operation. It is determined that an error state (a ball has been detected) has occurred, and the above-described notification command etc. output process (see FIG. 21) is executed (SC14).
As a result, an error code indicating that a normal payment error has occurred is displayed on the error display LED 350.

On the other hand, if the prize ball paying flag is turned on in SC13, it is determined that the prize ball is detected during the prize ball operation, and the prize ball count is updated (+1) (S).
C17). Next, the timer T1 is started (SC1
8). Thus, the timer T1 is started based on the turning off of the winning ball count switch. If the prize ball count switch is not turned on / off before the timer T1 times out, it is regarded that the prize ball payout control by the prize ball payout control microcomputer 32 has been completed, and as shown in SC36 and SC39. The number of payouts is checked.

When the prize ball count switch is not turned on in SC11B, as shown in FIG.
It is determined whether or not the timer T1 is operating (SC2)
2). If the timer T1 is not operating, it is checked whether or not a winning has been detected (SC21). In particular,
The counters (counters A, B,
It is determined by referring to C) whether or not a winning has been detected. If no winning has been detected, the process ends. On the other hand, when a winning is detected, a winning ball number command corresponding to the winning is output in accordance with the following priority order. First, the V count switch 22 or the count switch 2
3 to determine whether or not a winning is detected (SC2).
1). Specifically, it is determined whether or not a counter A for storing the detection signals of V count switch 22 and count switch 23 has a stored value. In this embodiment, fifteen prize balls are paid out for a prize that has passed through a special winning opening. Therefore, the winning is detected by the V count switch 22 or the count switch 23 (counter A> 0).
At times, 15 is set as the expected number of prize balls (SC31), and then the counter A is updated (-1) (SC32).

If no winning is detected by the V count switch 22 or the count switch 23, it is determined whether or not a winning is detected by the starting port switch 17 (SC24). Specifically, it is determined whether or not there is a stored value in the counter B for storing the detection signal of the starting port switch 17. In this embodiment, six prize balls are paid out for a winning through the starting port 14. Therefore, when a winning is detected by the starting port switch 17 (counter B> 0), 6 is set to the expected prize ball number (SC33), and then the counter B is updated (−1) (SC34). If no prize is detected by any of the V count switch 22, the count switch 23, and the starting port switch 17, it can be determined that a prize is detected by any of the respective prize port switches 240. Specifically, each winning port switch 24
It can be determined that the counter C for storing the 0 detection signal has a stored value. In this embodiment, the general winning opening 24
In order to pay out 10 prize balls for the prize balls passed through,
If SC25 can be determined as NO, the expected prize ball number is 10
Is set (SC26), and then the counter C is updated (−
1) Perform (SC27).

As described above, the game control microcomputer 31 performs the payout control corresponding to each detection signal in accordance with the predetermined priority order even when the detection signals are simultaneously input from the plurality of winning detection switches. Do.

After SC27, SC32 and SC34, the game control microcomputer 31 sets the detection flag to ON (SC28). The detection flag is a flag indicating that a winning has been detected in any winning opening. This detection flag is set to off in SD4 of the winning ball confirmation processing described later. Thereafter, the game control microcomputer 31 outputs a winning ball number command corresponding to the expected winning ball number (SC29). Next, the game control microcomputer 31 turns on the prize ball paying-out flag (SC3).
0) End the process.

When the timer T1 is operating in the step of SC22, as shown in FIG.
It is determined whether or not has timed out (SC35). If the timeout has not occurred, the payout is continued within the range of the timer value of the timer T1, and the process ends.

The value of the timer T1 (the time from the start of the timer to the time-out) is determined by the payout cycle in which one prize ball is paid out by the prize ball control microcomputer 32 (after the prize ball count switch is turned on and then turned on again). The period is set to be longer. Therefore, when the payout is performed normally, except for the last payout, the award ball count switch is turned on (SC11B) before the timer T1 times out. That is, when the payout is normally performed, the timer T
1 times out only after the last payout has taken place.

In SC35, when the timer T1 times out, the game control microcomputer 31
The prize ball count is compared with the expected prize ball count (SC3
6). If the payout is completed successfully, they match. In this case, the award ball number command is turned off (SC37), the award ball payout flag is turned off, and the process is terminated (SC38).

If the prize ball count does not match the expected prize ball count when the timer T1 times out, the game control microcomputer 31 checks which one is more (SC39). If the prize ball count is less than the expected prize ball count, that is, if it is determined that the payout is insufficient, the prize ball payout control microcomputer 3
2 is output command data for designation of correction payout (SC4
2). As a result, the prize ball payout control microcomputer 32 controls the prize ball payout which is insufficient. Next, the timer T1 is restarted (SC43). After that, the process ends. On the other hand, if the prize ball count exceeds the expected prize ball count, an excessive payout ball error (excessive payout when the number of prize balls counted during a predetermined period during the prize ball operation exceeds the predetermined number). Is determined to have occurred, an award ball number command is turned off (SC40), and an output process such as a notification command is executed (SC41). Thereby, the error display LE
At D350, an error code indicating that an excessive payout ball error has occurred is displayed. After executing the output processing such as the notification command, the microcomputer 31 for game control ends the winning ball signal processing.

FIG. 20 is a flowchart showing a winning ball confirmation process executed by the game control microcomputer 31. First, the game control microcomputer 31 determines whether or not the detection flag is turned on (SD1). As described above, the detection flag is a flag indicating that a winning has been detected in any of the winning openings (see SC28). When the detection flag is ON, the starting port switch 17, the V count switch 22, the count switch 23, and the winning port switch 240 (240
a, 240b, 240c, 240d, 240e), a new winning is detected. In this case, the winning counter is incremented and updated (+1) (SD2).
Here, the prize counter is incremented and updated based on the detection of a prize by a prize detection switch provided separately corresponding to each prize port, and the prize ball is detected by the all-prize-ball detection switch 171. It is a counter that is subtracted and updated based on it. That is, the winning counter is a counter that counts the number of winnings that are not detected by the all winning ball detection switch 171 among the winnings detected in each winning opening. Next, the detection flag is set to off (SD4). Next, S
Proceed to D5.

On the other hand, when it is determined in SD1 that the detection flag is not set to ON, the game control microcomputer 31 determines whether or not the winning counter is 0. If the winning counter is 0, the process is terminated. On the other hand, if the winning counter is not 0, the process proceeds to SD5.

In SD5, the all winning ball detection switch 171
It is determined whether or not is turned on. All winning balls detection switch 1
When 71 is turned on, since the winning ball is detected, the winning counter is decremented and updated (-1) (SD6), and the winning timer is reset (= 0) (SD7). After that, the process ends. On the other hand, when the all winning ball detection switch 171 is not turned on, the winning timer is added and updated (+1) (SD8). Then, it is determined whether the timer value of the winning timer has reached a predetermined value and the time is over (SD9). If the time is over, a prize-ball undetection error (a prize-mouth switch) occurs because no prize-ball is detected by the all-prize-ball detection switch 171 even though a prize-detection signal is detected from the prize-mouth switch. It is determined that an error state occurs when the winning ball is not detected by all the winning ball detection switches 171 after a predetermined time has elapsed after the winning detection in (1), and the above-described notification command etc. output processing (FIG. 21) (See SD10). As a result, an error code indicating that a winning ball undetected error has occurred is displayed on the error display LED 350. Thereafter, the winning ball confirmation processing ends.

FIG. 22 is a flowchart showing the switch processing. The switch process is a process executed in S14 of the above-described interrupt process.

In the switch processing, first, it is determined whether or not the value of the display control board initialization timer is "0" (SF1). Here, the display control board initialization timer means that the game control microcomputer 31 can operate normally in order to perform normal game machine control when the power of the pachinko game machine 1 is turned on. This is a down-counting timer used to wait until a circuit formed on the display control board 216 becomes normally operable after the state is reached. Is started.

If it is determined that the value of the display control board initialization timer is not "0", after the processing of subtracting "1" from the value of the display control board initialization timer is performed (S
F2), the switch processing ends. As a result, the value of the timer is decremented over time. On the other hand, if it is determined that the value of the display control board initialization timer has become “0”, it is considered that the display control board 216 has become normally operable, and the subroutine processing for various switches is performed in SF3 to SF5. Execute by

In SF3, the starting port switch process described above with reference to FIG. 15 is executed. As a result, a process based on the detection of the starting port switch 17 is performed. Next, SF
At 4, a gate switch process is executed. Thereby, processing based on the detection of gate switch 12 is performed. Next, in SF5, the special winning opening switch process described above with reference to FIG. 16 is executed. Thereby, processing based on the detection of each of V count switch 22 and 10 count switch 23 is performed. Thereafter, this switch processing ends.

FIG. 23 is a flowchart showing the switch check processing. This switch check process is a process executed by SA1 of the above-described start-up opening switch process and SB11 of the special winning opening winning switch process.
Also, this switch check process, as described above,
It is also used for processing related to other detection switches.

First, processing for setting a switch counter address is performed (SI1). Here, the switch counter address is an RA used to store and update the above-described counter value of the switch counter for the switch to be subjected to the switch check process.
This is the address of M31b. That is, a switch counter (a first-type starting port switch counter or the like) is provided for each of various switches to be subjected to the switch check processing, and an address is assigned to each switch counter. Then, it is determined whether or not the switch to be subjected to the switch check processing is in the ON state (SI2).

If it is determined that the switch has not been turned on, the process proceeds to SI3 described later. On the other hand, if it is determined that the switch is in the ON state, the process proceeds to SI5, where the counter value of the switch counter corresponding to the switch to be subjected to the switch check processing is a predetermined switch counter maximum value. A determination is made whether it is less than. Here, the maximum value of the switch counter is a lower limit value at which it can be determined that the period during which the switch is in the ON state is longer than usual due to disconnection, short circuit, pull-out, or the like of the switch. Therefore, when the counter value of the switch counter reaches the switch counter maximum value, it can be determined that an abnormal detection state has occurred.

If it is determined that the value is not less than the maximum value of the switch counter, that is, if it is not less than the maximum value of the switch counter, the process proceeds to SI6 described later. On the other hand, if it is determined that the value is less than the maximum value of the switch counter, a process of adding and updating the counter value of the switch counter stored at the address set by SI1 by "1" is performed (SI9). Then, a process of storing the switch counter at the address set by SI1 is performed (SI10). Thereby, the storage of the counter value of the corresponding switch counter is updated. Next, a switch state determination is performed to determine whether or not a switch targeted for this switch check processing has been normally turned on (SI11). In this switch state determination, when the counter value of the corresponding switch counter becomes “2”, it is determined that the corresponding switch is normally turned on. This switch check process is executed every 2 ms. However, when the switch to be subjected to the switch check process is continuously on for 4 ms, it is determined that the switch is normally turned on. Therefore, when the counter value of the switch counter becomes “2”, it is determined that the corresponding switch is normally turned on.

If the value of the switch counter is determined not to be less than the maximum value of the switch counter by SI5 and the process proceeds to SI3, as described above, an abnormal state in which the period during which the switch is on is too long. The processing for setting the designated error flag is performed. Here, the designated error flag is an error flag that designates a switch in which an abnormal state has occurred. As described above, when the designated error flag is set, a predetermined notifying unit such as a display or a sound designates the switch in which the abnormal state has occurred, and notifies that the abnormal state has occurred in the notification. Next, processing for setting data indicating the switch counter maximum value in the switch counter is performed (SI7). And
Processing for storing the switch counter at the address set by SI1 is performed (SI8). Thereafter, the switch check processing ends.

When the switch is not turned on by SI2, that is, when it is determined that the switch is off, and the process proceeds to SI3, a process of clearing the switch counter is performed. Then, a process of storing the data at the address set by SI1 is performed (SI4). Thereafter, the switch check processing ends.

FIG. 24 is a flowchart showing the error processing. This error processing is processing included in the error processing (S10) shown in FIG.

First, it is determined whether or not the value of the unauthorized winning error recovery timer is "0". (SJ1) where
The illegal winning error is an abnormal state (error state) in which a win of a pachinko ball into the big winning opening is detected while the state is not a big hit state. The unauthorized winning error recovery timer is a timer for counting down a timer value from a predetermined value in order to automatically recover an unauthorized winning error. When the above-mentioned illegal winning is detected, the illegal winning error recovery timer is set to an initial value by another routine together with an illegal winning error flag indicating that an illegal winning error has occurred.

If it is determined that the value of the unauthorized winning error recovery timer is not "0", the timer value of the unauthorized winning error recovery timer is decremented and updated by "1" (SJ2). Proceed to processing. On the other hand, when it is determined that the value of the unauthorized winning error recovery timer is “0”, a process of clearing the unauthorized winning error flag is performed (SJ3), and the process proceeds to SJ4 described later. In this way, when an illegal winning error occurs, the illegal winning error state is automatically restored after a predetermined period has elapsed. For this reason, at the time of recovery in the case where an illegal winning error has occurred, it is possible to save the time and effort of the staff in the recovery work such as initialization of the error flag.

At SJ4, it is determined whether or not the error flag indicates that there is no error. Here, that the error flag has no error refers to a state in which none of the various error flags does not indicate that an error state has occurred. If the error flag indicates no error, there is no need to perform a process corresponding to the error, and the error process ends. On the other hand, if the error flag is not error-free, an error process data setting process is executed to advance a predetermined error process corresponding to various error states (SJ5). By executing the error process data setting process, data for causing the error process to proceed is set. The data to be set differs depending on the type of error because the processing to be executed differs depending on the type of error. Thereafter, this error processing ends. As described above, when an error state occurs, the game control process of the pachinko gaming machine is set to the error state, so that the process for the error is performed without executing the game control process.

Next, when the input signal to the NMI terminal 312 becomes low level (when an interrupt signal is input), the non-maskable interrupt processing (hereinafter, referred to as “non-maskable interrupt processing”) executed by the microcomputer 31 for game control. , NMI interrupt processing). This NMI interrupt processing is performed by the above-described fraud detection circuit by using the starting port switch 17.
This is a process related to a fraud detection error that is performed when a radio wave goto is performed on the target.

FIG. 25 is a flow chart showing the NMI interrupt processing. First, a prize ball stop command output process for outputting the aforementioned prize ball stop command is executed (S
K1). As a result, the prize ball stop command is given from the game control microcomputer 31 to the prize ball payout control microcomputer 32, and the payout of the prize balls is stopped accordingly.

Next, a fraud detection error voice command output process for outputting the fraud detection error voice command described above is executed (SK2). As a result, a fraud detection error voice command is given from the game control microcomputer 31 to the voice control board 70, and a fraud detection error voice indicating that a fraud detection error has occurred is generated by the corresponding control of the voice control board 70. Is done. As a result, a fraud detection error is notified by the generation of a fraud detection error voice.

Next, a fraud detection error lamp lighting command output process for outputting the fraud detection error lamp lighting command described above is executed (SK3). This allows
The game control microcomputer 31 gives a lamp control board 35 a fraud detection error lamp lighting command to the lamp control board 35. According to the control of the lamp control board 35, the prize ball lamp 51 and the ball out lamp 52 are simultaneously turned on, and a fraud detection error occurs. Is displayed, indicating that an error has occurred. As a result, a fraud detection error is notified by executing the fraud detection error lamp display.

Next, a fraud detection error display command output process for outputting the fraud detection error display command described above is executed (SK4). As a result, a fraud detection error display command is given from the game control microcomputer 31 to the display control board 216, and the control of the display control board 216 in accordance with the command causes the fraud detection error indicating that a fraud detection error has occurred in the variable display section 9. A detection error image is displayed. As a result, a fraud detection error is notified by executing the fraud detection error image display.

Next, the game control microcomputer 3
1 is in the halt state (HALT state) (SK
5). As a result, when a fraud detection error occurs, the game control of the pachinko gaming machine 1 is deactivated.

When the game control of the pachinko gaming machine 1 is deactivated by the fraud detection as described above, the operation of restoring the place where the fraud was performed by the attendant is performed.
When recovering the pachinko gaming machine 1 in which the game control has been deactivated as described above, the power of the pachinko gaming machine 1 is temporarily turned off by the attendant, and then the power is turned on again. Thereby, the inactive state of the game control of the pachinko gaming machine 1 is released based on the operation of the attendant.
The inactive state of the game control of the pachinko gaming machine 1 may be released by providing a reset switch on the main board 87a and operating the reset switch.
That is, the release of the inactive state of the game control of the pachinko gaming machine 1 may be performed without turning off the power.

As described above, the start port switch 17
In the case where the fraud is targeted, the payout of the prize ball is prohibited, so that it is possible to prevent the fraudulent person from benefiting when the fraud is performed.

[0225] In addition, in the case where the fraud targeting the start-up switch 17 has been performed, a notification that the fraud targeting the start-up switch 17 has been performed is provided by a lamp display, an image display, and a sound. Therefore, based on the notification, it is possible to easily recognize that the fraudulent activity targeting the start-up opening switch 17 has been performed, and the staff can promptly deal with such fraudulent activity. Will be able to do it. In particular, when a voice notification is given, the attendant informs the pachinko gaming machine 1 that the fraud targeting the start-up opening switch 17 has been performed.
Can be easily recognized even from a distance away from the camera. Therefore, it becomes easier for the staff at the game hall to deal with such misconduct. In addition, the notification by the image allows the attendant to visually and clearly recognize that the fraud targeting the starter switch 17 has been performed. Therefore, the staff at the game hall can surely recognize that the wrongdoing has been performed.

In the above-described embodiment, based on the detection of the start winning of the ball by the starting port switch 17, the control of the game state according to the starting winning based on the detection signal input to the data input terminal 311 is performed. Is executed, and based on the signal input to the NMI terminal 312 in response to the potential of the detection output of the starting port switch 17 being outside the range in which the detection output of the normal starting port switch 17 can fluctuate. The NMI interrupt process performs an interrupt process for inactivating the control of the game state.

In general, when the potential of the detection output of the starter switch 17 becomes a potential outside the range in which the detection output of the normal starter switch 17 can fluctuate, an incorrect start winning detection using radio waves is performed. It is highly possible that (radio wave goto) was performed. In such a case, a low-level signal is input to the NMI terminal 312 from the above-described improper detection circuit, and the control of the game state is inactive based on the signal, as shown in the NMI interrupt processing. Therefore, it is possible to prevent a fraudulent act of performing a fraudulent game operation based on the detection of a fraudulent start winning using radio waves. Further, inactivation of the control of the game state in such a situation may be caused by NMI
Since it is based on an interrupt process based on the input of a signal to the terminal 312, it is performed with priority over other control processes, so that an unauthorized game operation based on an unauthorized start winning detection using radio waves is performed. Action can be prevented immediately. Furthermore, an interrupt based on an input signal from the non-maskable interrupt terminal is not prohibited and is performed with higher priority than other controls. It can be done more quickly. By such a quick process, it is possible to early find out that the fraud detection is about to be performed in the stage before the fraud detection is actually performed for the fraudulent activity targeting the start-up switch 17. it can.

Whether the detection output of the starting port switch 17 is normal or not is determined by the second circuit unit and the third circuit unit.
The determination is made on the circuit part side, and the game control microcomputer 31 deactivates the control of the game state in response to receiving the signal for performing the NMI interrupt processing from the third circuit part. This eliminates the need for the game control microcomputer 31 to perform the process of determining the detection output of the starting port switch 17. Thereby, the load of the control processing of the game control microcomputer 31 can be reduced. In addition, since the control of the game state is deactivated when the detected output of the normal starter switch 17 becomes a potential outside the range that can fluctuate, the intrusion of noise and the fluctuation of the power supply potential are performed. Accordingly, even when the potential of the detection output of the starting port switch 17 fluctuates, it is possible to prevent execution of erroneous control based on erroneous detection of the starting port switch 17 due to the fluctuation. Further, it is considered that the detection output of the starting port switch 17 may have an abnormal potential due to the short circuit of the starting port switch 17,
In such a case, the control of the gaming state is deactivated, and when an abnormality occurs in the start-up switch 17 due to a cause other than a fraudulent act using radio waves, the player can control the pachinko gaming machine 1 An abnormal condition can be immediately noticed.

Further, in general, when radio waves are performed, the detection output targeted for fraud tends to be at an abnormally high level of potential. When the potential of the detection output of the starting port switch 17 becomes a potential higher by a predetermined value than the potential generated when the starting winning is not detected, the NMI
Since the level of the signal input to the interrupt terminal 312 becomes the level for performing the NMI interrupt processing and the control of the game state is deactivated, the illegal start detection using the radio wave is performed. In this way, it is possible to more appropriately prevent an illegal act of performing an illegal game operation.

Second Embodiment Next, a second embodiment will be described. In the first embodiment, when the fraud detection error state as described above occurs in response to a fraudulent activity targeting the start-up switch 17, the error state is released in response to a manual operation of a staff member. An example is shown. In the second embodiment, an example will be described in which an illegal detection error state that occurs in response to an illegal act performed on the starting port switch 17 is automatically canceled. In the second embodiment, portions different from the first embodiment will be described.

The second embodiment is different from the first embodiment in that
The processing content of the NMI interrupt processing is different. FIG. 26 is a flowchart illustrating an NMI interrupt process according to the second embodiment.

First, a type 1 starting port switch counter, that is, a switch counter for the starting port switch 17 that can be updated when the switch check processing of FIG. 23 is executed for the starting port switch 17 is cleared. Is performed (SQ1). As a result, when the NMI interrupt process is executed, that is, when the illegality is detected by the illegality detecting circuit described above, the starting port switch 17 is activated.
Switch counter becomes invalid.

Next, in SQ2 to SQ5, the same processing as in SK1 to SK4 in FIG. 25 described above is executed.
Notification of a fraud detection error using an image is performed.

Then, processing for adding and updating the timer value of the fraud detection error duration timer by "1" is performed (SQ
6). Here, the fraud detection error duration timer is a timer having an initial value “0” used to define a period for maintaining the fraud detection error state, and is counted up every time SQ6 is executed.

Next, it is determined whether or not the timer value of the fraud detection error duration timer has reached a predetermined value for maintaining the fraud detection error state (SQ)
7). In other words, the predetermined value is set to a value corresponding to an appropriate time required for automatically recovering the fraud detection error state after the fraud detection error state has occurred. That is, for example, in this case, the predetermined value is set to a time such as a time after the occurrence of the fraud detection error state, which is considered to be a state in which the cause of the fraud detection error state can be eliminated by the work of the staff.

If it is determined that the timer value of the fraud detection error duration timer has not reached the predetermined value for maintaining the fraud detection error state, the flow returns to SQ6 until the timer value reaches the predetermined value. The above-described processing is repeated. On the other hand, if it is determined that the timer value of the fraud detection error duration timer has reached a predetermined value as a period for maintaining the fraud detection error state, first,
Processing to output a winning ball stop release command is performed (S
Q8). Here, the prize ball stop release command is a command for releasing the payout ball payout stop state according to the prize ball stop command by SQ2. Thereby, the prize ball stop release command is given from the game control microcomputer 31 to the prize ball payout control microcomputer 32,
Under the control of the prize ball payout control microcomputer 32, the state of stopping the payout of the prize ball is released, and the payout state becomes possible.

Next, a process for outputting a fraud detection error canceling voice command is performed (SQ9). Here, the unauthorized detection error cancellation voice command is a command for stopping the output of the unauthorized detection error voice when the unauthorized detection error state related to the starting port switch 17 is released.
Thereby, the game control microcomputer 31 gives the voice control board 70 a voice command for canceling the fraud detection error, and the voice control board 70 controls the speaker 2.
The fraud detection error sound output from 7, 27 is stopped.

Next, a process of outputting a fraud detection error release lamp command is performed (SQ10). Here, the unauthorized detection error release lamp command is a command for instructing lamp control for notifying that the unauthorized detection error state relating to the starting port switch 17 has been released. As a result, the microcomputer 31 for the game control gives the lamp control board 35 a lamp command for releasing a fraud detection error to the lamp control board 35. Under the control of the lamp control board 35, the prize ball lamp 51 and the ball cut-out lamp 52 are simultaneously turned off, and a fraud detection error occurs. You will be notified that it has been released.

Next, a process for outputting a fraud detection error cancellation display command is performed (SQ11). Here, the fraud detection error release display command is the starting port switch 17.
This is a command for erasing the display indicating the fraud detection error displayed on the variable display unit 9 of the variable display device 8 when the fraud detection error state regarding the variable display device is released. As a result, the game control microcomputer 31 provides the display control board 216 with the fraud detection error release display command, and the control of the display control board 216 indicates that the fraud detection error displayed on the variable display section 9 has occurred. Control is performed to delete the message.

Next, a process for resetting the duration timer of the fraud detection error is performed in conjunction with the automatic recovery of the fraud detection error state (SQ12), and thereafter, the fraud detection error processing ends. Thus, when a predetermined period elapses from the occurrence of the fraud detection error state, the fraud detection error state is automatically canceled and returned to a normal state. Thereby, normal game control can be executed.

According to the NMI interrupt processing in the second embodiment, the following effects can be obtained in addition to the effects obtained by the NMI interrupt processing in the first embodiment. When a predetermined period elapses after the occurrence of the fraud detection error state, the fraud detection error state is automatically canceled and returned to a normal state, so that a visual or audible notification is provided when a fraud is committed. By
While giving sufficient pressure to the player who tried to cheat, it is possible to save time and effort on the staff in the recovery work such as resetting the flag.

If the fraud detection error state is automatically canceled after a lapse of a predetermined period from the occurrence of the fraud detection error state, the fact is indicated by stopping sound, turning off the lamp display, and deleting the message display. Therefore, the attendant can easily grasp that the illegal detection error state related to the start-up switch 17 has occurred.

Third Embodiment Next, a third embodiment will be described. In the third embodiment, even when the potential applied to the Zener diode 107 becomes a threshold value (6.8 V) or more in a short time, the NMI processing is repeated many times in a short time to deal with an illegal detection error. An example will be described in which it is possible to prevent the execution processing from being executed.

The third embodiment differs from the first and second embodiments in the third circuit section and the contents of the NIM interrupt processing. In the third embodiment, the first
A description will be given of parts different from the second embodiment.

The second embodiment is different from the first embodiment in that
The processing content of the NMI interrupt processing is different. FIG. 27 is a block diagram illustrating a detection circuit related to the starting port switch 17 according to the third embodiment. In FIG. 27, portions common to FIG. 5 are denoted by the same reference numerals.

The circuit of FIG. 27 differs from the circuit of FIG. 5 in the following point. In the third circuit section, OR gate 1
One-shot circuit 108 is provided between 10 and inverting input buffer 109. The output signal of the OR gate 110 is input to the one-shot circuit 108. One-shot circuit 108 operates when the potential of the signal received from OR gate 110 attains a predetermined high level (that is, when the potential applied to Zener diode 107 by radio waves exceeds a threshold value (6.8 V)). ), A one-shot pulse signal that is continuously at a high level for a predetermined period is output. The period during which the high-level state of the signal output from the one-shot circuit 108 is one-shot is a predetermined value that is previously determined as a period during which the illegal detection error state is maintained at SQ7 in the NMI interrupt processing according to the second embodiment. It has been.

An output signal from the one-shot circuit 108 is supplied to an NMI terminal 312 via an inversion input buffer 109a for detecting a start winning in the inversion input buffer 109.
Is input to In the case of the circuit of FIG. 27 configured as described above, the input / output characteristics of each unit are the same as the characteristics shown in FIG.

Next, an example of the characteristic operation of the circuit shown in FIG. 27 will be described. FIG. 28 is a timing chart showing an operation example of the circuit shown in FIG. In FIG. 28,
An example of the operation when the radio wave goto is performed is shown.

Referring to FIG. 28, the potential on the input side of Zener diode 107 repeatedly reaches a very high potential level (a level exceeding threshold value S of Zener diode 107) due to an incorrect input signal due to radio waves. ing. In that case, the one shot circuit 108 is
(That is, the output potential of the OR gate 110)
Becomes a high level repeatedly in a short cycle. In the one-shot circuit 108, the output signal rises to the high level when the input potential first goes to the high level, and the level of the output signal continues for a predetermined time T. One shot circuit 1
The high-level duration T of the 08 one-shot output is
As described above, after the occurrence of the fraud detection error state, the time is set to a time such as a time when it is considered that the cause of the fraud detection error state can be eliminated by the work of the attendant. Since the signal output from the one-shot circuit 108 is a one-shot signal that continues for a predetermined time, it is not affected by an input signal that repeatedly fluctuates in a short cycle after the output signal once becomes high level.

An illegal signal of a high level due to a radio wave tends to have an extremely high potential level repeatedly in a short cycle as shown in FIG. 28. In such a case, the short cycle is adjusted in accordance with the illegal signal. If the NMI interrupt process is repeatedly activated in the above, the control process of the game control microcomputer 31 is wasteful, and information related to the game is stacked in the register at the time of the NMI interrupt process.
If the NMI interrupt is issued many times, the memory capacity of the register may be exceeded. Further, even if the potential level is repeatedly increased to an extremely high level in a short cycle, it is sufficient to execute one NMI interrupt process because it is a single fraud. On the other hand, in the circuit of FIG. 27, since the one-shot circuit 108 is used in the third circuit unit, even if a high-level illegal signal due to a radio wave is detected in a short cycle, the NMI interrupt is correspondingly performed. The process is prevented from being executed many times in a short period of time. As a result, it is possible to prevent the processing for dealing with radio waves from being started unnecessarily and repeatedly.

Next, an NMI interrupt process according to the third embodiment will be described. FIG. 29 shows the NM according to the third embodiment.
It is a flowchart which shows I interrupt processing. Here, differences from the NMI interrupt processing shown in FIG. 26 will be mainly described.

Referring to FIG. 29, first, SP1 to SP5
Thus, the same processing as SQ1 to SQ5 in FIG. 26 is performed. Then, it is determined whether or not the detection output of the count switch, that is, the startup port switch 17 is in the ON state (detection state) (SP6). In particular,
It is determined whether the input potential of the data input terminal 311 is at a low level (detection state).

When the radio wave goto is performed, unlike the short-circuit state, when the radio wave goto is stopped, the detection output of the starting port switch 17 is turned off (non-detection state). Therefore, the input potential of the data input terminal 311 is
When the execution of the NMI interrupt process is started, the signal is at a low level, and thereafter, when no radio wave is performed, the signal is at a high level. Therefore, in SP6, the automatic recovery timing is determined based on whether or not the input potential of the data input terminal 311 returns to a normal potential (potential in a non-detection state).

At SP6, the input potential of the data input terminal 311 is checked until the detection output of the starting port switch 17 is turned off. If it is determined that the detection output of the starting port switch 17 has been turned off, SP7 to SP7 are used in order to automatically recover from the illegal detection error state.
10, the same processing as SQ8 to SQ11 in FIG. 26 is performed, and then this NMI interrupt processing ends.

According to the NMI interrupt processing according to the third embodiment, the following effects can be further obtained in addition to the effects obtained by the NMI interrupt processing according to the second embodiment. That is, the microcomputer 31 for game control can determine the automatic recovery timing of the improper detection error state only by monitoring the input potential of the data input terminal 311, thereby simplifying the program contents related to the NMI interrupt processing. The processing load of the game control microcomputer 31 can be reduced.

[0256] Modifications and features of the embodiment described above are listed below. (1) In this embodiment, the starting port switch 17 has been described as an example of a target for which the switch is determined to be illegal. However, a target for performing the above-described switch illegality determination may be a switch that detects that a pachinko ball has passed through a passing gate through which a pachinko ball passes without winning. In other words, the detection means to which the present invention is applied is a game machine which can perform a predetermined game operation in response to the passing of a ball to a ball passing area provided in the game area, and a ball passing area ( Any detection means may be used as long as it is a passage detection means for detecting the passage (including a prize and the passage of a gate) of a hit ball in a prize area and a passage gate.

(2) The predetermined game control performed in response to the passing of the ball into the ball passing area includes a game other than the variable display of a special symbol in the variable display device as described in the embodiment. Control may be used. That is, the game control includes, for example, the operation of a movable piece that is provided in a variable winning ball device in a second-type pachinko gaming machine and guides a ball to a winning area in the variable winning ball device, and other game operations. Also applies to controls.

(3) In the present embodiment, the Zener diode 107 operates as a means for supplying current to the inverter 102b by operating when a radio wave is received.
However, the present invention is not limited to this, and instead of the Zener diode, means for performing the same operation as the Zener diode may be provided. That is, when the connection node between the coil 170 and the resistance element 105, that is, the input-side potential becomes a predetermined potential (potential corresponding to the threshold value of the Zener diode), the output side is turned on (high level). Any element or circuit other than the zener diode may be used as long as

(4) As shown in FIGS. 26 and 29, the game control means (game control microcomputer 31) receives an input of a signal for performing an interrupt process (NMI When the low level input to the input terminal 312 is performed) When the control of the game state is deactivated, and when the condition for releasing the inactive state is satisfied,
The control for activating the control of the game state is performed. In this way, it is possible to prevent a staff member from having to perform a recovery operation such as resetting a flag when a fraud detection action is performed.

(5) As shown in FIG. 1, the ball passing area provided in the game area (game area 7) has a special game operation (variable display device) determined in advance according to the passing of a ball. 8 (variable display of special symbols in FIG. 8) is a start winning area (start opening 14) in which the start is started.

(6) The third circuit unit shown in FIG. 27 interrupts an interrupt signal for performing an interrupt process when the detection output of the passage detecting means (starting port switch 17) becomes an abnormal potential. Third signal processing means for performing signal processing for inputting to the input terminal (NMI interrupt terminal 312) is configured. When the detection output of the passage detection means has a potential outside the range that can fluctuate, the third signal processing means performs a predetermined period of time (for example, after the occurrence of a fraud detection error state, the cause of the fraud detection error state by the work of a staff member). (One-shot signal output means (one-shot circuit 108) for outputting a one-shot signal whose output is continued only for a time such as a time when it is considered that the state can be eliminated).

(7) The one-shot circuit 108 shown in FIG. 27 is included in the third signal processing means (third circuit section) and includes the abnormal potential detecting means (the Zener diode 10).
An output holding unit is configured to hold the level of the detection output for a predetermined period in response to receiving the detection output of the abnormal potential detection unit from a branch path that branches the output path of the detection output of 7). The output holding means has a predetermined time constant instead of the one-shot circuit 108 described above, and keeps the detection output level of the abnormal potential detecting means at a predetermined level for a period (predetermined period) defined by the time constant. A signal processing circuit having input / output characteristics to be held as described above may be provided.

(8) The embodiments disclosed this time are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

[0264]

Specific Examples of Means for Solving the Problems (1) The pachinko gaming machine 1 shown in FIG. 1 and the like hits a ball passing area (starting port 14) provided in a game area (game area 7). A gaming machine capable of controlling a gaming state according to the passage of a ball is configured. A means for controlling the gaming state of the gaming machine based on the execution of information processing by the gaming control microcomputer 31 shown in FIG. 3 and the like, and can receive input of information for controlling the gaming state. Information input terminal (data input terminal 311 in FIG. 5, etc.) and an interrupt terminal (NMI in FIG. 5, etc.) capable of receiving information for interrupt processing.
Terminal 312), and can perform a process for controlling a game state based on the information input from the information input terminal, and when information is input from the interrupt terminal. A game control means capable of performing an interrupt process (NMI interrupt process in FIG. 25) is configured. The starting port switch 17 shown in FIG. 1 and the like constitutes passage detecting means for detecting the passage of a hit ball in the ball passing area. The resistance element 105, the capacitor 106, the resistance element 111, and the inverter 102 shown in FIG.
a, resistance element 103a, and inverting input buffer 10
4, that is, the first circuit unit described above outputs a detection signal for identifying whether or not a hit ball has been passed in the hit ball passing area based on the detection output of the passing detection means for the information input. First signal processing means for performing signal processing for inputting to the terminal is configured. Zener diode 107 and inverter 102 shown in FIG.
b, that is, the detection output of the passage detection unit is received from the first signal processing unit by the second circuit unit, and the detection output of the normal passage detection unit is outside a predetermined range in which the detection output of the passage detection unit may fluctuate. When the abnormal potential of
Second signal processing means for performing signal processing for enabling the occurrence of the abnormal potential to be specified by the detection signal input from the signal processing means to the information input terminal. The OR gate 110, the inverting input buffer 109, and the resistor 103b shown in FIG.
In the case of, further includes a one-shot circuit 108),
That is, the third circuit unit performs signal processing for inputting, to the interrupt terminal, an interrupt signal for performing the interrupt processing when the detection output of the passage detection unit becomes the abnormal potential. A third signal processing means for performing the operation is configured. As shown in FIG. 5, the second signal processing means, in response to the detection output of the passage detection means received from the first signal processing means has become the abnormal potential, the abnormal potential Abnormal potential detection means (Zener diode 107) for detecting occurrence is included. As shown in FIG. 5, the third signal processing means receives the detection output of the abnormal potential detection means from a branch path branched from the output path of the detection output of the abnormal potential detection means, An interrupt signal is input to the interrupt terminal. As shown in FIG. 15 and the like, the game control means executes the control of the game state according to the passing of the hit ball to the ball passing area based on the detection signal input from the first signal processing means. And FIG.
As shown in FIGS. 26 and 29, when receiving the input of the interrupt signal from the third signal processing means, an interrupt process for inactivating the control of the game state is performed.

(2) As shown in FIG.
The signal processing means further includes an inverting means (inverter 102b) for performing signal processing for inverting a logical level of a detection output of the abnormal potential detecting means. As shown in FIG. 5, the third signal processing means Receives a detection output of the abnormal potential detecting means from a branch path provided between the abnormal potential detecting means and the inverting means.

(3) As shown in FIG.
The signal processing means includes inverting input means (inverting input buffer 109) for inverting the logic level of a signal to be input to the interrupt terminal as the interrupt signal at a stage before inputting the signal to the interrupt terminal. .

(4) As shown in FIG.
Includes a Zener diode element (Zener diode 107).

(5) SK2 to SK4 shown in FIG.
For example, when an interrupt signal is input to the interrupt terminal from the third signal processing unit, a notification unit that can notify that the illegality has been performed on the passage detection unit. Is configured. As shown in FIG.
The interruption process performed by the game control unit in response to the input of the interruption signal includes a process of causing the notification unit to notify the passage detection unit that an illegal operation has been performed.

(6) As shown in FIG. 5, the interrupt terminal is a non-maskable interrupt terminal (NMI terminal 312) for which interrupts cannot be prohibited.

(7) The ball payout device 59 shown in FIG. 3 constitutes a ball payout means capable of paying out prize balls. The microcomputer 32 for controlling the payout of prize balls shown in FIGS. 3 and 4 receives command information (prize ball command) regarding the payout of the prize ball output from the game control means, and receives the ball in accordance with the command information. Ball payout control means is provided which can control the payout of premium balls by the payout means. As shown in FIG. 25 and the like, when the game control means inactivates the control of the game state in response to receiving the input of the signal for performing the interrupt processing, the game control means It outputs command information for commanding prohibition (see SK1).

(8) The SK2 shown in FIG. 25 and the like and the speaker 27 shown in FIG. 3 constitute sound generating means included in the notifying means and performing the notification by generating sound.

(9) SK3 and SK shown in FIG. 25 and the like
4. Prize ball lamp 51 and ball cut lamp 5 shown in FIG.
2, and the variable display unit 9 shown in FIG. 1 constitutes display means included in the notification means and performing the notification by display (including both lamp display and image display).

(10) The one-shot circuit 108 shown in FIG. 27 is included in the third signal processing means,
In response to receiving the detection output of the abnormal potential detection means from the branch path, an output holding means for holding the level of the detection output for a predetermined period (see FIG. 28).

[0274]

The effect of the concrete example of the means for solving the problems.
With regard to, the following effects can be obtained. Based on the detection signal input to the information input terminal based on the detection output of the passage detection means, the control of the game state according to the passing of the ball to the ball passage area is executed, while the detection output of the passage detection means Interrupt processing is performed to deactivate the control of the game state based on an interrupt signal input to the interrupt terminal in response to an abnormal potential outside the range that can fluctuate when the potential is normal. . Generally, when the potential of the detection output of the passage detection means becomes a potential outside the range that can fluctuate when it is normal, there is a possibility that an unauthorized passage detection (radio wave) using radio waves has been performed. high. In such a case, the occurrence of the abnormal potential is detected by the abnormal potential detecting means included in the second signal processing means, and the third signal processing means branches the output path of the detection output of the abnormal potential detecting means. An interrupt signal is input from the third signal processing unit to an interrupt terminal of the game control unit in response to the detection output received from the path, and the game control unit inactively controls the game state based on the signal. Therefore, it is possible to prevent a fraudulent act of performing a fraudulent game operation based on the detection of fraudulent passage using radio waves. Further, the deactivation of the control of the game state in such a situation is performed by an interrupt process based on the input of an interrupt signal to the interrupt terminal, and thus is performed with priority over other control processes. Therefore, it is possible to immediately prevent an improper act of performing an improper game operation based on an improper passage detection using a radio wave. Whether the detection output of the passage detecting means is normal or not is determined by the third signal processing means,
On the side of the game control means, the control of the game state may be inactivated in response to the input of the signal for performing the interrupt processing from the third signal processing means. It is not necessary to perform the process of determining the detection output of the detection means. Thereby, the load of the control processing of the game control means can be reduced. In addition, since the control of the game state is deactivated when the detection output of the normal passage detection means becomes a potential outside the range that can fluctuate, noise intrusion and fluctuation of the power supply potential may occur. Even if the potential of the detection output of the passage detecting means fluctuates, it is possible to prevent erroneous control based on erroneous detection of the passage detecting means due to the fluctuation. Also, it is considered that the detection output of the passage detection unit may have an abnormal potential due to the short circuit of the passage detection unit. In such a case, the control of the game state is deactivated, and the radio wave is transmitted. When an abnormality occurs in the passage detection means due to a cause other than the used misconduct, the player can immediately notice the abnormal state of the gaming machine. Further, based on the input of the interrupt signal to the interrupt terminal, the game control means recognizes the occurrence of an abnormal state of the passage detection means. For this reason, it is not necessary to use the information transmission path used for transmitting the information for the game state control to recognize the occurrence of the abnormal state by the passage detection means, and the information transmission path can be used effectively. .

With respect to claim 2, the following effects can be obtained in addition to the effects of claim 1. Second
The detection output of the abnormal potential detecting means used in the signal processing by the signal processing means is branched at a stage before receiving the inversion processing by the inverting means, and the signal is output to the signal processing corresponding to the abnormal potential by the third signal processing means. Since it is used, it is possible to avoid using redundant and unnecessary signal processing configurations.

Regarding claim 3, in addition to the effect according to claim 1, the following effect can be obtained. Since the process of inverting the logic level of the signal input to the interrupt terminal is performed before inputting the signal to the interrupt terminal, the second
Even if the detection output of the abnormal potential detecting means received from the signal processing means of the above becomes an extremely high abnormal high potential, the abnormal high potential is not directly transmitted to the game control means. Can be protected.

According to the fourth aspect of the present invention, the following effects can be obtained in addition to the effects of the first aspect. When the Zener diode element is used for the second signal processing means, the operation of the element is stable,
It is possible to prevent as much as possible the malfunction of signal processing by the signal processing means. In addition, since the Zener diode element is easy to handle, the use of the Zener diode element makes it easy to manufacture and maintain the gaming machine. Further, since the Zener diode element is inexpensive, the use of the Zener diode element can reduce the manufacturing cost of the gaming machine.

According to the fifth aspect of the present invention, the following effects can be obtained in addition to the effects of the first aspect. When an interrupt signal is input to the interrupt terminal in response to the detection of the illegal passage, it is possible to notify that the illegality has been performed with respect to the passage detecting means. In addition, it is possible to easily recognize that a fraudulent activity targeting the passage detection means has been performed, and the staff can promptly deal with such fraudulent activity.

According to the sixth aspect of the present invention, the following effects can be obtained in addition to the effects of the first aspect. The interrupt terminal is a non-maskable interrupt terminal whose interrupt cannot be prohibited. The interrupt based on the input signal from the non-maskable interrupt terminal is not prohibited and is performed with higher priority than other controls, so that the interrupt process for disabling the control of the game state is performed more quickly. be able to.

According to the seventh aspect of the present invention, the following effects can be obtained in addition to the effects of the first aspect. When an illegal act using radio waves is performed on the passage detecting means, the payout of the prize ball is prohibited, so that it is possible to prevent the illegal actor from benefiting.

According to the present invention described in claim 8, the following effects can be obtained in addition to the effects according to claim 5. The fact that the wrongdoing of the passage detecting means has been performed is notified by a sound, so that the fact that such wrongdoing has been performed can be recognized even from a distance away from the gaming machine. Therefore, it is possible to make it easier for the staff of the game arcade to deal with such misconduct.

According to the ninth aspect of the present invention, the following effect can be obtained in addition to the effect of the fifth aspect. Since the fact that an illegal act targeting the passage detection means has been performed is notified by a display, it is possible to visually and clearly recognize that such illegal act has been conducted.
Therefore, the staff at the game hall can surely recognize that the wrongdoing has been performed.

Regarding claim 10, the following effect can be obtained in addition to the effect of claim 1. When receiving the detection output of the abnormal potential detection means from the branch path,
Since the level of the detection output is held for a predetermined period, even if the level of the detection output of the abnormal potential detecting means becomes unstable, the level of the detection output is held for a predetermined period, so that a stable interrupt signal is interrupted. Input terminal.

[Brief description of the drawings]

FIG. 1 is a front view of a pachinko gaming machine and a card unit installed corresponding thereto.

FIG. 2 is a front view of the game board.

FIG. 3 is a block diagram showing various control boards used for controlling the pachinko gaming machine and components related thereto.

FIG. 4 is a block diagram showing various control boards used for controlling the pachinko gaming machine and components related thereto.

FIG. 5 is a block diagram showing a detection circuit associated with a start-up switch.

6 is a diagram showing, in a tabular form, potential levels on an input side and an output side in the input buffer shown in FIG. 5;

FIG. 7 is an explanatory diagram showing the types and contents of main random counters used in pachinko gaming machines.

FIG. 8 is a flowchart showing a control procedure for determining in advance whether to generate a jackpot based on the value of a random counter C RND1.

FIG. 9 is a display screen diagram showing a specific example of a fraud detection error image display performed on the variable display unit.

FIG. 10 is a diagram showing, in a table form, a specific example of a fraud detection error voice and a fraud detection error lamp display, and a specific example of a normal error voice and a normal error lamp display.

FIG. 11 is a flowchart showing main processing and interrupt processing executed by the game control microcomputer.

FIG. 12 is a flowchart illustrating a process of a timer interrupt setting process.

FIG. 13 is a flowchart illustrating processing contents of an NMI setting processing.

FIG. 14 is a flowchart showing the contents of a timer interrupt resetting process.

FIG. 15 is a flowchart showing a starting port switch process.

FIG. 16 is a flowchart showing a special winning opening switch process.

FIG. 17 is a flowchart showing winning ball signal processing.

FIG. 18 is a flowchart showing winning ball signal processing.

FIG. 19 is a flowchart showing winning ball signal processing.

FIG. 20 is a flowchart showing a winning ball confirmation process.

FIG. 21 is a flowchart illustrating an output process of a notification command or the like.

FIG. 22 is a flowchart illustrating a switch process.

FIG. 23 is a flowchart showing a switch check process.

FIG. 24 is a flowchart showing an error process.

FIG. 25 is a flowchart showing NMI interrupt processing.

FIG. 26 is a flowchart showing an NMI interrupt process according to the second embodiment.

FIG. 27 is a block diagram showing a detection circuit related to a start-up switch according to the third embodiment.

FIG. 28 is a timing chart showing an operation example of the circuit of FIG. 27;

FIG. 29 is a flowchart showing an NMI interrupt process according to the third embodiment.

[Explanation of symbols]

1 is a pachinko machine, 7 is a game area, 14 is a starting port, 3
1 is a game control microcomputer, 311 is a data input terminal, 312 is an NMI terminal, 17 is a starting port switch, 105, 103a, 103b and 111 are resistance elements,
106 is a capacitor, 102a and 102b are inverters, 104 and 109 are inverting input buffers, 104a and 1
09a is an inverting input buffer unit, 107 is a Zener diode, 108 is a one-shot circuit, 27 is a speaker,
1 is a prize ball lamp, 52 is a ball out lamp, and 9 is a variable display unit.

Claims (10)

[Claims] 1. A gaming machine capable of controlling a gaming state in response to the passing of a ball to a ball passing area provided in a gaming area, wherein the gaming machine is configured to execute a game based on execution of information processing. A means for controlling a state, comprising: an information input terminal capable of receiving input of information for control of a game state; and an interrupt terminal capable of receiving information for interrupt processing, It is possible to perform processing for controlling a game state based on information input from the information input terminal, and to perform interrupt processing when information is input from the interrupt terminal. Game control means, passing detection means for detecting the passing of a hit ball in the ball passing area, based on the detection output of the passing detecting means, whether or not the passing of the hit ball in the hit ball passing area is detected Identifiable detection signal First signal processing means for performing signal processing for inputting to the force terminal; receiving a detection output of the passage detection means from the first signal processing means; detecting the passage detection means having a normal detection output; When the output becomes an abnormal potential outside a predetermined range in which the output can fluctuate, it is possible to specify that the abnormal potential has occurred by a detection signal input from the first signal processing means to the information input terminal. Second signal processing means for performing signal processing of the following; and for inputting, to the interrupt terminal, an interrupt signal for performing the interrupt processing when the detection output of the passage detection means becomes the abnormal potential. And third signal processing means for performing signal processing, wherein the second signal processing means responds to a detection output of the passage detection means received from the first signal processing means being at the abnormal potential. And the abnormality An abnormal potential detecting means for detecting the occurrence of a potential, wherein the third signal processing means receives a detection output of the abnormal potential detecting means from a branch path branched from an output path of a detection output of the abnormal potential detecting means. According to this, an interrupt signal is input to the interrupt terminal, and the game control means controls the passing of the hit ball to the ball passing area based on the detection signal input from the first signal processing means. Executing a corresponding game state control, and performing an interrupt process for inactivating the game state control when receiving the interrupt signal from the third signal processing means. Gaming machine. 2. The apparatus of claim 2, wherein the second signal processing means further includes an inverting means for performing signal processing for inverting a logic level of a detection output of the abnormal potential detecting means, 2. The gaming machine according to claim 1, wherein a detection output of the abnormal potential detecting means is received from a branch path provided between the detecting means and the reversing means. 3. The inverting input means for performing a process of inverting a logical level of a signal to be input to the interrupt terminal as the interrupt signal at a stage before inputting the signal to the interrupt terminal. 2. The method according to claim 1, further comprising:
A gaming machine according to claim 1. 4. The gaming machine according to claim 1, wherein said abnormal potential detecting means includes a Zener diode element. 5. When an interrupt signal is input to said interrupt terminal from said third signal processing means, it is possible to report that tampering with said passage detection means has been performed. The interrupt processing performed by the game control means in response to the input of the interrupt signal further includes a notifying means, wherein the notifying means notifies the passing detection means that an illegal operation has been performed by the notifying means. The gaming machine according to claim 1, comprising: 6. The gaming machine according to claim 1, wherein the interrupt terminal is a non-maskable interrupt terminal for which an interrupt cannot be prohibited. 7. A ball payout means capable of paying out a prize ball, and command information relating to the payout of the prize ball output from the game control means, wherein the prize ball is paid out by the ball payout means in accordance with the command information. Further comprising ball payout control means capable of performing control, wherein the game control means deactivates control of a game state in response to receiving the input of the interrupt signal, The gaming machine according to claim 1, wherein command information for commanding prohibition of payout is output. 8. The gaming machine according to claim 5, wherein the notifying unit includes a sound generating unit that performs the notifying by generating a sound. 9. The gaming machine according to claim 5, wherein said notification means includes a display means for performing said notification by display. 10. The third signal processing means further includes output holding means for holding a level of the detection output for a predetermined period in response to receiving a detection output of the abnormal potential detection means from the branch path. 2. The method of claim 1, wherein
A gaming machine according to claim 1.