JP2000224009A - マスタ・スレ―ブ・フリップ・フロップ及び方法 - Google Patents

マスタ・スレ―ブ・フリップ・フロップ及び方法

Info

Publication number
JP2000224009A
JP2000224009A JP2000010966A JP2000010966A JP2000224009A JP 2000224009 A JP2000224009 A JP 2000224009A JP 2000010966 A JP2000010966 A JP 2000010966A JP 2000010966 A JP2000010966 A JP 2000010966A JP 2000224009 A JP2000224009 A JP 2000224009A
Authority
JP
Japan
Prior art keywords
master
inverter
slave
output
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2000010966A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000224009A5 (enExample
Inventor
Sutotsu Dan
ダン・ストツ
W Rosenberry Raymond
レイモンド・ダブリュ・ローゼンベリー
R Townley Kent
ケント・アール・タウンレイ
E Stong Kevin
ゲイヴィン・イー・ストング
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agilent Technologies Inc
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Publication of JP2000224009A publication Critical patent/JP2000224009A/ja
Publication of JP2000224009A5 publication Critical patent/JP2000224009A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0372—Bistable circuits of the primary-secondary type
JP2000010966A 1999-01-22 2000-01-19 マスタ・スレ―ブ・フリップ・フロップ及び方法 Withdrawn JP2000224009A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/235,189 US6188260B1 (en) 1999-01-22 1999-01-22 Master-slave flip-flop and method
US235189 2002-09-04

Publications (2)

Publication Number Publication Date
JP2000224009A true JP2000224009A (ja) 2000-08-11
JP2000224009A5 JP2000224009A5 (enExample) 2007-03-08

Family

ID=22884475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000010966A Withdrawn JP2000224009A (ja) 1999-01-22 2000-01-19 マスタ・スレ―ブ・フリップ・フロップ及び方法

Country Status (2)

Country Link
US (1) US6188260B1 (enExample)
JP (1) JP2000224009A (enExample)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020000858A1 (en) 1999-10-14 2002-01-03 Shih-Lien L. Lu Flip-flop circuit
JP3685479B2 (ja) * 2000-11-07 2005-08-17 シャープ株式会社 半導体集積回路
US6621318B1 (en) 2001-06-01 2003-09-16 Sun Microsystems, Inc. Low voltage latch with uniform sizing
US6605971B1 (en) * 2001-06-01 2003-08-12 Sun Microsystems, Inc. Low voltage latch
US6831494B1 (en) 2003-05-16 2004-12-14 Transmeta Corporation Voltage compensated integrated circuits
JP4279620B2 (ja) * 2003-07-11 2009-06-17 Ｏｋｉセミコンダクタ株式会社 レベルシフト回路
US7405597B1 (en) * 2005-06-30 2008-07-29 Transmeta Corporation Advanced repeater with duty cycle adjustment
US7336103B1 (en) 2004-06-08 2008-02-26 Transmeta Corporation Stacked inverter delay chain
US7656212B1 (en) 2004-06-08 2010-02-02 Robert Paul Masleid Configurable delay chain with switching control for tail delay elements
US7498846B1 (en) 2004-06-08 2009-03-03 Transmeta Corporation Power efficient multiplexer
US7635992B1 (en) 2004-06-08 2009-12-22 Robert Paul Masleid Configurable tapered delay chain with multiple sizes of delay elements
US7142018B2 (en) 2004-06-08 2006-11-28 Transmeta Corporation Circuits and methods for detecting and assisting wire transitions
US7304503B2 (en) * 2004-06-08 2007-12-04 Transmeta Corporation Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability
US7173455B2 (en) 2004-06-08 2007-02-06 Transmeta Corporation Repeater circuit having different operating and reset voltage ranges, and methods thereof
US7071747B1 (en) 2004-06-15 2006-07-04 Transmeta Corporation Inverting zipper repeater circuit
US7330080B1 (en) 2004-11-04 2008-02-12 Transmeta Corporation Ring based impedance control of an output driver
US7592842B2 (en) * 2004-12-23 2009-09-22 Robert Paul Masleid Configurable delay chain with stacked inverter delay elements
US7233184B1 (en) * 2005-06-22 2007-06-19 Xilinx, Inc. Method and apparatus for a configurable latch
US20070013425A1 (en) * 2005-06-30 2007-01-18 Burr James B Lower minimum retention voltage storage elements
US7663408B2 (en) * 2005-06-30 2010-02-16 Robert Paul Masleid Scannable dynamic circuit latch
US7394681B1 (en) 2005-11-14 2008-07-01 Transmeta Corporation Column select multiplexer circuit for a domino random access memory array
US7642866B1 (en) 2005-12-30 2010-01-05 Robert Masleid Circuits, systems and methods relating to a dynamic dual domino ring oscillator
US7414485B1 (en) * 2005-12-30 2008-08-19 Transmeta Corporation Circuits, systems and methods relating to dynamic ring oscillators
US7495466B1 (en) 2006-06-30 2009-02-24 Transmeta Corporation Triple latch flip flop system and method
US7710153B1 (en) 2006-06-30 2010-05-04 Masleid Robert P Cross point switch
KR100714282B1 (ko) * 2006-08-02 2007-05-02 삼성전자주식회사 센스앰프 기반의 플립플롭 및 그의 출력 지연시간 감소방법
JP4286295B2 (ja) * 2007-03-02 2009-06-24 Ｏｋｉセミコンダクタ株式会社 調停回路
US9753086B2 (en) 2014-10-02 2017-09-05 Samsung Electronics Co., Ltd. Scan flip-flop and scan test circuit including the same

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3539836A (en) 1966-12-16 1970-11-10 Motorola Inc Clocked delay type flip flop
US3984702A (en) 1975-12-02 1976-10-05 Honeywell Information Systems, Inc. N-bit register system using CML circuits
US4258273A (en) 1978-11-13 1981-03-24 Hughes Aircraft Company Universal register
US4419762A (en) 1982-02-08 1983-12-06 Sperry Corporation Asynchronous status register
US4495629A (en) 1983-01-25 1985-01-22 Storage Technology Partners CMOS scannable latch
JP2621993B2 (ja) * 1989-09-05 1997-06-18 株式会社東芝 フリップフロップ回路
TW198159B (enExample) * 1991-05-31 1993-01-11 Philips Gloeicampenfabrieken Nv

Also Published As

Publication number Publication date
US6188260B1 (en) 2001-02-13

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