JP2000207277A - 情報処理装置および方法、並びに提供媒体 - Google Patents
情報処理装置および方法、並びに提供媒体Info
- Publication number
- JP2000207277A JP2000207277A JP11007737A JP773799A JP2000207277A JP 2000207277 A JP2000207277 A JP 2000207277A JP 11007737 A JP11007737 A JP 11007737A JP 773799 A JP773799 A JP 773799A JP 2000207277 A JP2000207277 A JP 2000207277A
- Authority
- JP
- Japan
- Prior art keywords
- storage
- cpu
- information processing
- executing
- processing apparatus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Memory System (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11007737A JP2000207277A (ja) | 1999-01-14 | 1999-01-14 | 情報処理装置および方法、並びに提供媒体 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11007737A JP2000207277A (ja) | 1999-01-14 | 1999-01-14 | 情報処理装置および方法、並びに提供媒体 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000207277A true JP2000207277A (ja) | 2000-07-28 |
| JP2000207277A5 JP2000207277A5 (enExample) | 2006-04-06 |
Family
ID=11674026
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11007737A Pending JP2000207277A (ja) | 1999-01-14 | 1999-01-14 | 情報処理装置および方法、並びに提供媒体 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2000207277A (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003059266A (ja) * | 2001-08-09 | 2003-02-28 | Nec Corp | Dram装置及びそのリフレッシュ制御方法 |
| WO2005026928A3 (en) * | 2003-09-16 | 2005-04-28 | Koninkl Philips Electronics Nv | Power saving operation of an apparatus with a cache memory |
-
1999
- 1999-01-14 JP JP11007737A patent/JP2000207277A/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003059266A (ja) * | 2001-08-09 | 2003-02-28 | Nec Corp | Dram装置及びそのリフレッシュ制御方法 |
| WO2005026928A3 (en) * | 2003-09-16 | 2005-04-28 | Koninkl Philips Electronics Nv | Power saving operation of an apparatus with a cache memory |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4765222B2 (ja) | Dram装置 | |
| US20070268756A1 (en) | Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency | |
| US5781782A (en) | Electronic device with a power saving function | |
| JPH09212416A (ja) | 計算機システムおよび計算機システムの電力管理方法 | |
| US10108250B2 (en) | Memory module, system including the same | |
| US4313180A (en) | Refresh system for a dynamic memory | |
| US20030084235A1 (en) | Synchronous DRAM controller and control method for the same | |
| JP2000207277A (ja) | 情報処理装置および方法、並びに提供媒体 | |
| JP2000339053A (ja) | 表示メモリ内容の退避回復方法および装置 | |
| JP2002055822A (ja) | 端末装置のプログラム制御方式およびその方法、並びにその制御プログラムを記録する記録媒体 | |
| KR100594439B1 (ko) | 메모리 제어를 이용한 휴대장치의 사용시간 연장 방법 | |
| JP2004220697A (ja) | 半導体メモリ装置のリフレッシュ制御 | |
| JPH0660645A (ja) | 節電型メモリ装置 | |
| CN117352027B (zh) | 控制电路、存储器和存储段控制电路 | |
| JP4158569B2 (ja) | 情報処理装置及び情報処理方法 | |
| JPH04223510A (ja) | 情報処理装置 | |
| JP2004246946A (ja) | 半導体メモリ装置 | |
| JP2003044356A (ja) | メモリマッピング方式 | |
| JPH05342094A (ja) | コンピュータ装置 | |
| JP2000250759A (ja) | フラッシュメモリのブートブロック書き込み方法 | |
| KR101236393B1 (ko) | 전자장치 및 그 제어방법 | |
| JPS60225968A (ja) | 電子計算機 | |
| JPH0511874A (ja) | 情報処理装置 | |
| JP2013228988A (ja) | 電子機器 | |
| JPH10302461A (ja) | データ処理端末装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20060116 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20060116 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20080909 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20081021 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20081113 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20081219 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20090120 |