JP2000091275A - Manufacture of semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a flexible, less-lossy processing step which performs inking showing improper characteristics for each element, overcomes the loss in unit process time, element pollution, a yield loss and incapability of coping with a deformation of a wafer in a prior art for determining a target chip before a wafer test. SOLUTION: A mark 3 is attached to each of elements to be measured with respect to their characteristics as target chips for coordinate recognition at the time of a wafer test, and their coordinate information are attached to and recorded in the respective elements together with characteristic data of the chips. After the wafer test, the wafer is divided into the separate elements and then die bonded to a frame or the like. At this step, however, the respective element chips are positioned with use of the coordinate information read out from the recorded data as references, desired one of the chips is specified based on test information of the chips and then picked up according to the coordinate data. Selection of the target chips is carried out by employing ones of the chips having predetermined coordinate positions or judged as having improper characteristics in the wafer test as the targets.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to measuring the characteristics of each device in a manufacturing process for forming a plurality of devices from a wafer and using the result in the manufacturing process. The present invention relates to the manufacturing method.

[0002]

2. Description of the Related Art Conventionally, the following methods (1) and (2) have been used as techniques for device fabrication in which characteristics of each device are measured in a semiconductor device fabrication process and the results are used in the fabrication process. Can be exemplified.

(1) Based on the test results obtained in a wafer test process for measuring the characteristics of a plurality of semiconductor elements formed on a wafer, inking is performed on all the defective chips in the process, and in a die bonding process performed later. Then, a method of recognizing ink patterns representing test results and backing up only good chips is adopted.

(2) Prior to the wafer test process, it is necessary to form a mark on a target chip in advance to set a target chip, and the position coordinates of the target chip and the result of the wafer test are determined. As a reference, a method is used in which characteristic information of each semiconductor element is recorded together with its coordinates, and the recorded information is used in a subsequent die bonding step.

[0005]

In the above-mentioned method (1) in the prior art, since the inker is operated for each element in the wafer test process, the tact time of the apparatus is lost or the inking time is reduced. Depending on the accuracy, it is difficult to contaminate the non-defective chips with the ink, or to prevent the contamination applied to the wafer by the heat applied to cure the ink or the ink from affecting the characteristics of the element. In addition, in the die bonding process, it takes time to recognize a pattern written with ink, and a condition that enables correct pattern recognition even when the color of the element or the unevenness of the surface differs for each element. The adjustment of the optical system is necessary for the adjustment, and such a setup loss is additionally generated. In this respect, the time tact of the apparatus may be greatly lost. Further, in this method, it is impossible to perform element selection according to characteristics.

In the above-mentioned method (2) of the prior art, it is necessary to form a mark on a target chip in advance to set a target chip, but a defective product is necessarily selected as a chip to be set. Since there is no guarantee, (a)
(B) Non-standard wafers such as compound semiconductors (including wafers that break during the process) due to the yield loss of using non-defective products as target chips (usually, target chips are not final products as non-defective products). )
There was a problem that it could not be handled.

The present invention has been made in view of the above-mentioned problems of the prior art, and measures the characteristics of each element and performs inking of a defect based on the result. In the conventional method, the target chip is determined in advance, the problems such as the loss of tact time, contamination of devices, loss of yield, and inability to cope with changes in the shape of the wafer are overcome. It is an object of the present invention to provide a method for manufacturing a semiconductor device comprising possible steps.

[0008]

According to a first aspect of the present invention, there is provided a first step of measuring the characteristics of a plurality of semiconductor elements, each of which is arranged and formed on a wafer; A second step of dividing for each element;
A third step of picking up the semiconductor element divided in the step and die-bonding the semiconductor element to a member of the device. In the first step, a plurality of positions on the wafer are marked as coordinates. A functioning target chip is formed, the position coordinates of each semiconductor element are determined based on the target chip, the characteristics of each semiconductor element corresponding to the position coordinates are measured, and the obtained position coordinate data and the characteristics of each semiconductor element are measured. In the third step, the position coordinates data of each semiconductor element recorded in the first step and the position coordinates of each semiconductor element divided in the second step are recorded in the third step. It is characterized by collating, picking up a semiconductor element based on the collation result, and die bonding.

According to a second aspect of the present invention, there is provided a first step of measuring a characteristic of each of a plurality of semiconductor elements each formed in an array on a wafer, and a step of dividing the wafer for each semiconductor element. And a third step of picking up the semiconductor element divided in the second step and die-bonding it to a device member. In the first step, each semiconductor element The characteristic chip is measured, the characteristic defective chip is examined based on the characteristic data of the measurement result, and a target chip functioning as a coordinate marker is formed at a plurality of obtained characteristic defective chip positions, and each semiconductor element is determined based on the target chip. Position coordinates are obtained, and the obtained position coordinate data and the characteristic data of the measurement result of each semiconductor element are recorded in association with each other, and in the third step, the first step is performed in the first step. The position coordinate data of each semiconductor element recorded and collated with the position coordinates of each semiconductor element divided in the second step are collated, and the semiconductor element is picked up and die-bonded based on the collation result. Things.

According to a third aspect of the present invention, there is provided a first step of measuring a characteristic of each of a plurality of semiconductor elements formed in an array on a wafer, and a step of dividing the wafer for each semiconductor element. And a third step of picking up the semiconductor element divided in the second step and die-bonding the semiconductor element to a member of the device. A target chip functioning as a marker of coordinates is formed at a plurality of positions, the position coordinates of each semiconductor element are obtained based on the target chip, and the characteristics of each semiconductor element corresponding to the position coordinates are measured. The coordinate data and the characteristic data of each semiconductor element are recorded in correspondence with each other, and in the third step, the characteristic data of each semiconductor element recorded in the first step is stored. If the condition is satisfied, the semiconductor element is specified by the position coordinates data recorded in association with the characteristic data, the second and the specified position coordinate data
Collation with the position coordinates of each semiconductor element divided in the process of
The semiconductor device is picked up and die-bonded based on the result of the comparison.

According to a fourth aspect of the present invention, in the first aspect of the present invention, in the first step, when the position coordinate data and the characteristic data of each semiconductor element are recorded in correspondence with each other, It is characterized in that it is additionally recorded on the wafer as product information including the position coordinate data and the characteristic data of each semiconductor element.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, a wafer test (first
In step (2), a semiconductor device chip at a predetermined position is marked as a target chip for coordinate recognition for the purpose of coordinate recognition, and the coordinate information of the target chip is attached to the element together with the characteristic data of the chip and recorded. Is done.
In the step of dividing the wafer that has undergone the wafer test into individual semiconductor elements (second step) and die-bonding the divided elements to a stem, a frame, or the like to form a device (third step), first, coordinates are set. After reading the coordinate information of the target chip for recognition from the attached data and determining the coordinates of each semiconductor element chip based on the coordinate information of the target chip, specifying and specifying the desired chip based on the wafer test information of each chip The picked-up chip is picked up according to the coordinate data.

Here, when a target chip is provided with a label attached to an element chip, (1) an element chip at a predetermined coordinate position is used as a target chip in order to select a target chip. (2) A part or all of the element chips determined to have poor characteristics in the wafer test are used as target chips. The following two methods can be adopted. Then, the above (1),
(2) will be described in more detail.

(1) A case where an element chip at a predetermined coordinate position is used as a target chip. Coordinates to be set on the wafer, for example, in the case of orthogonal coordinates, a chip having a number and position sufficient to specify two orthogonal axes together with its azimuth information is set as a target chip, and the coordinates are set by marking the chip. I do. The number of chips to be marked is reduced to the required minimum number of three, and the chip missing rate at the time of element division (second step) and, when enlarging after element separation, taking into account the chip position shift due to enlarging. Have a degree. In addition, a plurality of target chip patterns to be marked are prepared in order to correspond to an irregular-shaped wafer. The pattern is selected by manual operation of an operator or by automatic recognition by a wafer tester. In the case of (1), the quality of the element characteristic determination does not depend on whether or not to perform marking, so that marking can be performed in parallel with the characteristic measurement.

(2) A case where a part or all of the element chips determined to have the characteristic failure in the wafer test are used as target chips. Coordinates to be set on the wafer, for example, in the case of orthogonal coordinates, a chip having a number and position sufficient to specify two orthogonal axes together with its azimuth information is set as a target chip, and the coordinates are set by marking the chip. I do. The number of chips to be marked is 3, which is the minimum number required,
The chip chip generation rate at the time of element division (second step) and, when enlarging after element separation, allowance in consideration of chip position shift due to enlarging, and a marking chip as a target chip is used for wafer test. Choose from bad chips instead of chips with good results. The selection method may be, for example, the first n items or n skipped x items. n,
x can be selected to be an appropriate value in order to correspond to an irregular wafer, and the target chip pattern to be marked is preferably different. The pattern is selected by manual operation of an operator or by automatic recognition by a wafer tester. If the number of defective chips is less than n, a non-defective chip is assigned to a non-defective chip. this
In the case of (2), since the result of the characteristic measurement of the wafer test is required, the marking may be performed at the same time as the result of the characteristic measurement is obtained, that is, in parallel with the characteristic measurement, or may be performed after the characteristic measurement of the wafer is completed. May be.

At the time of a wafer test (first step), an inker or a needle is used as a concrete means for attaching a mark to the element chip to make it a target chip, thereby attaching a mark to the element chip and providing a target for coordinate recognition. Form chips. The formation of the target chip with the needle can be used when there is a concern that the element may be contaminated by the ink or the effect of the element characteristics due to heating during ink curing. However, when a target chip is formed by this method, it is necessary to make a clearly larger flaw than a flaw formed on an element electrode by probing for characteristic measurement. This is because it is necessary to identify both at the time of pattern recognition for target chip recognition in the third step.

By forming a target chip at the time of a wafer test, a target chip can be formed even on a wafer that is broken during the wafer process or that is not a regular shape at the time of wafer process input, that is, an irregular shape at the time of the wafer test. Thus, a target chip can be formed only on a defective chip depending on the non-defective rate of the element.

Further, the position coordinates of each element are determined based on the coordinates set on the wafer with reference to the target chip, and the element characteristics at that position are recorded in relation to the coordinates, thereby forming the die bonding step (third step). In step (2)), it is possible to pick up only elements having specific characteristics in accordance with the recorded coordinates in association with each other. The recording of the coordinates and the characteristic data of each element is performed by a bar code (2
Dimension code), magnetic card (or magnetic disk)
Alternatively, one of media such as RAM is selected. Also,
The third step is a network connection (LAN
If possible, it is possible to share the saved information, if possible.

As an embodiment of the method of manufacturing a semiconductor device according to the present invention, a case where a target chip is formed by inking an irregular wafer into a chip at a predetermined position will be described with reference to the accompanying drawings. Will be described. FIG. 1 shows a flowchart of a method for manufacturing a semiconductor device of this embodiment. 2 to 5 are explanatory views of each step. FIG. 2 shows a wafer to be put into the first step.
Shows a selected target chip pattern, FIG. 4 shows a wafer on which a target chip pattern is formed at the time of measuring element characteristics, and FIG. 5 shows a wafer on an adhesive sheet after dicing and enlarging the element interval.

In the first step of performing a wafer test, a test wafer is loaded. Here, it is assumed that a wafer in which a circular wafer shown in FIG. 2 is broken is loaded. FIG.
In the above, W represents a wafer, 1 represents an element, and 2 represents a boundary of the element. First, for example, a target chip pattern suitable for the wafer shape is selected by the operator. Here, since the circular wafer has a broken shape, a pattern of five points arranged in the orthogonal direction shown in FIG. 3 is selected. The wafer test is now started (FIG. 1, step S1).
-1).

The prober connected to the wafer tester performs automatic alignment of the wafer W, thereby aligning the target chip pattern consisting of five points with the wafer under test, and setting coordinate axes. The element position is designated based on the set coordinate axes, the characteristic of each element 1 is measured, and the characteristic measurement data is transmitted to the wafer tester together with the coordinate data of each element 1. Then, after measuring the characteristics of all the elements 1, a target chip is formed by performing inking as shown in the ink 3 of FIG. 4 based on the target data of the five points obtained in the setting of the coordinate axes performed previously (FIG. 1, step S1
-2).

The characteristic measurement data of each element 1 is measured, and the obtained characteristic measurement data of each element 1 is transmitted to the main body of the wafer tester together with the coordinate data, and wafer information (target chip pattern information and each element 1 Coordinates of
Characteristic information) in various media formats (barcode, magnetic card, magnetic disk or RAM depending on the amount of information)
Etc.) (FIG. 1, step S1-3).

Next, in a second step of dividing the device 1 formed on the wafer W, a target chip was formed together with the characteristic measurement in the first step, and wafer information was recorded in various media formats. The wafer W is loaded. In the second step, as shown in FIG. 5, the wafer W is attached to an expandable adhesive sheet 5 on a dicing frame (commonly used for a die bonder) 4, and then, each element 1 is divided by dicing. The element spacing is further increased by enlarging the sheet.

Then, in order to assemble the divided elements 1 as a device, a third element 1 is picked up.
Since the wafer information recorded in the first step for each element 1 is used in the third pickup step, it is necessary to attach the wafer W or each element in a state where the wafer information can be used. In this embodiment, as shown as a bar code 6 in FIG. 5, a bar code obtained by printing out the wafer information in a bar code format on a part of the sheet to which the wafer W is adhered is attached by a printer. This attachment is made by the following method.

In the third step of picking up each element 1, first, wafer information expressed in a barcode format, which is attached to a sheet to which each element 1 is adhered in a divided form of the wafer W, is read. The target chip pattern information and the coordinate / characteristic information of each element 1 included in the information are obtained. Based on the obtained target chip pattern information, where the coordinate axes are set is recognized by image recognition (FIG. 1, step S3-1).

When the coordinates are confirmed, the element 1 having the desired element characteristics is found from the previously read coordinate / characteristic information of each element 1 and the element 1 is specified by the coordinates and pasted. The picked-up sheet can be picked up and supplied to a die bonding process (FIG. 1, step S3-2).

[0027]

According to the method of forming a target chip according to the present invention, the method of forming a target chip according to the present invention requires the operation of an inker for each element and the recognition of its pattern in the wafer test process in the prior art. Since only a predetermined chip determined by setting coordinates is required, the time required for the process can be reduced and the yield can be improved. In addition, an element having a specific characteristic can be selectively picked up. High quality products.

Further, in the present invention, since the result of the wafer test is reflected in the formation of the target chip, compared with the case where the target chip is formed in advance before the wafer test process in the prior art, a defect is generated or It can handle irregular-shaped wafers, and can reduce loss of good chips by selecting defective chips as targets.

[Brief description of the drawings]

FIG. 1 shows a flowchart of a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 shows a wafer to be put into a first step (wafer test) in a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 3 shows a target chip pattern selected for application to the method for manufacturing a semiconductor device of the embodiment of FIG. 2;

FIG. 4 shows a wafer in which a target chip pattern is formed on a semiconductor device in the embodiment of FIG.

FIG. 5 shows a wafer on an adhesive sheet and a barcode on which element information is recorded after dicing and enlarging an element interval in the embodiment of FIG. 2;

[Explanation of symbols]

1. One of a plurality of elements formed on a wafer, 2
... Element boundaries, 3 ... Ink, 4 ... Dicing frame, 5 ... Adhesive sheet, 6 ... Bar code.

Claims (4)

[Claims] A first method for measuring characteristics of each of a plurality of semiconductor elements formed in an array on a wafer.
And a second step of dividing the wafer for each semiconductor element.
And a third step of picking up the semiconductor element divided in the second step and die-bonding the semiconductor element to a device member. In the first step, the plurality of wafers A target chip functioning as a coordinate marker is formed at the position, and the position coordinates of each semiconductor element are determined based on the target chip, and the characteristics of each semiconductor element corresponding to the position coordinates are measured. The data and the characteristic data of each semiconductor element are recorded in association with each other. In the third step, the position coordinate data of each semiconductor element recorded in the first step and each of the data divided in the second step are recorded. A method of manufacturing a semiconductor device, comprising collating position coordinates of a semiconductor device, picking up the semiconductor device based on the collation result, and die-bonding the semiconductor device. 2. A first method for measuring the characteristics of a plurality of semiconductor elements, each of which is arranged and formed on a wafer.
And a second step of dividing the wafer for each semiconductor element.
And a third step of picking up the semiconductor element divided in the second step and die-bonding it to a device member. In the first step, each of the semiconductor elements Measure the characteristics, check the chip with the characteristic failure based on the characteristic data of the measurement result,
A target chip functioning as a coordinate marker is formed at the obtained plurality of characteristic defective chip positions, the position coordinates of each semiconductor element are obtained based on the target chip, and the obtained position coordinate data and the measurement result of each semiconductor element are obtained. In the third step, the position data of each semiconductor element recorded in the first step and the position coordinates of each semiconductor element divided in the second step are recorded. A semiconductor device is picked up and die-bonded based on the result of the comparison. 3. A first method for measuring a characteristic of each of a plurality of semiconductor elements formed in an array on a wafer.
And a second step of dividing the wafer for each semiconductor element.
And a third step of picking up the semiconductor element divided in the second step and die-bonding the semiconductor element to a device member. In the first step, the plurality of wafers A target chip functioning as a coordinate marker is formed at the position, and the position coordinates of each semiconductor element are determined based on the target chip, and the characteristics of each semiconductor element corresponding to the position coordinates are measured. The data and characteristic data of each semiconductor element are recorded in association with each other. In the third step, when the characteristic data of each semiconductor element recorded in the first step satisfies a predetermined condition, the semiconductor element Is identified by the position coordinate data recorded in association with the characteristic data, and the position coordinate data and the position of each semiconductor element divided in the second step are specified. The method of manufacturing a semiconductor device collates the coordinates, characterized by die bonding to pick up the semiconductor elements on the basis of the comparison result. 4. In the first step, when the position coordinate data and the characteristic data of each semiconductor element are recorded in association with each other, the product information including the position coordinate data and the characteristic data of each semiconductor element is recorded on the wafer. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the information is additionally recorded.