201013199 九、發明說明： 【發明所屬之技術領域】 本發明係有關於led後段流程，特別是關於led後 段流程中的測試及分選方法。 【先前技術】 在早期的半導體測試及分選製程中，晶粒在測試後被 ©依其好壞點上不同顏色的記號(Ink)，分選裝置再根據晶粒 . 上的記號做分選，Wiesler等人在美國專利第3847284號中 提出一種輔助記號分選的方法，以XY絕對座標記錄1C 位置及好壞等級資料，配合點記做分選，在晶粒在同一台 設備上移動時，協助定位到相對應的1C位置。然而，IC 的尺寸隨著半導體技術的發展變得越來越大，行_列 (Row-Column; R-C)方式定位比XY座標定位簡單且快 速，亦能提供足夠的準確度’因此χγ座標定位方法遭到 ❹ 淘汰。 led製程技術主要源自於半導體技術，圖1為目前的 LED後段測試分選流程的示意圖，在圖1的流程中，點測 設備(Prober)lO先對一晶圓環上的LED晶粒進行測試以取 得各晶粒的電性、光學特性、外觀等晶粒屬性資料並加以 分級’再依各等級晶粒在晶圓上的分佈狀況產生如圖2所 示之晶圓14上晶粒分佈的晶圓地圖檔案（mapfUe)，以及 將該些晶粒以R-C格式定位的位置資料，而後，載有晶圓 14的該晶圓環被送入分選設備（s〇rter)，分選設備對該曰曰 201013199 圓樣再一次以R-C定位格式掃描 ’再根據該晶圓地圖檔案201013199 IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a post-led process, particularly to a test and sorting method in the post-LED process. [Prior Art] In the early semiconductor testing and sorting process, the grain was tested by the different color marks (Ink) according to its good and bad points, and the sorting device sorted according to the mark on the grain. U.S. Patent No. 3,847,284, to Wiesler et al., teaches a method of assisting in the sorting of marks, recording 1C position and good or bad grade data in XY absolute coordinates, and sorting with dots, when the die moves on the same device. , assist in positioning to the corresponding 1C position. However, the size of ICs has become larger and larger with the development of semiconductor technology. Row-Column (RC) positioning is simpler and faster than XY coordinates, and can provide sufficient accuracy'. Therefore, χγ coordinate positioning The method was eliminated. The LED process technology is mainly derived from semiconductor technology. Figure 1 is a schematic diagram of the current LED back-end test sorting process. In the flow of Figure 1, the probe device (Prober) lO first performs the LED die on a wafer ring. The test is performed to obtain and classify the grain attribute data of each die such as electrical properties, optical properties, and appearance. Then, according to the distribution of the die on each wafer, the grain distribution on the wafer 14 as shown in FIG. 2 is generated. a wafer map file (mapfUe), and location data for positioning the dies in an RC format, and then the wafer ring carrying the wafer 14 is sent to a sorting device (s〇rter), sorting device Scan the 曰曰201013199 round again in RC positioning format' and then based on the wafer map file
錯形成的該方形範圍。 LED晶粒的尺寸與-般半導體晶粒概，相對的小恨 多，且LED晶粒在擴張藍膜使晶粒互相分離後，容易移位 ❹而離開原本晶圓地圖檔案提供的R-C座標範圍内’參照圖 4，理想上，圖3之晶圓14在擴張後，各晶粒間的關係將 如圖4左侧！示，每一晶粒間的距離都相等，然而實際擴 張後的晶圓卻如圖4右侧所示，可能出現位移而離開原本 的範圍’例如晶粒142及144在圖4左侧以（1，3)及（1,4)表 示’然而，晶粒位移如圖4右侧後，在r_c座標格式下， 晶粒142及144仍只能以（1，3)及（1，4)表示，且由於LED晶 粒的尺寸小，更容易在分選設備進行比對時就出現錯誤， ❹ 造成分選出錯。 為提供LED產品在亮度及色彩上的均勻度，_目前一片 晶圓上的LED晶粒往往被分成數十甚至上百個級別，當相 同級別的晶粒位於同一區塊上時，分選設備僅需在鄰近的 區域挑撿，因此在與點測設備提供的檔案做比對位置時不 易出錯。然而，當不同級別的晶粒在晶圓上的分布散礼的 時候，為了挑撿起相同級別的晶粒，此時便需要由當下挑 選的晶粒跳躍(jump)到遠處的另一顆相同級別晶粒，這個 過程就產生了因移動到錯誤位置而撿起錯誤晶粒的風&。 6 201013199 如前所述，由於在之前的晶粒 本身就有錯位的誤差值存在，難以精準=二：粒排列 膜上’且藍膜在分選過程中亦會因 ==了分選錯位的機會，而當有跨區跳躍時= = 題會更加嚴重’發生錯誤的機率更為提高:The square range formed by mistake. The size of the LED die is much smaller than that of the general semiconductor die, and the LED die is easily displaced after leaving the blue film separated from each other, leaving the RC coordinate range provided by the original wafer map file. Referring to Figure 4, ideally, after the wafer 14 of Figure 3 is expanded, the relationship between the grains will be as shown on the left side of Figure 4! It is shown that the distance between each die is equal, but the actual expanded wafer is as shown on the right side of FIG. 4, and may be displaced away from the original range', for example, the dies 142 and 144 are on the left side of FIG. 4 ( 1,3) and (1,4) indicate 'however, after the grain displacement is as shown in the right side of Fig. 4, in the r_c coordinate format, the grains 142 and 144 can still only be (1, 3) and (1, 4). It is indicated that, due to the small size of the LED die, it is easier to make an error when the sorting device performs the comparison, which causes a sorting error. In order to provide uniformity in brightness and color of LED products, _ currently the LED dies on a wafer are often divided into tens or even hundreds of levels. When the same level of dies are on the same block, the sorting device It only needs to be provoked in the adjacent area, so it is not easy to make mistakes when comparing the files provided by the test equipment. However, when different levels of crystal grains are distributed on the wafer, in order to provoke the same level of grain, it is necessary to jump from the currently selected die to another in the distance. With the same level of grain, this process produces a wind & that picks up the wrong grain due to moving to the wrong position. 6 201013199 As mentioned above, since the error value of the misalignment in the previous grain itself exists, it is difficult to accurately = two: the grain is arranged on the film 'and the blue film will also be sorted by the == in the sorting process. Opportunity, and when there is a cross-region jump = = the question will be more serious 'the probability of error is even higher:
錯=的發^在設備運行過程中不易察覺，會—直持續直到 出貨品質管制(QC)時才會被發現，在發現的時候往往已經 造成一個批量生產的錯誤，需要整批重新生產。因此，改 善錯位對LED產業的發展是一個十分重要的議題。 如圖5所示，為降低發生錯位的風險，ASM公司提出 一種設置於點測設備1〇與分選設備12之間的晶圓掃瞄器 (wafer scanner) 18 ’在分選之前進行一次使用χγ座標的晶 圓掃猫’再將該XY座標資料與點測設備10提供的晶圓地 圖檔案匹配(match) ’取得各晶粒的屬性資料以進行分選， 以增加晶粒定位的準確性，但由於點測設備提供的晶圓地 圖檔案是R-C座標格式，且分選設備的掃瞄亦是r_c座標 格式，晶圓掃瞄器18提供的χγ座標的晶圓圖形在與r_c 座標作匹配時仍易發生錯位。 【發明内容】 本發明的目的之一，在於提出一種LED後段流程中的 測試及分選方法。 本發明的目的之一，在於提出一種具良好定位能力的 LED晶粒測試及分選方法。 7 201013199 根據本發明，一種LED後段的測試及分選方法，包括 測試一晶圓以產生每一晶粒的屬性資料與其第一絕對座 標，根據該些屬性資料與該第一絕對座標產生一晶圓地圖 檔案，接收該晶圓並讀入該晶圓地圖檔案，根據該第一絕 對座標移動一撿取裝置到一第一位置，提供一影像資訊補 " 償該第一位置的誤差，使該撿取裝置移動到一第二位置， 該第二位置具有一第二絕對座標，以及比對該第二絕對座 標與該第一絕對座標，在兩者間的誤差在一允許範圍内 ^ 時，根據該第一絕對座標對應的屬性資料分選該晶粒。 變化地，由一晶圓掃瞄器產生第二絕對座標，分選設 備再比對該第一及第二絕對座標，進行晶粒分選。 本發明提出之LED測試分選流程在後段測試LED晶 圓時，產生一包含絕對座標位置的晶圓地圖檔案，在由點 測設備到分選設備的分選流程中確認LED晶圓中各晶粒 的絕對座標，再與該晶圓地圖檔案作比對以取得相關點測 Q 的資料，消除擴張後晶圓在二台機器轉移時所造成的誤 差。 【實施方式】 、 本發明提出一種LED後段流程中的測試及分選方 法，圖6為本發明一實施例的示意圖，首先，晶圓在點測 - 設備20以一個已知的參考座標點之晶粒做為計算的參考 點，使用XY座標來表達各個晶粒的位置，產生包含每一 晶粒的電性、光學特性、外觀等晶粒屬性及其第一 XY座 8 201013199 鲁 標位置等資料的晶圓地圖檔案，接著，測試完畢的晶圓被 送入分選設備22，在此同時，分選設備22讀入該晶圓地 圖檔案，配合影像技術找到已知的參考座標點之晶粒以 點測設備20提供的第一 χγ座標位置去定位—晶粒，同時 配合即時的影像資訊補償該晶粒實際位置與讀入的第一 XY座標間的誤差，得到該晶粒實際位置的第二χγ座枳， 再將該晶粒的第二ΧΥ座標與其第一 χγ座標做比對/在 兩者間的誤差在一預設的允許範圍内時，判斷兩者相符， 根據該第一 χγ座標連結的屬性資料分選該晶粒。 =時的影像資訊由影像辨識系統提供，影像辨識系統 δ又置於分選設備中，在分選設備撿取晶粒前_辨 做為C的晶粒正確’一般以預設的擴張喊倍數 為搜寻的辨識範圍，？_係指擴張後晶粒和晶粒間的間 。影像辨識技術為習知技術。 圖/係本發明另一實施例的流程圖’點測設備對晶圓 曰行測忒2〇〇，獲得每一晶粒的電性、光學特性、外觀等 =粒屬性等資料後，產生並輸^以XY座標記錄晶粒位置 i aa圓地®槽案21G ’接著，分選設備接收晶圓以及晶圓 田 υ ’當要跨越一個區段去挑選晶粒時，分選設 =的撿取裝置，例如具真空吸力的擺臂根據點測設備提 "的晶圓地圖樓案中的第一 ΧΥ座標做跳躍(jump)230,再 1己合影像辨識系統提供的即時影像資訊，補償對該晶粒位 _的誤差240 ’最後’在步驟250比對分選設備產生的第 〜XY座標與點測裝置提供之第一 xy座標間的誤差是否 9 201013199 在允許範圍内，以對該晶粒做分選260。 在其他實施例尹，分選後晶粒的資科表達也可以透過 XY絕對位置座標的比對達成資料的搬移與比對確認的動 作，形成一個保護機制》Wrong = the hair ^ is not easy to detect during the operation of the equipment, will continue until the shipment quality control (QC) will be discovered, often caused a mass production error at the time of discovery, the entire batch needs to be re-produced. Therefore, improving misplacement is a very important issue for the development of the LED industry. As shown in FIG. 5, in order to reduce the risk of misalignment, ASM Corporation proposes a wafer scanner 18' disposed between the spotting device 1 and the sorting device 12, which is used before sorting. The χγ coordinate wafer sweeping cat 'matches the XY coordinate data with the wafer map file provided by the spotting device 10' to obtain the attribute data of each die for sorting to increase the accuracy of the grain positioning. However, since the wafer map file provided by the spotting device is in the RC coordinate format, and the scanning of the sorting device is also in the r_c coordinate format, the wafer pattern of the χγ coordinate provided by the wafer scanner 18 matches the r_c coordinate. It is still prone to misplacement. SUMMARY OF THE INVENTION One object of the present invention is to provide a test and sorting method in the LED back-end flow. One of the objects of the present invention is to provide an LED die test and sorting method with good positioning capability. 7 201013199 According to the present invention, a method for testing and sorting a rear segment of an LED includes testing a wafer to generate attribute data of each die and a first absolute coordinate thereof, and generating a crystal according to the attribute data and the first absolute coordinate a circular map file, receiving the wafer and reading the wafer map file, moving a capture device to a first position according to the first absolute coordinate, providing an image information supplement " compensation for the first position error; The picking device moves to a second position, the second position has a second absolute coordinate, and the error between the second absolute coordinate and the first absolute coordinate is within an allowable range And sorting the die according to the attribute data corresponding to the first absolute coordinate. Optionally, a second absolute coordinate is generated by a wafer scanner, and the sorting device performs grain sorting for the first and second absolute coordinates. The LED test sorting process proposed by the present invention generates a wafer map file containing an absolute coordinate position when testing the LED wafer in the latter stage, and confirms each crystal in the LED wafer in the sorting process from the spot measuring device to the sorting device. The absolute coordinates of the particles are then compared with the wafer map file to obtain the relevant point Q data, eliminating the error caused by the expansion of the wafer after the expansion of the two machines. [Embodiment] The present invention provides a test and sorting method in the LED back-end flow. FIG. 6 is a schematic diagram of an embodiment of the present invention. First, the wafer is in the spot-measurement device 20 with a known reference coordinate point. The grain is used as a reference point for calculation, and the position of each grain is expressed by using XY coordinates, and the grain properties including the electrical, optical characteristics, and appearance of each grain are generated, and the first XY block 8 201013199 The wafer map file of the data is then sent to the sorting device 22, and at the same time, the sorting device 22 reads the wafer map file and uses the image technology to find the crystal of the known reference coordinate point. The granules are positioned by the first χ γ coordinate position provided by the spotting device 20 to locate the die, and the instantaneous image information is used to compensate the error between the actual position of the die and the read first XY coordinate to obtain the actual position of the die. a second χ 枳 coordinate, and comparing the second ΧΥ coordinate of the die with the first χ γ coordinate / when the error between the two is within a preset allowable range, determining that the two match, according to the first Χγ The attribute data of the coordinate link is sorted into the die. The image information at the time of = is provided by the image recognition system, and the image recognition system δ is placed in the sorting device. Before the sorting device picks up the grain, the grain is correctly determined as C. For the scope of identification of the search,? _ refers to the space between the grains and grains after expansion. Image recognition technology is a conventional technique. Figure / is a flow chart of another embodiment of the present invention, the spotting device measures the wafer, obtains the electrical properties, optical characteristics, appearance, etc. of each grain, and then generates data. Input ^ record the grain position with XY coordinates i aa round ground ^ slot case 21G 'Next, the sorting device receives the wafer and the wafer field 'When it is necessary to select a die across a section, the setting is = The taking device, for example, the swing arm with vacuum suction is used as a jump 230 according to the first coordinate in the wafer map building of the spot measuring device, and the instant image information provided by the image recognition system is compensated. The error 240 'final' of the die bit_ is finally determined in step 250 by comparing the error between the first XY coordinate generated by the sorting device and the first xy coordinate provided by the spotting device to 9 201013199. The grains are sorted 260. In other embodiments, the classification of the grain after the sorting can also be achieved through the comparison of the coordinates of the XY absolute position coordinates to achieve the movement of the data and the confirmation of the comparison to form a protection mechanism.
本發明提出之分選及測試方法亦相容於點測設備及 分選設備之間具有晶圓掃瞄器的製程，圖8為本發明又一 實施例的示意圖，在點測設備30產生包含χγι座標、晶 粒屬性等的晶圓地圖檔案後，晶圓掃晦器32再掃:晶^ j生XY2座標，分選設備34比對χγι座標與χγ2座標， 當做分選晶粒過程的位置定位之座標點，分選設備％再 取其附加資料加上設備本身的影像補償進行分選。 在ΧΥ絕對座標的位置記錄方式下，如^ 9所示，晶 粒142和144的位移可以精準地以χγ座標表示，因此能 =供遠比R-C座標要高的精準度，因而能夠降低錯位機 會，消除擴張後晶圓在二台機器轉移時產生的誤差。 當不同級別的晶粒分布散亂時，要挑選同一級別的晶 粒到特定位置，需要在晶圓上快速定位到相魏的晶粒， 耩由絕對位置較位，可以精準的移動到所要挑選的晶 粒’加上影像處理的補償降低分選錯誤的機率，提高設備 設備的正確性。 以上對於本發明之較佳實施例所作的敘述係為閣明 之目的，而無意限定本發_杨為所揭露㈣式，基於 以上的教導或從本發明的實施例學習而作修改或變化是 可能的，實施例係為解說本發明的原理以及讓熟習該項技 201013199 術者以各種實施例利用本發明在實際應用上而選擇及敘 述，本發明的技術思想企圖由以下的申請專利範圍及其均 等來決定。 【圖式簡單說明】 圖1係一種習知LED後段流程的示意圖； 圖2係晶圓地圖檔案的示意圖； 圖3係習知以R-C座標格式的示意圖； 圖4係習知將晶粒位置以R-C座標表不的不意圖， 圖5係另一種習知LED後-段流程的示意圖； 圖6係本發明一實施例的LED後段流程示意圖； 圖7係本發明另一實施例的測試及分選流程圖； 圖8係本發明又一實施例的LED後段流程示意圖；以 及 圖9係將晶粒位置以XY座標表不的不意圖。 【主要元件符號說明】 10 點測設備 12 分選設備 14 晶圓 142 晶粒 144 晶粒 18 晶圓掃瞎器 20 點測設備 11 201013199 22 分選設備 200 測試 210 輸出晶圓地圖檔案 220 接收晶圓地圖檔案 230 根據晶圓地圖檔案跳躍 240 配合影像辨識補償誤差 250 比對 260 分選 30 點測設備 32 晶圓掃猫 34 分選設備The sorting and testing method proposed by the present invention is also compatible with the process of having a wafer scanner between the spotting device and the sorting device. FIG. 8 is a schematic view of another embodiment of the present invention, which is included in the spotting device 30. After the wafer map file of χγι coordinates, grain properties, etc., the wafer broom 32 is further scanned: the crystal XY2 coordinates, the sorting device 34 compares the χγι coordinates and the χγ2 coordinates, as the position of the sorting grain process The coordinate point of the positioning, the sorting device% takes its additional data plus the image compensation of the device itself for sorting. In the position recording mode of the absolute coordinate, as shown in Fig. 9, the displacement of the crystal grains 142 and 144 can be accurately expressed by the χ γ coordinate, so that the accuracy can be higher than that of the RC coordinate, thereby reducing the chance of misalignment. To eliminate the error caused by the transfer of the wafer after the expansion of the two machines. When different levels of grain distribution are scattered, it is necessary to select the same level of grain to a specific position, and it is necessary to quickly locate the phase grain on the wafer, and the absolute position is relatively high, so that it can be accurately moved to the desired position. The 'grain' plus image processing compensation reduces the chance of sorting errors and improves the correctness of the equipment. The above description of the preferred embodiments of the present invention is for the purpose of the disclosure, and is not intended to limit the scope of the present invention. It is possible to modify or change based on the above teachings or learning from the embodiments of the present invention. The embodiments are described and illustrated in the practical application of the present invention in various embodiments using the present invention. The technical idea of the present invention is intended to be based on the following claims. Equal to decide. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a conventional LED back-end flow; FIG. 2 is a schematic diagram of a wafer map file; FIG. 3 is a schematic diagram of a conventional RC coordinate format; FIG. RC coordinates are not intended, FIG. 5 is a schematic diagram of another conventional LED back-segment flow; FIG. 6 is a schematic diagram of a rear stage of an LED according to an embodiment of the present invention; FIG. 7 is a test and sub-division of another embodiment of the present invention. FIG. 8 is a schematic flow chart of a rear stage of an LED according to still another embodiment of the present invention; and FIG. 9 is a schematic view showing the position of the crystal grain as an XY coordinate. [Main component symbol description] 10 Spot measurement equipment 12 Sorting equipment 14 Wafer 142 Grain 144 Grain 18 Wafer broom 20 Spot measuring equipment 11 201013199 22 Sorting equipment 200 Test 210 Output wafer map file 220 Receiving crystal Round Map File 230 Jumps based on wafer map file 240 with image recognition compensation error 250 comparison 260 sorting 30 point measuring device 32 wafer sweeping cat 34 sorting device
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