CN101140307B - Automatically visual inspection method - Google Patents
Automatically visual inspection method Download PDFInfo
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- CN101140307B CN101140307B CN 200610030806 CN200610030806A CN101140307B CN 101140307 B CN101140307 B CN 101140307B CN 200610030806 CN200610030806 CN 200610030806 CN 200610030806 A CN200610030806 A CN 200610030806A CN 101140307 B CN101140307 B CN 101140307B
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Abstract
An automatic visual examination method includes steps below: Obtaining a qualified wafer ratio test image and converting the image into a document format acceptable for automatic visual examination tools; selectively carrying out automatic visual examination to the qualified wafer ratio test image with converted document format and getting an automatic visual examination image. The automatic visual examination method provided by the present invention creates a database link amongst qualified wafer ratio test, automatic visual examination and manual visual examination, thus improving detecting efficiency and enhancing reliability of detecting data. Moreover, the automatic visual examination method of the present invention realizes automatic visual examination to any chip in the wafer on actual demand to avoid ineffective detection and increase detecting efficiency.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of automatically visual inspection method.
Background technology
In the actual production,, need carry out the OQC of product usually for guaranteeing the quality of the product that the client receives.Current OQC utilizes automated visual inspection usually, and (Auto-Visual Inspection, AVI) instrument carries out.
Fig. 1 is the testing result vertical view of the existing AVI detection method of explanation, and as shown in Figure 1, existing AVI detection method is: obtain the optical detection image; Choose surveyed area 10; Calculate the gray-scale value of each chip in the surveyed area, and settle the standard chip and discrimination standard; The gray-scale value of each chip in the surveyed area is compared with the gray-scale value of standard chips respectively, judge according to discrimination standard whether each chip meets product requirement in the surveyed area.But, in the actual production, before carrying out OQC, also need the whole chips in the wafer are carried out the yield test, comprise chip testing electrical property (Chip Probing testing, CP testing) and the wafer acceptability test (Wafer Accept ability Testing, WAT), and wafer yield test failure chip and AVI detect chip failing 13 and all can not shipment give the client.Because the test of wafer yield detects with AVI and is independently testing process, for the chip failing 12 that wafer yield test result determines, its AVI testing result still may be judged to be it qualified chip 11, but this chip will be a chip failing by synthetic determination.Because the test of wafer yield was carried out before shipment detects, therefore, the chip failing that wafer yield test result is determined need not to carry out the AVI detection again.And existing method is all carried out the AVI detection to the whole chips in the selection area, and promptly the chip failing 14 that wafer yield test judgement is gone out has carried out duplicate detection, has increased the invalid detection time.
AVI detects and need utilize the AVI instrument to carry out.Compare with the optical microscope manual detection instruments such as (Optical Microscope, OM instruments) of routine, the AVI instrument can provide automatic functions such as detecting methods of sampling input, testing result output, image viewing and failpoint classification.Observe but utilize the AVI instrument can't carry out failpoint, in the actual detected process,, also need utilize the OM instrument to carry out failure analysis for determining the failure mode of classified failpoint.But in the existing method, no automaticdata link between AVI instrument and the OM instrument, and the operator needs position manually definite and that write down failpoint when utilizing the OM instrument to carry out failure analysis, limited the raising of detection efficiency, is unfavorable for improving production capacity.
Application number provides a kind of Waffer edge automated visual inspection collecting method for the United States Patent (USP) of " 7013222 B2 ", Fig. 2 detects principle schematic for the existing Waffer edge AVI of explanation, as shown in Figure 2, this method is: at first, one wafer 20 is provided, described wafer has upper surface 21, lower surface 22 and Waffer edge 23, and the side view at described edge is the camber line of corresponding 180 degree central angles; Then, utilize image-capturing unit 24 to obtain the test pattern of Waffer edge place area-of-interest; At last, store described test pattern, in order to analyze Waffer edge place area-of-interest.Utilize the method can catch the also test pattern of memory chip edge point-of-interest automatically, solved the data link problems between AVI instrument and the OM instrument; But this method still adopts the pointwise test method to obtain the interior test pattern of edge's area-of-interest, has still increased the invalid detection time, is unfavorable for improving production capacity.Thus, how to provide a kind of automatically visual inspection method that can choose detection chip in the selection area arbitrarily to become those skilled in the art's problem demanding prompt solution.
Summary of the invention
The invention provides a kind of automatically visual inspection method, can choose the interior detection chip of selection area arbitrarily and carry out the AVI detection, and then can no longer carry out AVI to wafer yield test failure point and detect, reduce invalid detection.
A kind of automatically visual inspection method provided by the invention comprises:
Obtain wafer yield test pattern;
Wafer yield test pattern is converted into the acceptable file layout of automated visual inspection instrument;
Wafer yield test pattern to the translated file form carries out the selectivity automated visual inspection;
Obtain the automated visual inspection image.
The step that described wafer yield test pattern is converted into the file layout of follow-up automated visual inspection instrument acceptance comprises:
Determine actual automated visual inspection zone;
Chip in the actual automated visual inspection zone is made specific identification tags.
Comprise whole wafer yield test passes chips in the described actual automated visual inspection zone; Comprise part wafer yield test passes chip in the described actual automated visual inspection zone; The file layout that described automated visual inspection instrument is accepted is the SINF form; Described selectivity automated visual inspection comprise in the actual automated visual inspection zone all wafer yield test passes chips carry out automated visual inspection; Described selectivity automated visual inspection comprises and divides wafer yield test passes chip to carry out automated visual inspection to actual automated visual inspection intra-zone.
The step of described acquisition automated visual inspection image comprises:
Chip in the actual automated visual inspection zone is carried out automated visual inspection;
According to the automated visual inspection result chip is divided into qualified chip and chip failing;
Change the specific identification tags of qualified chip and chip failing into qualified chip mark and chip failing mark respectively.
Only comprise qualified chip mark and chip failing mark in the described automated visual inspection image.
Compared with prior art, the present invention has the following advantages:
1. adopt automatically visual inspection method provided by the invention, wafer yield test detect with AVI and Manual Visual Inspection between set up data and link, improved detection efficiency, strengthened the reliability of detection data;
2. when adopting automatically visual inspection method provided by the invention to carry out the AVI detection, in identical detection time, detectable number of chips increases, and has strengthened the reliability that detects data;
3. when adopting automatically visual inspection method provided by the invention to carry out the AVI detection, when detecting the chip of equal number, reduce required detection time, improved detection efficiency, helps improving production capacity;
4. using automatically visual inspection method provided by the invention can require any chip in the wafer is carried out the AVI detection according to reality, can avoid invalid detection, has improved detection efficiency.
Description of drawings
Fig. 1 is the testing result vertical view of the existing AVI detection method of explanation;
Fig. 2 detects principle schematic for the existing Waffer edge AVI of explanation;
Fig. 3 is the automated visual inspection system architecture synoptic diagram of explanation the inventive method embodiment;
Fig. 4 is the wafer yield test pattern synoptic diagram of explanation the inventive method embodiment;
Fig. 5 can receive the wafer yield test pattern synoptic diagram of form for the AVI instrument of explanation the inventive method first embodiment;
Fig. 6 can receive the wafer yield test pattern synoptic diagram of form for the AVI instrument of explanation the inventive method second embodiment;
Fig. 7 is the AVI detected image synoptic diagram of explanation the inventive method embodiment;
Wherein: same structure indicates with same label;
10: existing AVI surveyed area; 11: qualified chip;
12: wafer yield test failure chip; 13:AVI detects chip failing;
14:AVI and wafer yield are tested dual chip failing;
15:AVI or wafer yield test failure chip;
20: wafer; 21: upper wafer surface;
22: the wafer lower surface; 23: Waffer edge;
24: image-capturing unit; 30: the qualified chip mark;
40: the chip failing mark; 50: specific identification tags.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.For avoiding causing unnecessary beyonding one's depth, omitted known technological operation in the embodiment explanation of this paper and described.
The implementation step that application the inventive method is carried out automated visual inspection is: obtain wafer yield test pattern; Wafer yield test pattern is converted into the acceptable file layout of automated visual inspection instrument; Wafer yield test pattern to the translated file form carries out the selectivity automated visual inspection; Utilize the described AVI detected image of OM tool analysis and preserve OM tool analysis result.
Fig. 3 is the automated visual inspection system architecture synoptic diagram of explanation the inventive method embodiment, as shown in Figure 3, implements the required automated visual inspection system of the inventive method and comprises: basic database, plurality of data link unit, data handling system, AVI instrument; Described plurality of data link unit respectively between described basic database and the data handling system, provide data chainning to connect the road between described data handling system and the AVI instrument; The corresponding data link unit is designated as basic data link unit, data conversion link unit respectively; Shown in the part that dotted line surrounded among Fig. 3, described automated visual inspection system also can comprise the OM instrument, in order to analyze described AVI detected image; Data link unit between described AVI instrument and the OM instrument, between described OM instrument and the data handling system is designated as data analysis link unit and data storage link unit respectively.
The embodiment of the inventive method as an illustration, described basic database comprises wafer yield test data information; Described data handling system is known operating system; Described basic data link unit is known data transfer medium; Described data conversion link unit is the SINF series of tools; Described data analysis link unit and data storage link unit are the KLA series of tools; Described AVI tools selection AugustTechnology/AX1930 series of tools; Described OM tools selection Carl Zeiss/Axioprint300 series of tools.
The concrete implementation step that application the inventive method is carried out automated visual inspection is:
At first, obtain wafer yield test pattern; And wafer yield test pattern is converted into the acceptable file layout of automated visual inspection instrument.
Described wafer yield test pattern obtains via wafer yield testing procedure in the manufacture course of products; Described wafer yield test comprises chip testing electrical property (CP testing) and wafer acceptability test (WAT).
Qualified chip and chip failing with different fail categories have qualified chip mark or chip failing mark respectively in the described wafer yield test pattern; Utilize described data handling system and data conversion link unit that described wafer yield test pattern is converted into the file layout that the AVI instrument is accepted.The embodiment of the inventive method as an illustration, the file layout that described AVI instrument is accepted is the SINF form.
Fig. 4 is the wafer yield test pattern synoptic diagram of explanation the inventive method embodiment, and as shown in Figure 4, described basic AVI detection zone is shown in the zone of dotted line among the figure, and the size of described basic AVI detection zone and number are determined according to technological requirement; Comprise wafer yield test passes chip 11 and wafer yield test failure chip 12 in the described basic AVI detection zone; Described wafer yield test passes chip 11 and wafer yield test failure chip 12 have qualified chip mark 30 and chip failing mark 40 respectively; Described chip failing mark 40 comprises the not isolabeling that writes down different fail categories.
Described AVI instrument only detects the chip with specific identification tags usually, and thus, the step that described wafer yield test pattern is converted into the file layout of AVI instrument acceptance comprises: determine actual AVI detection zone; Chip in the actual AVI detection zone is made specific identification tags.
Fig. 5 can receive the wafer yield test pattern synoptic diagram of form for the AVI instrument of explanation the inventive method first embodiment, as shown in Figure 5, first embodiment as the inventive method, indicating the zone in the dotted line is basic AVI detection zone, and described basic AVI detection zone is wafer surface center or edge's arbitrary region; Described actual AVI detection zone is determined according to wafer yield test result; Described actual AVI detection zone comprises the whole wafer yield test passes chips 11 in the basic AVI detection zone; For wafer yield test passes chip 11 images in the described actual AVI detection zone are converted into the acceptable file layout of AVI instrument, the qualified chip mark 30 that needs to indicate each wafer yield test passes chip in the actual AVI detection zone changes specific identification tags 50 into.
Fig. 6 can receive the wafer yield test pattern synoptic diagram of form for the AVI instrument of explanation the inventive method second embodiment, as shown in Figure 6, second embodiment as the inventive method, indicating the zone in the dotted line is basic AVI detection zone, and described basic AVI detection zone is wafer surface center or edge's arbitrary region; Described actual AVI detection zone is determined according to wafer yield test result; Described actual AVI detection zone comprises the part wafer yield test passes chip 11 in the basic AVI detection zone; For wafer yield test passes chip 11 images in the described actual AVI detection zone are converted into the acceptable file layout of AVI instrument, the qualified chip mark 30 that needs to indicate each wafer yield test passes chip in the actual AVI detection zone changes specific identification tags 50 into.
The selection of the position of the AVI detection zone shown in the accompanying drawing and scope, failpoint and various marks be chosen for the special selection of being convenient to concrete enforcement of the present invention and making; should be as qualification to the inventive method embodiment; rational arbitrarily modification and equivalents that those skilled in the art make this do not influence the enforcement of the inventive method, and should be included in protection scope of the present invention.
Then, the AVI instrument receives the described wafer yield test pattern that can accept file layout that has, and the wafer yield test pattern of translated file form is carried out the selectivity automated visual inspection.
Described AVI instrument obtains the described wafer yield test pattern that can accept file layout that has via the data conversion link unit; The step of described acquisition AVI detected image comprises: the chip that has specific identification tags in the actual AVI detection zone is carried out AVI detect; According to the AVI testing result chip is divided into qualified chip and chip failing; Change the specific identification tags of qualified chip and chip failing into qualified chip mark and chip failing mark respectively.
Described actual AVI sensing range is determined according to customer requirement.
Describedly the chip that has specific identification tags is carried out the step that AVI detects comprise: calculate the gray-scale value of each chip in the actual AVI detection zone, and settle the standard chip and discrimination standard; The gray-scale value of each chip in the actual AVI detection zone is compared with the gray-scale value of standard chips respectively, and judge according to discrimination standard whether each chip meets product requirement in the actual AVI detection zone; And then the chip that will meet product requirement is judged to be qualified chip, and the chip that does not meet product requirement is judged to be chip failing.
Fig. 7 is the AVI detected image synoptic diagram of explanation the inventive method embodiment, as shown in Figure 7, only comprises qualified chip mark 30 and chip failing mark 40 in the final AVI detected image that obtains.
At last, utilize the described AVI detected image of OM tool analysis and preserve OM tool analysis result.
Described OM instrument obtains described AVI detected image via the data analysis link unit, and the chip failing with different chip failing marks is carried out failure analysis.Described OM tool analysis result is stored in data handling system via the data analysis link unit.
Adopt automatically visual inspection method provided by the invention, wafer yield test detect with AVI and Manual Visual Inspection between set up data and link, improved detection efficiency, strengthened the reliability of detection data; When adopting automatically visual inspection method provided by the invention to carry out the AVI detection, in identical detection time, detectable number of chips increases, and has strengthened the reliability that detects data; When adopting automatically visual inspection method provided by the invention to carry out the AVI detection, when detecting the chip of equal number, reduce required detection time, improved detection efficiency, helps improving production capacity; Using automatically visual inspection method provided by the invention can carry out the AVI detection to any chip in the wafer, can avoid invalid detection, has improved detection efficiency.
It should be noted that accompanying drawing all adopts very the form of simplifying and all uses non-ratio accurately, only in order to convenient, the purpose of the aid illustration embodiment of the invention lucidly.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (8)
1. automatically visual inspection method comprises:
Obtain wafer yield test pattern, comprise the qualified chip mark of yield test passes chip in the described yield test pattern;
Wafer yield test pattern is converted into the acceptable file layout of automated visual inspection instrument, and this step comprises: determine actual automated visual inspection zone, described actual automated visual inspection zone comprises wafer yield test passes chip; Change the qualified chip mark that indicates each wafer yield test passes chip in the actual automated visual inspection zone into specific identification tags;
Wafer yield test pattern to the translated file form carries out the selectivity automated visual inspection, promptly the chip that has specific identification tags in the described actual automated visual inspection zone is carried out automated visual inspection;
Obtain the automated visual inspection image.
2. automatically visual inspection method according to claim 1 is characterized in that: comprise whole wafer yield test passes chips in the described actual automated visual inspection zone.
3. automatically visual inspection method according to claim 1 is characterized in that: comprise part wafer yield test passes chip in the described actual automated visual inspection zone.
4. automatically visual inspection method according to claim 1 is characterized in that: the file layout that described automated visual inspection instrument is accepted is the SINF form.
5. automatically visual inspection method according to claim 2 is characterized in that: described selectivity automated visual inspection comprise in the actual automated visual inspection zone all wafer yield test passes chips carry out automated visual inspection.
6. automatically visual inspection method according to claim 3 is characterized in that: described selectivity automated visual inspection comprises and divides wafer yield test passes chip to carry out automated visual inspection to actual automated visual inspection intra-zone.
7. automatically visual inspection method according to claim 1 is characterized in that: the step of described acquisition automated visual inspection image comprises:
Chip in the actual automated visual inspection zone is carried out automated visual inspection;
According to the automated visual inspection result chip is divided into qualified chip and chip failing;
Change the specific identification tags of qualified chip and chip failing into qualified chip mark and chip failing mark respectively.
8. automatically visual inspection method according to claim 1 is characterized in that: only comprise qualified chip mark and chip failing mark in the described automated visual inspection image.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 200610030806 CN101140307B (en) | 2006-09-04 | 2006-09-04 | Automatically visual inspection method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610030806 CN101140307B (en) | 2006-09-04 | 2006-09-04 | Automatically visual inspection method |
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| CN101140307A CN101140307A (en) | 2008-03-12 |
| CN101140307B true CN101140307B (en) | 2010-11-10 |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104183512B (en) * | 2013-05-21 | 2017-04-05 | 中芯国际集成电路制造(上海)有限公司 | A kind of wafer monitoring method |
| CN110146798B (en) * | 2019-03-29 | 2021-04-09 | 福建省福联集成电路有限公司 | Automatic analysis method and system for failure core particles |
| CN110310898B (en) * | 2019-05-29 | 2021-10-19 | 宁波芯健半导体有限公司 | Test chip marking method and chip yield improving method |
| CN112710942B (en) * | 2021-03-24 | 2021-06-08 | 上海伟测半导体科技股份有限公司 | System and method for analyzing wafer regional problem |
| CN113945788B (en) * | 2021-10-14 | 2024-01-30 | 深圳市杰普特光电股份有限公司 | Detection method, detection device, detection apparatus, electronic apparatus, and readable storage medium |
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| US20040141640A1 (en) * | 2003-01-08 | 2004-07-22 | Byoung-Ho Lee | Method for apparatus for detecting defects on a wafer |
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| US5256578A (en) * | 1991-12-23 | 1993-10-26 | Motorola, Inc. | Integral semiconductor wafer map recording |
| US5838951A (en) * | 1996-02-29 | 1998-11-17 | Anam Industrial Co., Ltd | Wafer map conversion method |
| US6088474A (en) * | 1997-07-23 | 2000-07-11 | Texas Instruments Incorporated | Inspection system for micromechanical devices |
| US6128403A (en) * | 1997-08-26 | 2000-10-03 | Mitsubishi Denki Kabushiki Kaisha | Wafer map analysis aid system, wafer map analyzing method and wafer processing method |
| US6895109B1 (en) * | 1997-09-04 | 2005-05-17 | Texas Instruments Incorporated | Apparatus and method for automatically detecting defects on silicon dies on silicon wafers |
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| JP特开平1-236640A 1989.09.21 |
| JP特开昭63-127544A 1988.05.31 |
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