CN101685786A - Method for automatically monitoring peripheral deburring and flaw of silicon slice by using optical microscope - Google Patents

Method for automatically monitoring peripheral deburring and flaw of silicon slice by using optical microscope Download PDF

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Publication number
CN101685786A
CN101685786A CN200810043812A CN200810043812A CN101685786A CN 101685786 A CN101685786 A CN 101685786A CN 200810043812 A CN200810043812 A CN 200810043812A CN 200810043812 A CN200810043812 A CN 200810043812A CN 101685786 A CN101685786 A CN 101685786A
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Prior art keywords
wafer
silicon chip
silicon
defective
edge
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CN200810043812A
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CN101685786B (en
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田蕊
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Hua Hong NEC Electronics Co Ltd
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Abstract

The invention discloses a method for automatically monitoring peripheral deburring and flaw by using an optical microscope, which comprises the following steps: 1, selecting a silicon slice, and scanning by an automatic detection instrument to generate an original data file; 2, editing the original data file by system software; adding virtual chips in an invalid chip area at the edge of the silicon slice beyond the scanning range of the automatic detection instrument, and editing virtual flaws on the added virtual chip to generate a data result file; 3, transmitting the data result file to theoptical microscope by the system software, and automatically photographing the surfaces of chips including the chips in the invalid chip area at the edge of the silicon slice by the optical microscope according to the data result file; and 4, analyzing the deburring and flaw condition of the periphery of the silicon slice by the system software according to photos. By adopting the method, the deburring and flaw condition of the edge of the silicon slice can be automatically affirmed.

Description

Automatically monitor the method for silicon chips periphery trimming and defective with light microscope
Technical field
The present invention relates to the semiconductor detection technique, particularly a kind of method that the peripheral deburring and the defect situation of silicon chip is detected automatically with light microscope.
Background technology
The light microscope that uses during semiconductor detects, can confirm defect point exactly by the initial point contraposition, can carry out different enlargement ratios switches, can be to the differentiation of classifying of different defectives, can take pictures and photo is preserved the defective of needs, can see the photo of taking and carry out analysis confirmation by systems soft ware.
Semiconductor manufacturing factory detects silicon chip with light microscope at present, normally at first silicon chip is scanned with automatic detection instrument, obtain the raw data file of silicon chip surface, then described raw data file is sent to light microscope by systems soft ware, the board of adjusting light microscope carries out contraposition, find the silicon slice surface defects point, switch different multiplying powers, defect point is taken pictures and photo is preserved, check that by systems soft ware the photo of taking carries out analysis confirmation, thereby monitor the defect situation of silicon chip surface automatically.
But, automatic detection instrument scans the data that only can obtain the effective wafer of silicon chip (wafer (chip) with full graphics) usually to silicon chip, and can not obtain being distributed in the data of the invalid wafer (wafer (chip) that does not have full graphics) of silicon chip edge, thereby also can't detect automatically silicon chips periphery trimming and defect situation.Usually confirm the trimming and the defect situation of silicon chip edge, all be on board, confirming manually, the manpower and materials of Xiao Haoing are all bigger like this, not only influenced operating efficiency, and the precision of confirming is also poor, can't realize carrying out the monitoring of long-term standard in the peripheral deburring and the peripheral defect situation of line products silicon chip in a flow process.
Summary of the invention
The technical problem to be solved in the present invention provide a kind of with light microscope to the method that the peripheral deburring and the defect situation of silicon chip detects automatically, can confirm automatically the trimming situation and the defect situation of silicon chip edge.
For solving the problems of the technologies described above, of the present inventionly monitor the method for silicon chips periphery trimming and defective automatically with light microscope, may further comprise the steps:
One. select silicon chip, scan, generate raw data file with automatic detection instrument;
Two. by the described raw data file of systems soft ware editor, the invalid wafer region of the silicon chip edge outside the automatic detection instrument sweep limits adds dummy wafer, and the virtual defective of editor generates the data result file on the dummy wafer of adding;
Three. by systems soft ware described data result file is sent to light microscope, light microscope carries out automatic camera according to described data result file to the silicon chip surface that comprises the invalid wafer region of silicon chip edge;
Four. systems soft ware is analyzed the trimming situation of silicon chips periphery and the defect situation of silicon chips periphery by photo.
Described editor's raw data file, the invalid wafer region of silicon chip edge outside the automatic detection instrument sweep limits adds dummy wafer, can be, if the Wafer Map line number of measuring the silicon chip demonstration is greater than columns, based on X-axis, Y-axis is that secondary ascending order is arranged, if the Wafer Map columns of measuring the silicon chip demonstration is greater than line number, based on Y-axis, X-axis is that secondary ascending order is arranged, coordinate position by initial point, and in conjunction with maximum line numbers and columns, the coordinate points of silicon chip edge is set, with the invalid wafer region at whole silicon wafer edge, be divided into big dummy wafer such as several grades according to the size of wafer.
Described on dummy wafer the virtual defective of editor generate the data result file, can be by separating following equation group:
(n ia+α-h) 2+(m ib+β-l) 2=r 2
m ib+β-l=k(n ia+α-h)
Obtain the accurate coordinates value of silicon chip defective in the respective virtual wafer, r is the distance at the silicon chip center of circle to edge in the formula, (h is to define initial point (x in the silicon chip center of circle (x ', y ') coordinate system and the systems soft ware l), y) the relative coordinate value of coordinate system, x '=x-h, y '=y-l, a are the length of wafer, b is the wide of wafer, m iBe wafer Y-axis coordinate figure, n iBe wafer X-axis coordinate figure, (α β) is the relative coordinate of defective in the wafer of place, and k is a slope.Can obtain the coordinate figure of different marginal positions by the size of change r value, so just can autotelic as required edge confirm and analyze silicon chip.
Automatically the method for monitoring silicon chips periphery trimming and defective with light microscope of the present invention, edit by the systems soft ware raw data file that does not comprise the invalid wafer region data of silicon chip edge that scanning obtains to the automatic scan instrument, the invalid wafer region of silicon chip edge outside the automatic detection instrument sweep limits adds dummy wafer, the virtual defective of editor on the dummy wafer of adding, generate the data result file, light microscope can be taken pictures according to this data result file, obtain the photo that the automatic scan instrument scans the invalid wafer region of silicon chip edge that can not obtain, thereby the photo that can utilize systems soft ware to clap by light microscope is analyzed the trimming situation and the defect situation of silicon chip edge automatically.Different setting according to the invalid wafer region defect situation of silicon chip edge can edit out different data file results, to reach different silicon chip defect analysis demands.
Description of drawings
Below in conjunction with the drawings and the specific embodiments the present invention is described in further detail.
Fig. 1 is method one an execution mode flow chart of monitoring silicon chips periphery trimming and defective with light microscope automatically of the present invention;
Fig. 2 is the virtual defect coordinate value-based algorithm of a silicon chip edge schematic diagram.
Embodiment
One execution mode of the method that the peripheral deburring and the defect situation of silicon chip is detected automatically with light microscope of the present invention may further comprise the steps as shown in Figure 1:
1. need to select the silicon chip (Wafer) of affirmation, scan, generate raw data file with automatic detection instrument;
2. by systems soft ware editor silicon chip raw data file, be added on dummy wafer (Chip) data of the invalid wafer region of silicon chip edge outside the automatic detection instrument sweep limits, for example can use Klarity Defect systems soft ware, the result that is provided with of " Sample Test Plan " in editor's raw data file realizes;
Edit methods is as follows:
The display packing of Sample Test Plan is if the Wafer Map line number of measuring the silicon chip demonstration greater than columns, is that secondary ascending order is arranged based on X-axis, Y-axis; If the WaferMap columns of measuring the silicon chip demonstration is greater than line number, based on Y-axis, X-axis is that secondary ascending order is arranged, coordinate position by initial point, and in conjunction with maximum line numbers and columns, the coordinate points of silicon chip edge just can be set, with the invalid wafer region at whole silicon wafer edge, be divided into big dummy wafer such as several grades (Chip) according to the size of wafer (Chip).With these coordinate figures, add in being provided with of " Sample Test Plan " editor who has so just finished the dummy wafer (Chip) of the invalid wafer region of silicon chip edge to.Dummy wafer (Chip) data of the invalid wafer region of silicon chip edge outside the automatic detection instrument sweep limits have been added in the raw data file of silicon chip.
3. go up the virtual defective of editor in the dummy wafer (Chip) of adding, generate the data result file.For example, with editing among " the Defect List " of Klarity Defect systems soft ware in raw data file.The coordinate figure of defective accurately calculates it by algorithm, and detailed algorithmic descriptions is as follows:
As shown in Figure 2, (x y) defines initial point in the systems soft ware, (x ', y ') be silicon chip (wafer) center of circle, relative coordinate is as follows:
x′=x-h
y′=y-l
(h l) be (x ', y ') coordinate system and (x, y) the relative coordinate value of coordinate system, and to define a be that length, the b of wafer (chip) is the wide of wafer in definition.
In (x ', y ') coordinate system, the peripheral equation of a circle of silicon chip (wafer) is:
x′ 2+y′ 2=r 2
Linear equation is
y′=kx′
R is a slope for the distance of the silicon chip center of circle to the edge, k.With coordinate transform to (x, y) under the coordinate system, equation of a circle is
(x-h) 2+(y-l) 2=r 2
Linear equation is
y-l=k(x-h)
In the data result file, defect coordinate is the relative coordinate at place wafer (chip), its coordinate figure be (α, β), then this point (x y) can be expressed as in the coordinate system:
x 0=na+α
y 0=mb+β
N wherein, m is an integer, represents the wafer (chip) at defective place, is worth to be
n = [ x ′ 0 + h a ]
m = [ y ′ 0 + l b ]
Can be descended equation group:
(n ia+α-h) 2+(m ib+β-l) 2=r 2
m ib+β-l=k(n ia+α-h)
m iBe wafer Y-axis coordinate figure, n iBe wafer X-axis coordinate figure, separate this equation group and then can obtain the accurate coordinates value of silicon chip defective in corresponding wafer (chip), can obtain the coordinate figure of different silicon chip marginal positions by the size of change r value, so just can autotelic as required edge confirm and analyze silicon chip.
4. the data result file is passed through systems soft ware, be sent to light microscope;
6. light microscope carries out automatic camera according to described data result file to the edge of silicon chip;
7. systems soft ware is analyzed the trimming situation of silicon chips periphery and the defect situation of silicon chips periphery by photo.
One specific embodiment is as follows, with KLA2351 (automatic detection instrument), and Klarity Defect (systems soft ware), Review Station (light microscope) is an example.
1. need to select the silicon chip of affirmation, scan with automatic detection instrument (KLA2351) earlier, file is called TEST;
2. open the result of scanning in Klarity Defect systems soft ware, on the interface of " Wafer Map ", the right button of clicking the mouse is selected " KLARF export ", the text that ejects is saved as: TEST1.txt;
3. editor adds the dummy wafer (Chip) of the invalid wafer region of described silicon chip edge, and the result that is provided with of " Sample Test Plan " by editor's raw data file realizes;
4. go up the virtual defective of editor in the dummy wafer (Chip) of adding.The coordinate figure of defective accurately calculates it by algorithm, the virtual defect coordinate value that calculates is edited among " the Defect List " in the raw data file goes; Editor's form must meet the call format (form with the KRF file is consistent) of KRF file
For example:
1? 3310?2019? 3?23? 2.732?2.731? 0.821700? 0.907? 5? 1? 0? 1? 0? 0
a b c d e f g?h?i?j?k?l
A represents: Defect ID (defective identifier)
B represents: XREL YREL (defective X, the Y coordinate figure, by the α that formula accurately calculates, the β value)
C represents: X Index Y Index (defective place Chip coordinate figure, by the n that formula calculates, the m value)
D represents: X Size Y Size (defective X, the size of Y)
E represents: Defect Area (area of defective)
F represents: D Size (size of D)
G represents: Class Number (classification designation)
H represents: Test (test)
I represents: Cluster Number (counting in groups)
J represents: Review Sample (inspection sample)
K represents: Image Count (number of pictures)
L represents: Image List (directory of photos)
Boldface type partly is to need editor, and the result that other parts only need be duplicated certain real defect deposits the data file that edits: TEST2.txt in addition
5. with the file of TEST2.txt, in Klarity Defect, open it with the form of opening the KRF file;
6. the data with file TEST2.txt by name are sent to light microscope;
7. the edge to silicon chip carries out automatic camera;
8. make a concrete analysis of the trimming situation of silicon chips periphery and the defect situation of silicon chips periphery with systems soft ware by photo.
Automatically the method for monitoring silicon chips periphery trimming and defective with light microscope of the present invention, edit by the systems soft ware raw data file that does not comprise the invalid wafer region data of silicon chip edge that scanning obtains to the automatic scan instrument, the invalid wafer region of silicon chip edge outside the automatic detection instrument sweep limits adds dummy wafer, the virtual defective of editor on the dummy wafer of adding, generate the data result file, light microscope can be taken pictures according to this data result file, obtain the photo that the automatic scan instrument scans the invalid wafer region of silicon chip edge that can not obtain, thereby the photo that can utilize systems soft ware to clap by light microscope is analyzed the trimming situation and the defect situation of silicon chip edge automatically.Different setting according to the invalid wafer region defect situation of silicon chip edge can edit out different data file results, to reach different silicon chip defect analysis demands.

Claims (3)

1, a kind ofly monitor the method for silicon chips periphery trimming and defective automatically, it is characterized in that, may further comprise the steps with light microscope:
One. select silicon chip, scan, generate raw data file with automatic detection instrument;
Two. by the described raw data file of systems soft ware editor, the invalid wafer region of the silicon chip edge outside the automatic detection instrument sweep limits adds dummy wafer, and the virtual defective of editor generates the data result file on the dummy wafer of adding;
Three. by systems soft ware described data result file is sent to light microscope, light microscope carries out automatic camera according to described data result file to the silicon chip surface that comprises the invalid wafer region of silicon chip edge;
Four. systems soft ware is analyzed the trimming situation of silicon chips periphery and the defect situation of silicon chips periphery by photo.
2, automatically the method for monitoring silicon chips periphery trimming and defective with light microscope according to claim 1, it is characterized in that, described editor's raw data file, the invalid wafer region of silicon chip edge outside the automatic detection instrument sweep limits adds dummy wafer, be meant if measure Wafer Map line number that silicon chip shows greater than columns, based on X-axis, Y-axis is that secondary ascending order is arranged, if the Wafer Map columns of measuring the silicon chip demonstration is greater than line number, based on Y-axis, X-axis is that secondary ascending order is arranged, coordinate position by initial point, and in conjunction with maximum line numbers and columns, the coordinate points of silicon chip edge is set, with the invalid wafer region at whole silicon wafer edge, be divided into big dummy wafer such as several grades according to the size of wafer.
3, according to claim 1 and 2ly monitor the method for silicon chips periphery trimming and defective automatically, it is characterized in that with light microscope, described on dummy wafer the virtual defective of editor generate the data result file, be meant by separating following equation group:
(n ia+α-h) 2+(m ib+β-l) 2=r 2
m ib+β-l=k(n ia+α-h)
Obtain the accurate coordinates value of silicon chip defective in the respective virtual wafer, r is the distance at the silicon chip center of circle to edge in the formula, (h is to define initial point (x in the silicon chip center of circle (x ', y ') coordinate system and the systems soft ware l), y) the relative coordinate value of coordinate system, x '=x-h, y '=y-l, a are the length of wafer, b is the wide of wafer, m iBe wafer Y-axis coordinate figure, n iBe wafer X-axis coordinate figure, (α β) is the relative coordinate of defective in the wafer of place, and k is a slope.
CN2008100438129A 2008-09-26 2008-09-26 Method for automatically monitoring peripheral deburring and flaw of silicon slice by using optical microscope Active CN101685786B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111584385A (en) * 2020-05-20 2020-08-25 西安奕斯伟硅片技术有限公司 Silicon wafer defect recording method and device
CN111863653A (en) * 2020-07-31 2020-10-30 长江存储科技有限责任公司 Wafer defect detection method, detection system and computer readable storage medium
WO2022104622A1 (en) * 2020-11-19 2022-05-27 Yangtze Memory Technologies Co., Ltd. Method for processing semiconductor wafers

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Publication number Priority date Publication date Assignee Title
KR0154158B1 (en) * 1994-07-14 1998-12-01 김주용 Monitoring method for processing defects
CN1523343A (en) * 2003-02-20 2004-08-25 上海市计量测试技术研究院 Process for detecting heavily doped silicon monocrystal chip or ingot lattice imperfection
CN100388451C (en) * 2004-11-02 2008-05-14 力晶半导体股份有限公司 Defect detection method
CN100442066C (en) * 2005-12-13 2008-12-10 上海华虹Nec电子有限公司 Method for analyzing BEOL testing chip on-line failure
CN201035212Y (en) * 2007-03-20 2008-03-12 中芯国际集成电路制造(上海)有限公司 Crystal round examine optical microscope capable of providing multiple colour macro check light source

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111584385A (en) * 2020-05-20 2020-08-25 西安奕斯伟硅片技术有限公司 Silicon wafer defect recording method and device
CN111863653A (en) * 2020-07-31 2020-10-30 长江存储科技有限责任公司 Wafer defect detection method, detection system and computer readable storage medium
WO2022104622A1 (en) * 2020-11-19 2022-05-27 Yangtze Memory Technologies Co., Ltd. Method for processing semiconductor wafers

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Patentee before: Shanghai Huahong NEC Electronics Co., Ltd.