JP2000066240A - Liquid crystal display device and its production - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize high quality and large screen picture with excellent visual angle characteristic, at low production cost and with reduced display irregularity in an active matrix type liq. crystal display device. SOLUTION: A liq. crystal display device is provided with a pair of at least one transparent substrates, a liq. crystal compsn. held between the above substrates, plural scanning lines and image signal lines 7 arranged in matrix on an opposed surface of either substrate of the above substrates, and an active element connected to a pixel electrode pairing with a common electrode, the above pixel electrode, the above scanning lines and the image signal lines 7. In this case, a connected portion of a protective active element for a electrostatic countermeasure connecting the common electrode 56 and the scanning line, and a connected portion of a protective active element for a electrostatic countermeasure connecting the common electrode 56 and an image signal wiring are in an outside of the area of the gate insulation film 53 locally deposited and the connected portion is completely covered by a passivation film 54.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a high-quality large-screen active matrix liquid crystal display device.

[0002]

2. Description of the Related Art In a conventional active matrix type liquid crystal display device, a gate insulating film, a semiconductor film, and a passivation film are deposited on the entire surface of a substrate except for the periphery of one substrate on which active elements are formed. In the process of forming a scanning line first, a step of removing a gate insulating film deposited on a scanning line terminal portion in order to connect to a driving IC circuit was required. (FIGS. 1 and 2 are cross-sectional views of the active element substrate of the conventional liquid crystal display device.) It was necessary to remove the gate insulating film also at the junction between the wirings of the protection transistor for countermeasures against static electricity.

[0003]

As shown in FIGS. 1 and 2, a conventional TN mode active element substrate requires five photomask steps in all steps. In the active element substrate of the horizontal electric field liquid crystal mode, the photomask process was required four times or more in all processes. As the LCD screen becomes larger,
Since the number of liquid crystal display elements that can be obtained from a single glass substrate has decreased, the price of large liquid crystal display elements has been extremely high. Further, when the size of the glass substrate becomes large, the amount of generated static electricity becomes very large, dust adheres and electrostatic breakdown frequently occurs, and the yield of large liquid crystal display devices is reduced.

When the number of photomask processes is large, a large number of expensive exposure apparatuses are required, and the amount of initial investment increases. Since the area of the clean room in the manufacturing factory is also increased, the running cost is also increased. If the time from the introduction of the glass substrate to the completion of the active element substrate is not shortened as much as possible, a large number of stockers for storage are required.

When the glass substrate becomes large, when a silicon nitride film and an amorphous silicon semiconductor film are deposited by plasma CVD, stress is generated after the deposition because the expansion coefficient is different from that of the glass substrate, and the entire substrate is distorted. Problems arise. Since the stress generation rate differs between the central portion of the glass substrate and the peripheral portion of the glass substrate, the dimensional change does not occur uniformly over the entire effective pixel region. Therefore, there was a problem that misalignment between photomasks occurred.

SUMMARY OF THE INVENTION The present invention provides means for solving these problems. It is an object of the present invention to increase the investment efficiency of a large-sized liquid crystal display device manufacturing plant and to increase the size of an ultra-large and ultra-wide viewing angle liquid crystal display device. It is an object of the present invention to provide a method that can be manufactured at low cost and with good yield.

[0007]

Means for Solving the Problems In order to solve the problems and achieve the above object, the present invention uses the following means.

[0008] A scanning line and a video signal wiring on a substrate, a thin film transistor formed at each intersection of the scanning line and the video signal wiring, a pixel electrode connected to the thin film transistor, and at least a part of the pixel A liquid crystal display device comprising: an active matrix substrate having a common electrode formed to face an electrode; a counter substrate facing the active matrix substrate; and a liquid crystal layer sandwiched between the active matrix substrate and the counter substrate. In the manufacturing method, [Means 1] when the gate insulating film of the thin film transistor element is deposited on a substrate, the gate insulating film is partially deposited only on a local area including an effective pixel region, and the semiconductor layer and the passivation protective film of the thin film transistor element are formed on the entire surface of the substrate. accumulate.

[Means 2] When depositing the gate insulating film and the semiconductor layer of the thin film transistor element on the substrate, the gate insulating film and the semiconductor layer are partially deposited only on a local area including the effective pixel region, and the passivation protective film layer is deposited on the entire surface of the substrate. .

[Means 3] When depositing a gate insulating film and a passivation protective film layer of the thin film transistor element on a substrate, the gate insulating film and the passivation protective film layer are partially deposited only on a local area including an effective pixel region, and the semiconductor layer is deposited on the entire surface of the substrate.

[Means 4] In the manufacturing method described in the means 3, the passivation film region is deposited wider than the gate insulating film partially deposited only in the local area including the effective pixel region.

[Means 5] When a gate insulating film, a semiconductor layer, and a passivation protective film layer of the thin film transistor element are deposited on a substrate, they are partially deposited only in a local portion including an effective pixel region.

[Means 6] In the manufacturing method described in the means 5, the passivation film region is deposited wider than the gate insulating film partially deposited only in the local area including the effective pixel region.

[Means 7] In the liquid crystal display device manufactured by the manufacturing method according to any one of the means 1 to 6, the protective transistor element for preventing static electricity connecting the common electrode and the scanning line; The protection transistor element for antistatic which connects the video signal wiring was completely covered with the passivation film layer.

[Means 8] In the liquid crystal display device manufactured by the manufacturing method according to any one of the means 1 to 6, the protection transistor element for preventing static electricity connecting the common electrode and the scanning line; The protection transistor element for preventing static electricity, which connects the video signal wiring, is disposed on two or more sides around the boundary of the locally deposited gate insulating film.

[Means 9] In the liquid crystal display device manufactured by the manufacturing method according to any one of the means 1 to 6, a connection portion of an antistatic protection transistor element connecting the common electrode and the scanning line is connected to the common electrode. The electrode and the connection portion of the protection transistor element for electrostatic protection connecting the video signal wiring were arranged outside the region of the locally deposited gate insulating film.

[Means 10] In a liquid crystal display device manufactured by the manufacturing method according to any one of the means 1 to 9, a seal region where a liquid crystal cell is formed by bonding two substrates together is formed by locally depositing a gate insulating film. On the peripheral border of the membrane, or
It was located outside the gate insulating film deposition area and inside the passivation deposition area.

[Means 11] The film thickness of the positive photoresist is changed in three or more steps by changing the transmitted light amount of the photomask in three or more steps of complete transmission, semi-transmission, and complete cutoff.

[Means 12] According to the manufacturing method described in the means 11, the electrodes constituting the liquid crystal display element such as the scanning line, the semiconductor region of the active element, the video signal wiring and the pixel electrode intersect and overlap each other. The amount of light transmitted through the photomask at the stepped portion is changed in three or more steps, and the thickness of the photoresist after the development of the positive photoresist is changed in three or more steps.

[Means 13] According to the method described in Means 11, the amount of light transmitted through the photomask in the channel portion of the thin film transistor element connecting the video signal wiring and the pixel electrode is increased. The thickness of the mold photoresist was reduced.

[Means 14] Using the method described in Means 3, 4, 5, 6, and 13, the video signal wiring and the pixel electrode are simultaneously separated and formed, and the n ⁺ layer in the channel portion is removed. Including this step and the photomask step for forming the scanning lines,
It is completed in two photomask steps.

[Means 15] Using the method described in Means 1, 2 and 13, the video signal wiring and the pixel electrode are simultaneously formed separately, the n ⁺ layer in the channel portion is removed, and then the passivation protective film is formed on the substrate. Deposits on the entire surface. After that, drive IC
Drill contact holes in the terminal area for connection to the circuit.

[Means 16] Using the method described in the means 15, a video signal wiring and a drain electrode are simultaneously formed separately.
After removing the n ⁺ layer in the channel portion, a passivation protective film is deposited on the entire surface of the substrate. After that, a contact hole for a terminal portion for connection to the drive IC circuit and a contact hole for connection between the transparent pixel electrode and the drain electrode are simultaneously formed. Then, a transparent conductive film is deposited to form a transparent pixel electrode and a terminal portion electrode.

[Means 17] After the video signal wiring and the pixel electrode are simultaneously formed by using the method described in the means 3, 4, 5, and 6, the metal film and the n ⁺ layer in the channel portion of the thin film transistor element are removed. . Then, a passivation protection film is partially deposited only on the local area including the effective pixel area.

[Means 18] Using the method described in Means 3, 4, 5, and 6, a video signal wiring and a drain electrode are simultaneously formed, a transparent conductive film is deposited, and the video signal wiring and the pixel electrode are patterned. At the time of thinning, the metal film and the n ⁺ layer in the channel portion of the thin film transistor portion are removed. After that, a passivation protection film is partially deposited only on a local portion including the effective pixel region.

[Means 19] After the gate insulating film and the semiconductor layer are partially deposited only in the local area including the effective pixel region by using the method described in the means 2, 5, 6, the video signal wiring and the pixel electrode are formed. Form simultaneously. Then, the n ⁺ exposed on the surface
After removing the layer, a passivation film is partially deposited on the entire surface of the substrate or only on a local area including the effective pixel region. Then, an extra passivation film and a semiconductor layer for forming a channel portion of the thin film transistor element, a video signal wiring, and a pixel electrode are removed.

[Means 20] After the gate insulating film is partially deposited only on the local area including the effective pixel region by using the method described in the means 1, 3, or 4, the semiconductor layer is deposited on the entire surface of the substrate. Thereafter, the video signal wiring and the pixel electrode are simultaneously formed, and then the n ⁺ layer exposed on the surface is removed. Next, a passivation film is partially deposited on the entire surface of the substrate or only on a local portion including the effective pixel region. Then, an extra passivation film and a semiconductor layer for forming a channel portion of the thin film transistor element, a video signal wiring, and a pixel electrode are removed.

[Means 21] After the video signal wiring and the drain electrode are simultaneously formed using the method described in the means 19 and 20, the n ⁺ layer exposed on the surface is removed. Next, a passivation film is partially deposited on the entire surface of the substrate or only on a local area including the effective pixel area. After that, an extra passivation film and a semiconductor layer are removed to form a channel portion of the thin film transistor element, a video signal wiring, and a drain electrode, and then a transparent pixel electrode is formed.

[Means 22] Using the method described in the means 5 or 6, the gate insulating film and the semiconductor layer are partially deposited only on the local portion including the effective pixel region, and then the channel portion of the thin film transistor element is patterned. After that, the video signal wiring and the pixel electrode are simultaneously formed, and then the n ⁺ layer in the channel portion of the thin film transistor element is removed. Then, a passivation film is partially deposited only on the local area including the effective pixel area.

[Means 23] After the gate insulating film is partially deposited only on the local area including the effective pixel region by using the method described in the means 3 or 4, the semiconductor layer is deposited on the entire surface of the substrate.
Then, after patterning the channel portion of the thin film transistor element, the video signal wiring and the pixel electrode are formed simultaneously. Then, after removing the n ⁺ layer in the channel portion of the thin film transistor, a passivation film is deposited only on a local portion including the effective pixel region.

[Means 24] The gate insulating film is partially deposited only on the local area including the effective pixel area by using the method described in the means 1 and 2, and then the semiconductor layer is entirely deposited on the entire substrate or only on the local area including the effective pixel area. Partially deposited on Then, after patterning the channel portion of the thin film transistor and simultaneously forming the video signal wiring and the pixel electrode, the n ⁺ layer in the channel portion of the thin film transistor is removed. Next, after a passivation film is deposited on the entire surface of the substrate, a contact hole is made in a terminal portion for connection with a driving IC.

[Means 25] Using the method described in the means 5 or 6, the gate insulating film and the semiconductor layer are partially deposited only on the local portion including the effective pixel region, and then the channel portion of the thin film transistor is patterned. Next, after forming the video signal wiring and the pixel electrode at the same time, the n ⁺ layer in the channel portion of the thin film transistor is removed, and then the passivation film is partially deposited only on the local portion including the effective pixel region. Thereafter, a common electrode is formed on the passivation film.

[Means 26] After the gate insulating film is partially deposited only on the local area including the effective pixel area, the semiconductor layer and the etching stopper layer are partially deposited on the entire surface of the substrate or only on the local area including the effective pixel area. In the case of ion implantation, the n ⁺ layer for forming an ohmic contact is partially implanted only into a local area including an effective pixel region. When the n ⁺ layer is deposited by the plasma CVD method, the n ⁺ layer is partially deposited on the entire surface of the substrate or only on a local portion including the effective pixel region.

[Means 27] After simultaneously patterning the video signal wiring and the pixel electrode using the method described in the means 26, the n ⁺ layer exposed on the surface and the semiconductor layer under the n ⁺ layer By removing both, the channel portion of the thin film transistor element, the video signal wiring, and the pixel electrode are formed independently and simultaneously.

[Means 28] After the video signal wiring and the pixel electrode are simultaneously formed by using the method described in the means 26 and 27, the passivation is partially deposited only on the entire surface of the substrate or only a local area including the effective pixel area. Next, the driving circuit IC
Excessive passivation film, n ⁺ layer, and semiconductor layer on the connection terminal portion are removed in order to connect with the semiconductor device.

[Means 29] For each pixel of display, two or more gate electrodes of thin film transistors are arranged in a row, and two or more channel regions of the thin film transistors are formed in a row.
The drain electrodes attached to two or more respective channels were connected to each other and joined to the pixel electrodes.

[Means 30] A horizontal electric field method is used for a liquid crystal display panel produced by the methods of means 1 to 6 and means 11 to 28.

[Means 31] A twisted nematic liquid crystal system, a ferroelectric liquid crystal system, an antiferroelectric liquid crystal system, or a vertical alignment liquid crystal system is used as a liquid crystal display panel produced by the method of the means 16 and 21.

[Means 32] A scanning line of a liquid crystal display element formed by the method of the means 1 to 6 and the means 11 to 28 has a two-layer structure of aluminum (or aluminum alloy) and titanium (or titanium alloy), or Three-layer structure of aluminum (or aluminum alloy), titanium (or titanium alloy), and molybdenum (or molybdenum alloy), or aluminum (or aluminum alloy)
And a three-layer structure of chromium (or chromium alloy) and molybdenum (or molybdenum alloy), and the common electrode facing the pixel electrode is a single layer structure of titanium (or titanium alloy) or titanium (or titanium alloy) and molybdenum (Or a molybdenum alloy) or a two-layer structure of chromium (or a chromium alloy) and molybdenum (or a molybdenum alloy).

[Means 33] The scanning lines of the liquid crystal display element formed by the methods of means 1 to 6 and means 11 to 28 are made of titanium (or titanium alloy), copper (or copper alloy) and titanium (or titanium alloy). It has a three-layer structure of chromium (or chromium alloy), copper (or copper alloy), and molybdenum (or molybdenum alloy), and the common electrode facing the pixel electrode has a single-layer structure of titanium (or titanium alloy). Or a two-layer structure of titanium (or a titanium alloy) and molybdenum (or a molybdenum alloy), or a two-layer structure of chromium (or a chromium alloy) and molybdenum (or a molybdenum alloy).

[Means 34] A two-layer structure of titanium (or a titanium alloy) and aluminum (or an aluminum alloy) or titanium (or a titanium alloy) is used for a video signal wiring of a liquid crystal display device manufactured by the method of the means 1 to 28. A two-layer structure of molybdenum (or a molybdenum alloy) or a two-layer structure of chromium (or a chromium alloy) and molybdenum (or a molybdenum alloy) was used.

[Means 35] A three-layer structure of titanium (or a titanium alloy), aluminum (or an aluminum alloy), and titanium (or a titanium alloy) for a video signal wiring of a liquid crystal display device manufactured by the method of the means 1 to 28, or , A three-layer structure of titanium (or titanium alloy), aluminum (or aluminum alloy), and molybdenum (or molybdenum alloy), or titanium (or titanium alloy)
And aluminum (or aluminum alloy) and chromium (or chromium alloy) three-layer structure, or titanium (or titanium alloy) and molybdenum (or molybdenum alloy) and titanium (or titanium alloy) three-layer structure, or titanium (or A three-layer structure of titanium alloy), chromium (or chromium alloy), and molybdenum (or molybdenum alloy) was used.

[Means 36] In the liquid crystal display device manufactured by the method according to any one of the means 1 to 9, the area where the gate insulating film is deposited is divided into the effective pixel area, the terminal area of the video signal wiring, and the protection active element for preventing static electricity. Locally restricted to the area.

[Means 37] In the liquid crystal display device manufactured by the method according to any one of the means 1 to 9, the distance from the deposition boundary of the gate insulating film to the end of the scanning line terminal and the protection against static electricity from the deposition boundary of the gate insulating film. The distance between the ends of the active element and the ends of the joining terminals was 2 mm or more.

[Means 38] In the liquid crystal display device manufactured by the method described in any of the means 1 to 6, the portion connecting the common electrode crossing the scanning line and the common electrode crossing the video signal wiring is It was placed outside the region of the locally deposited gate insulating film.

[Means 39] A two-layer structure of titanium silicide and aluminum (or aluminum alloy) or molybdenum silicide and aluminum (or aluminum alloy) is used for the video signal wiring of the liquid crystal display panel produced by the method described in any one of means 1 to 28. Two-layer structure, a two-layer structure of chromium silicide and aluminum (or aluminum alloy), a two-layer structure of titanium silicide and molybdenum (or molybdenum alloy), or a two-layer structure of chromium silicide and molybdenum (or molybdenum alloy) Is used.

[0047]

FIG. 1 is a sectional view of a conventional thin film transistor element substrate for a twisted nematic liquid crystal mode. The manufacturing method of depositing three layers of a gate insulating film, a semiconductor film and a passivation film on the entire surface of a glass substrate has realized the minimum number of photomask steps without any difficulty in the process. However, the photomask process is required five times in all processes, and further cost reduction is impossible. FIG. 2 is a cross-sectional view of the thin film transistor element substrate for the in-plane switching mode liquid crystal mode. Also in this case, as in FIG. 1, a manufacturing method in which three layers of a gate insulating film, a semiconductor film, and a passivation film are deposited on the entire surface of a glass substrate is used. Fig. 1
Since the pixel electrode (transparent electrode) used in (14) is not required, the photomask process is reduced to one time, and the photomask process is completed in four times in all processes. However, in this case, it becomes impossible to connect the scanning line and the common electrode. Similarly, the connection between the video signal wiring and the common electrode becomes impossible. For this purpose, five photomask steps are required to form contact electrodes 13 in the scanning line terminal portion and the video signal wiring terminal portion and then form the junction electrode 13 and install the protection transistor for countermeasures against static electricity. In other words, no matter which liquid crystal mode is used, in order to perform stable production without reducing the yield, there is a limit to the cost reduction when the conventional process is used.

The use of the means 1 to 9 eliminates the need for a step of forming a contact hole in a terminal portion, thereby achieving a significant reduction in the number of steps. In addition, even if the process is shortened, the protection transistor for countermeasures against static electricity can be formed on the substrate as in the related art, so that the yield does not decrease. By depositing a gate insulating film having a large thickness on a minimum necessary area, stress applied to the glass substrate can be reduced, so that pattern deformation is also reduced. As a result, the amount of misalignment between the photomasks is also reduced, and the display unevenness caused by the misalignment is greatly reduced.
Similarly, the amount of misalignment between the color filter substrate and the thin film transistor substrate, which are the opposite substrates, is reduced, so that the yield in the liquid crystal cell process is greatly improved.

The use of the means 10 makes it easy to make the cell gap in the sealing region uniform, so that the cell gap failure in the liquid crystal cell process can be reduced.

The means 3 to 9 and the means 11 to 14
By using the steps described above, the protection transistor for countermeasures against static electricity can be formed on the thin film transistor element substrate, and the whole process can be realized with only two photomask processes. This process makes it possible to greatly reduce the number of processes compared to the conventional process, thereby achieving a significant cost reduction and an improvement in productivity. The clean room area of the production plant can be reduced, and expensive cleaning equipment, resist coater, developing equipment, and exposure equipment are less than half that of conventional equipment, so initial investment costs can be significantly reduced. In addition, a clean stocker for storage is not required,
The adhesion of dust to large substrates is reduced, and the yield is improved. Since the number of washing steps is drastically reduced, the amount of pure water used is also reduced, and the running cost is greatly reduced. Simple matrix liquid crystal panel (ST
An active matrix liquid crystal panel (transverse electric field liquid crystal mode) whose production cost is lower than that of the N mode) can be realized. As a result, it becomes possible for a home TV to replace a cathode ray tube (CRT) with an active matrix liquid crystal panel.

By using the means 15, a more compact liquid crystal panel can be manufactured.

Using the means 16 and 21, a conventional twisted nematic liquid crystal mode liquid crystal panel can be manufactured in four photomask steps. The cost can be reduced slightly.

Since the area where the gate electrode and the pixel electrode (drain electrode) overlap with each other can be accurately controlled by the means 17 and 18, the display unevenness is drastically reduced and the yield is improved.

By means 19, 20, and 21, an antistatic protection transistor can be formed on the thin film transistor element substrate, and the entire process can be completed in three photomask steps.
Significant cost reduction and significant improvement in productivity can be realized. Further, in this step, the passivation film does not cover the entire effective screen and does not give a large stress to the glass substrate. Therefore, this is a process in which the dimensional change of the glass substrate is the least, and a bonding alignment error that occurs when the color filter substrate and the thin film active matrix substrate are bonded in the liquid crystal cell process when the liquid crystal display screen becomes very large can be minimized. In this step, the photomask alignment error between the gate electrode and the pixel electrode (drain electrode) is not changed from the conventional one, and the process stability is very high.

By using the means 22, 23, 24, and 25, a protection transistor for preventing static electricity can be formed on the thin film transistor element substrate, and the entire process can be completed in three to four photomask steps. In this step, the common electrode can be formed last, and the degree of freedom of the process is very large. Since the gap between steps after pattern formation can be minimized, disconnection of wiring is unlikely to occur, and rubbing treatment after formation of an alignment film in the liquid crystal cell process is very easy, so the yield can be maximized. is there.

By using the means 26, 27, and 28, a protection transistor for preventing static electricity can be formed on the thin film transistor element substrate, and the entire process can be completed in three to four photomask steps. In this step, the thin film semiconductor layer can be formed as thin as about 500 ° and the n ⁺ layer does not remain in the channel portion, so that the requirement for uniformity of the entire surface of the substrate during dry etching is reduced. Pol in combination with excimer laser
It is easy to change to the ys thin film transistor process. By using the backside exposure technology, it is possible to apply the self-alignment technology, and it is possible to realize a very large LCD screen.

In the case of a very large screen by using the means 29, even if misalignment occurs locally due to a change in the substrate dimensions, the capacitance formed by the drain electrode and the gate electrode does not change. No unevenness occurs.

By using the means 32 to 35, the resistance of the scanning line can be greatly reduced and the resistance of the common electrode can be significantly reduced. Further, since the electrode film thickness of the liquid crystal driving electrode inside the pixel and the pixel common electrode facing the liquid crystal driving electrode can be reduced, the rubbing treatment in the liquid crystal cell process becomes very easy. For this reason, the rubbing processing density and uniformity can be greatly increased, and thus, image quality free from unevenness with good reliability and reproducibility can be obtained.

By using the means 34, 35, and 39,
Film peeling at the boundary of the deposition region of the gate insulating film can be prevented. Especially silicide compounds of titanium and refractory metals,
The adhesion to a glass substrate or a plasma CVD film (silicon oxide film, silicon nitride film) is very strong, and the film does not peel off. In the present invention, peeling of the film after the formation of the electrode pattern at the boundary between the deposition regions becomes the biggest problem, and the types of metals that can be used are limited. Even if aluminum or aluminum alloy is used for the video signal wiring, the film does not peel, but cannot be directly bonded to the n ⁺ layer.
A high melting point metal layer or a high melting point metal silicide compound layer is required between the aluminum and the n ⁺ layer.

The means 36 expands the deposition area of the gate insulating film to the area of the video signal wiring terminal and the protection active element for preventing static electricity, thereby eliminating the intersection at the boundary between the video signal wiring terminal section and the deposition area of the gate insulating film. Therefore, the defect of electrode peeling is drastically reduced. This greatly improves the yield.

The error of the dimensional processing accuracy of the glass substrate and the accuracy of the deposition position on the local portion of the gate insulating film can be sufficiently ensured by the means 37. Since the deposition temperature of the gate insulating film in the P-CVD device is around 300 ° C., this value is a conventional value in consideration of the deformation of the jig and the thermal expansion coefficient of the device.
If the value is smaller than this value, a gate insulating film is deposited on the entire surface of the scanning line terminal portion, or the effective junction area with the TAB is reduced, so that a contact failure frequently occurs and horizontal streak of an image occurs. If the means 37 is used, contact failure does not occur and horizontal unevenness does not occur.

[0062]

[Embodiment 1] FIGS. 3, 50, 51 and 5
2, FIG. 53, FIG. 54 and FIG. 55 are a sectional view and a plan view of the first embodiment of the present invention. After patterning the scanning line (gate electrode), a gate insulating film, an amorphous silicon semiconductor film, and an n ⁺ amorphous silicon film are locally partially deposited. After the deposition, the metal electrodes are exposed at the terminals of the scanning lines. Then, a metal film is deposited by a sputtering method in order to simultaneously form the video signal wiring, the liquid crystal driving electrode (17), and the scanning line terminal junction metal electrode (19). The channel portion of the thin film transistor element is formed only by one photomask process using the method shown in FIGS.
^{The +} layer has been removed. In the photomask used in this process, the amount of transmitted light changes in three or more steps as shown in FIGS. FIGS. 25 and 26 are cross-sectional views of the channel portion of the transistor element of the photomask. FIG. 29 is a cross-sectional view of a positive resist exposed and developed using this photomask. Since the resolving power of an exposure apparatus used for a thin film semiconductor is about 2 to 3 μm at the maximum, when a photomask of the type shown in FIGS.
The average transmitted light amount is adjusted using a pattern of about / 5.
Space width 0.5-1μ with line width 0.2-0.5μm
A semi-transmitted light amount area (23) is formed at about m. FIG. 26,
When making a photomask of the type shown in FIG. 28, a silicon nitride film can be used as the film in the semi-transmitted light amount region (24). The transmission amount of UV light can be freely adjusted by changing the component ratio of silicon and nitrogen. As shown in FIG. 29, the positive resist film thickness (30) of the unexposed portion is 1.2
The thickness of the positive resist in the exposure region in the semi-transmissive light amount region should be around 0.05 to 0.2 μm. The metal layer on the n ⁺ layer is processed by wet etching to leave a metal layer at a necessary portion. Then n ⁺ layer and the non-doped semiconductor layer with dilute hydrofluoric nitric acid may be wet etching, it may be removed n ⁺ layer and the non-doped semiconductor layer by dry etching. Then, the thin positive resist remaining in the semi-transmissive light amount region (24) in the channel portion of the thin film transistor is removed by plasma ashing. The metal layer and the n ⁺ layer in the channel portion are removed by the same wet etching and dry etching as before. Finally, a passivation film is partially deposited locally to complete the active element substrate. The photomask process requires 2
Only once.

[Embodiment 2] FIG. 6 is a sectional view of a second embodiment of the present invention. After the last passivation film of the first embodiment is deposited over the entire substrate, a manufacturing method of forming a contact hole in a scanning line terminal portion is adopted. The photomask process is only three times in all steps.

[Embodiment 3] FIG. 4 is a sectional view of a third embodiment of the present invention. In the first embodiment, the scanning line and the common electrode
Although 18) was formed simultaneously by one photomask process using the same metal material, in Example 3, the common electrode was formed first, and then the scan line base insulating film 20 was locally formed. Is deposited on The photomask process is performed three times in all steps. Since the short circuit due to the defective pattern of the common electrode (18) and the scanning line is drastically reduced, the yield is greatly improved.

[Embodiment 4] FIG. 5 is a sectional view of a fourth embodiment of the present invention. As in the third embodiment, the scanning line and the common electrode (18) are not formed at the same time, but the scanning line is formed first and then the common electrode (18) is formed at the end of the process. The photomask process is performed three times in all steps. Since the short circuit due to the defective pattern of the common electrode (18) and the scanning line is drastically reduced, the yield is greatly improved. As in the third embodiment, since the material of the common electrode can be freely selected, the degree of freedom of the process is increased.

[Embodiment 5] FIG. 7 is a sectional view of a fifth embodiment of the present invention. In the first to fourth embodiments, the liquid crystal display mode of the horizontal electric field method is used. In the fifth embodiment, the liquid crystal display mode of the vertical electric field method (TN method, vertical alignment method, ferroelectric method,
Antiferroelectric method). After forming a video signal wiring and a drain electrode and depositing a passivation film, the passivation film on the drain electrode is removed by making a contact hole (10). Finally, a transparent pixel electrode (14) is formed. The photomask process is performed four times in all steps.

Embodiment 6 FIGS. 56, 57, 58, 59, 60 and 61 are plan views of a sixth embodiment of the present invention. The cross-sectional views are the same as FIGS. The difference from the first to fifth embodiments is that the process shown in FIG. 30 is not used. Video signal wiring and liquid crystal drive electrode (17)
After the metal film is deposited and patterned in order to simultaneously form the junction metal (19) and the scanning line terminal portion, the metal film and the n ⁺ layer left in the channel region of the thin film transistor element are removed. Conversely, a method of depositing a metal film, removing the metal film and the n ⁺ layer in the channel portion region of the thin film transistor element, and thereafter patterning the video signal wiring, the liquid crystal drive electrode, and the scanning line terminal portion bonding metal. But it is possible.

Embodiment 7 FIGS. 8, 68, 69 and 7
FIGS. 0, 71, 72 and 73 are a sectional view and a plan view of a seventh embodiment of the present invention. After patterning the scanning lines, a gate insulating film, an amorphous silicon semiconductor film, and an n ⁺ amorphous silicon film are locally partially deposited as shown in FIGS. After the deposition, the metal electrodes are exposed at the terminals of the scanning lines. Next, a metal film is deposited by a sputtering method in order to simultaneously form the video signal wiring and the liquid crystal drive electrode (17). After patterning the metal film using wet etching or dry etching, the n ⁺ layer where the metal film has disappeared is similarly removed using wet etching or dry etching. Then, a passivation film is deposited on the entire surface of the substrate, and the passivation film and the amorphous silicon semiconductor film in extra regions for removing the channel portion of the thin film transistor element, the video signal wiring, and the liquid crystal drive electrode are removed. The photomask process can be completed three times in all processes.

[Embodiment 8] FIG. 9 is a sectional view of an eighth embodiment of the present invention. After partially depositing the gate insulating film locally as shown in FIGS. 92 and 93, the amorphous silicon semiconductor film and the n ⁺ amorphous silicon film are deposited over the entire surface of the substrate. Next, after forming a video signal wiring and a liquid crystal drive electrode, a passivation film is deposited on the entire surface of the substrate. Then, in order to separate the channel portion of the thin film transistor element, the video signal wiring, and the liquid crystal driving electrode, the passivation film and the amorphous silicon semiconductor film in extra regions are removed. At this time, the excess passivation film and amorphous silicon semiconductor film covering the terminal electrodes of the scanning lines are also removed at the same time. The passivation film may be a local partial deposition instead of the entire surface deposition.

[Embodiment 9] FIG. 11 is a sectional view of a ninth embodiment of the present invention. As in the third embodiment, after forming the common electrode first, the scanning line base insulating film 20 is locally deposited. The subsequent process is exactly the same as in Example 7. Photomask process is 4 in all processes
In this case, the yield is greatly improved because the short circuit due to the defective pattern of the common electrode (18) and the scanning line is drastically reduced.

[Embodiment 10] FIG. 12 shows a tenth embodiment of the present invention.
It is sectional drawing of the Example of FIG. As in the fourth embodiment, the common electrode is formed last. Unlike the fourth embodiment, since the passivation film is not covered over the entire effective pixel area, the processed cross section of the amorphous silicon layer is exposed. Therefore, a process of oxidizing the exposed side surface of the amorphous silicon layer by an ashing process or the like to form an insulating film is required.

Embodiment 11 FIGS. 10, 74, 75, and
76, 77, 78, and 79 are a sectional view and a plan view of the eleventh embodiment of the present invention. This embodiment is applied to a vertical electric field type liquid crystal display mode (TN mode, vertical alignment mode, ferroelectric mode, antiferroelectric mode). First, a scanning line is patterned, and then a gate insulating film, an amorphous silicon conductor film, and an n ⁺ amorphous silicon film are locally partially deposited as shown in FIGS. Next, a metal film is deposited on the entire surface, and the video signal wiring and the drain electrode are patterned. After removing the n ⁺ amorphous silicon film in the region where the metal film has disappeared, a passivation film is deposited on the entire surface of the substrate. Next, an extra region of the passivation film and the amorphous silicon semiconductor film are removed to separate the channel portion of the thin film transistor element from the video signal wiring and the drain electrode. At this time, an extra passivation film on the drain electrode, an extra passivation film on the terminal electrode of the scanning line, and an extra passivation film on the terminal electrode of the video signal wiring are simultaneously removed. Finally, a transparent pixel electrode (14) is formed.
The photomask process is four times in all processes. As in the eighth embodiment, a method of depositing an amorphous silicon semiconductor film and an n ⁺ amorphous silicon film over the entire surface of a substrate is also possible.

Embodiment 12 FIGS. 13, 64, 65,
FIG. 66, FIG. 67, FIG. 97, FIG.
2A and 2B are a sectional view and a plan view of a second embodiment. After patterning the scanning line, a gate insulating film, an amorphous silicon semiconductor film, and an n ⁺ amorphous silicon film are locally partially deposited as shown in FIGS. Next, a metal film is deposited on the entire surface of the substrate, and the video signal wiring and the liquid crystal drive electrodes are patterned. After removing the n ⁺ layer and the amorphous silicon layer in the portion without metal, a transparent conductive film or a titanium-based metal film is deposited on the entire surface of the substrate. Next, in order to electrically separate the video signal wiring from the liquid crystal driving electrode, the metal layer and the n ⁺ layer amorphous silicon layer in the channel portion of the thin film transistor element are removed. Finally, a passivation film is locally deposited. 97, 100, and 101 show that after forming a video signal wiring and a drain electrode, a transparent conductive film, a titanium-based metal film, or a silicide compound of a refractory metal is deposited on the entire surface of the substrate to form a video signal wiring and a liquid crystal driving electrode. Pattern it. Then, a good metal layer in the channel part and n
^After removing the ⁺ layer, a passivation film is locally deposited.

Embodiment 13 FIG. 14 shows a thirteenth embodiment of the present invention.
It is sectional drawing of the Example of FIG. It is exactly the same as Example 12 until the passivation film is deposited. Example 1
In step 3, a passivation film is deposited on the entire surface of the substrate.
Contact holes (11) are formed in the scanning line terminal portion and the video signal wiring terminal portion, and a wide passivation film deposited on the terminal portion is removed.

[Embodiment 14] FIG. 98 shows a fourteenth embodiment of the present invention.
It is sectional drawing of the Example of FIG. As in the fourth embodiment, the scanning line and the common electrode 18 are not formed at the same time. Instead, the scanning line is formed first, and then the common electrode 18 is formed last. The photomask process is performed four times in all steps.

[Embodiment 15] FIG. 99 shows a fifteenth embodiment of the present invention.
It is sectional drawing of the Example of FIG. As in the third embodiment, the scanning electrode and the common electrode (18) are not formed at the same time, and the common electrode (18) is not formed.
Is formed first, and then the scanning wiring base insulating film ▲ 20
▼ is locally deposited. The photomask process is performed four times in all steps.

Embodiment 16 FIGS. 15, 62, 63,
FIGS. 64, 65, 66 and 67 are a sectional view and a plan view of a sixteenth embodiment of the present invention. After patterning the scanning lines, a gate insulating film, an amorphous silicon semiconductor film, and an n ⁺ amorphous silicon film are locally deposited as shown in FIGS. Next, a metal film is deposited on the entire surface of the substrate to form a video signal wiring and a drain electrode. Then, a transparent conductive film is deposited on the entire surface of the substrate, and the video signal wiring and the transparent pixel electrode (14) are patterned. The remaining metal layer and the n ⁺ layer in the channel portion of the next thin film transistor are removed. Finally, a passivation film is locally deposited. This embodiment is applied to a vertical electric field type liquid crystal display mode (TN mode, vertical alignment mode, ferroelectric liquid crystal mode, antiferroelectric liquid crystal mode). The photomask process is performed three times in all steps.

[Embodiment 17] FIGS. 16, 106 and 10
7, FIG. 82, FIG. 83, FIG. 84 FIG.
7A and 7B are a cross-sectional view and a plan view of a seventh example. After patterning the scanning lines, the gate insulating film, the amorphous silicon semiconductor film, and the n ⁺ amorphous silicon film are formed as shown in FIGS.
3. Partial deposition locally. Next, the amorphous silicon film is patterned to form a channel portion of the transistor. After that, a metal film is deposited on the entire surface of the substrate, and then the video signal wiring and the liquid crystal drive electrode (17) are patterned. After removing the n ⁺ layer in the channel portion of the transistor, a passivation film is finally deposited locally. In the case of FIG. 16, no amorphous silicon layer exists below the liquid crystal drive electrode (17) in FIGS. 106 and 107. In FIGS. 102, 80, and 81, the amorphous silicon layer exists below the liquid crystal drive electrode (17), but they can be formed by exactly the same process. The photomask process is three times in all steps.

[Embodiment 18] FIGS. 17 and 105 are sectional views of an eighteenth embodiment of the present invention. It is exactly the same as Example 17 until the passivation film is deposited. In Example 18, a passivation film was deposited on the entire surface of the substrate, and then contact holes (11) were formed in the scanning line terminal portion and the video signal wiring terminal portion, and a large amount of the passivation film deposited on the terminal portion was removed. are doing. The photomask process is performed four times in all steps.

[Embodiment 19] FIGS. 18 and 103 are sectional views of a nineteenth embodiment of the present invention. Similarly to the third embodiment, the scanning line and the common electrode (18) are not formed at the same time, but the common electrode (18) is formed first and then the scanning wiring base insulating film (20) is locally deposited. . The rest of the process is the same as in Example 18. The photomask process is four times in all processes. In the case of FIG. 18, there is no amorphous silicon layer below the liquid crystal drive electrode (17),
In the case of FIG. 103, an amorphous silicon layer exists below the liquid crystal drive electrode (17). FIGS. 18 and 103 can be made by exactly the same process.

[Embodiment 20] FIGS. 19 and 104 are sectional views of a twentieth embodiment of the present invention. As in the fourth embodiment, the scanning line and the common electrode 18 are not formed at the same time. Instead, the scanning line is formed first, and then the common electrode 18 is formed last. The photomask process is four times in all processes. In the case of FIG. 19, the liquid crystal drive electrode
The amorphous silicon layer does not exist below ▼, but in the case of FIG. 104, the amorphous silicon layer exists below the liquid crystal drive electrode 17. FIG.
9 and FIG. 104 can be made by exactly the same process.

Embodiment 21 FIG. 20, FIG. 86, FIG.
88, 89, 90 and 91 are a sectional view and a plan view of a twenty-first embodiment of the present invention. After patterning the scanning lines, a gate insulating film, an amorphous silicon semiconductor film, and an etching stopper film (21) are locally partially deposited as shown in FIGS. After the deposition, the metal electrodes are exposed at the terminals of the scanning lines. Next, FIG.
6, scanning lines (gate electrodes) as shown in the plan view of FIG.
The etching stopper film (21) is left only in the region for forming the channel portion of the transistor in the portion inside the region, and the etching stopper film other than the effective pixel region peripheral semiconductor layer (59) is completely removed in other regions. I do. Next, an n ⁺ amorphous silicon layer or an n ⁺ microcrystal silicon layer is locally deposited to make ohmic contact. Ohmic contact can also be obtained by performing ion shower doping or ion implantation only on the effective pixel region and the protection transistor region for preventing static electricity. Thereafter, a metal film is deposited on the entire surface of the substrate in order to form the video signal wiring and the liquid crystal drive electrode. Video signal wiring and liquid crystal drive electrodes ▲
After patterning 17 ▼, the remaining n ⁺ layer and amorphous silicon layer are removed. Finally, a passivation film is locally deposited. In this step, the last passivation film is not absolutely necessary. The passivation step may be omitted. The photomask process is performed three times in all steps.

[Embodiment 22] FIG. 21 shows a twenty-second embodiment of the present invention.
It is sectional drawing of the Example of FIG. It is exactly the same as Example 21 until the passivation film is deposited. In Example 22, a passivation film was deposited on the entire surface of the substrate, and then contact holes (11) were formed in the scanning line terminal portion and the video signal wiring terminal portion, and the passivation film deposited on the terminal portion was removed. ing. The photomask process is performed four times in all steps.

[Embodiment 23] FIG. 22 shows a twenty-third embodiment of the present invention.
It is sectional drawing of the Example of FIG. As in the third embodiment, the common electrode (18) is not formed simultaneously with the scanning line and the common electrode (18).
Is formed first, and then the scanning line base insulating film 20
▼ is locally deposited. The remaining process is Example 2.
Same as 1. The photomask process is four times in all processes.

[Embodiment 24] FIG. 23 shows a twenty-fourth embodiment of the present invention.
It is sectional drawing of the Example of FIG. As in the fourth embodiment, the scanning line and the common electrode (18) are not formed at the same time, but the scanning line is formed first, and then the common electrode (18) is formed at the end of the process. Photomask process is 4 in all processes
Times.

[Embodiment 25] FIG. 24 shows a twenty-fifth embodiment of the present invention.
It is sectional drawing of the Example of FIG. Embodiment 25 can be applied to a liquid crystal display mode of a vertical electric field system (TN mode, vertical alignment mode, ferroelectric liquid crystal mode, antiferroelectric liquid crystal mode). After forming the video signal wiring and the drain electrode, a transparent conductive film is deposited on the entire surface of the substrate to form a transparent pixel electrode (14). Thereafter, a passivation film is locally deposited. The photomask process is four times in all processes.

Embodiment 26 FIGS. 31, 32, 33,
FIG. 34 is a plan view of the twenty-sixth embodiment of the present invention. For each pixel of display, two gate electrodes of the thin film transistors are formed in a parallel line, and two channel regions of the thin film transistors are also formed in a parallel line. The drain electrode is integrated into one and connected to the liquid crystal drive electrode. The present invention can be applied to thin film transistor elements of the type shown in FIGS. 3, 8, 13, 16, and 20. With this structure, even if misalignment of the gate electrode and the drain electrode occurs,
The capacitance of the drain electrode hardly changes.

Embodiment 27 FIGS. 25, 26, 27,
FIGS. 28, 29 and 30 are a sectional view and a plan view of a twenty-seventh embodiment of the present invention. FIG. 25 shows an embodiment in which the semi-transmissive region is made only of a metal material of a photomask. 7 is an embodiment of a photomask when applied to a channel region of a transistor. Any pattern may be used as long as it can uniformly control the amount of transmitted UV light in the channel region. FIG. 26 is a sectional view of a photomask on which a semi-transmissive film (24) capable of uniformly absorbing a required amount of UV light is deposited. As the material of the semi-transmissive film, a nitride film that can be deposited by a plasma CVD apparatus is suitable. SiH ₄ (silane) and N
By changing the mixture ratio of ₂ (nitrogen gas) and NH ₃ (ammonia gas), the amount of absorption of UV light can be freely and uniformly controlled. Any film can be used as long as the film does not change in the amount of UV absorption even after long-time UV irradiation. FIG. 28 shows an embodiment of a photomask when a UV absorbing film is applied to a channel region of a transistor. FIG. 29 is a sectional view of the positive resist when the positive resist is exposed and developed using the photomask having the structure shown in FIGS. The thickness of the positive resist in the semi-exposed area and the non-exposed area can be freely controlled by adjusting the semi-transmitted light amount. FIG. 30 is a process flow when a thin film transistor element is formed using the photomask process of the present invention.

Embodiment 28 FIG. 35, FIG. 36, FIG.
FIG. 38 is a sectional view and a plan view of a twenty-eighth embodiment of the present invention. As shown in FIG. 35, the scanning line uses an aluminum-based or copper-based material in order to reduce the resistance as much as possible. The pixel common electrode (36) facing the liquid crystal drive electrode among the common electrodes has no problem even if the resistance is high. Considering the rubbing process, it is preferable that the pixel common electrode and the liquid crystal drive electrode have the smallest possible film thickness. In the case of aluminum, a cap metal is used to prevent the occurrence of hillocks in aluminum, and in the case of copper, a titanium, tantalum, or chromium-based metal is used as a base metal to improve the adhesion to the glass substrate. Alternatively, a silicide compound of a high melting point metal is used, and a cap metal is necessarily required to prevent oxidation. For both aluminum and copper, a high melting point metal or a high melting point metal silicide compound is used as the cap metal.
As can be seen from the cross-sectional views 36, 37, and 38, the pixel common electrode facing the liquid crystal drive electrode has a smaller rubbing density in the rubbing process when the film thickness is smaller than the scanning line, and the liquid crystal molecules The orientation force increases. When the thickness of the pixel common electrode is increased, the movement of the tip of the rubbing cloth does not move linearly in parallel with the rotation direction, so that the alignment direction of the liquid crystal molecules is lost and the stability of the alignment of the liquid crystal molecules is reduced. .

Embodiment 29 FIGS. 39, 40, 41, and
FIG. 42 is a sectional view and a plan view of a twenty-ninth embodiment of the present invention. FIG. 39 is a plan view of the video signal wiring and the drain electrode, and FIGS. 40, 41, and 42 are sectional views of the drain electrode. When the video signal wiring crosses the boundary of the deposition region of the gate insulating film, amorphous silicon semiconductor film, or passivation film, the video signal wiring breaks at the boundary of the deposition region due to the difference in the coefficient of thermal expansion of the underlying film and the difference in adhesion. A defect such as peeling or film peeling occurs. Disconnection by using a titanium-based metal, a chromium-based metal, or a refractory metal silicide compound for the underlying video signal wiring as in the present invention,
Membrane peeling is drastically reduced.

[Embodiment 30] FIGS. 43, 44 and 45
FIG. 35 is a plan view of a thirtieth embodiment of the present invention. The deposition region of the passivation film is wider than the deposition region of the gate insulating film. Protective active element for static electricity countermeasures (55)
Are formed on two or more sides of the effective pixel. The junction area between the common electrode and the video signal wiring and the junction area between the common electrode and the scanning line exist outside the gate insulating film deposition area. All of the protective active elements and the above-mentioned junction region are completely covered with the passivation film. FIG.
As shown in FIG. 45, when the gate insulating film is deposited below the terminal portion of the video signal wiring, the disconnection of the video signal wiring is drastically reduced. The distance (B) from the terminal end of the scanning line to the deposition boundary of the gate insulating film and the distance (A) from the terminal end of the scanning line to the deposition boundary of the passivation film each need 2 mm or more. Similarly, the distance from the deposition boundary of the gate insulating film to the end of the joint terminal portion of the protection active element for preventing static electricity also needs to be 2 mm or more. 2mm
In the following cases, there is a high possibility that the gate insulating film covers the entire terminal portion of the scanning line, and contact failure occurs frequently.

[Embodiment 31] FIGS. 46 and 47 are plan views of a thirty-first embodiment of the present invention. A seal line for bonding the two substrates exists on the peripheral boundary of the locally deposited gate insulating film, or outside the gate insulating film deposition region and in the passivation film deposition region.

Embodiment 32 FIGS. 94 and 95 are plan views of a thirty-second embodiment of the present invention. FIG. 94 shows a scanning line photomask in which a semi-transmissive film is provided at a position where a video signal wiring and a scanning line intersect. FIG. 95 shows a photomask for forming a channel region of a thin film transistor element. A semi-transmissive film is provided at a portion that intersects the liquid crystal drive electrode and the transparent pixel electrode. When the positive resist is exposed using this photomask, the thickness of the positive resist at the portion where the semi-transmissive film is provided becomes thin, and a super-tapering process can be performed during dry etching. This dramatically reduces disconnections. Similar effects can be obtained by using a photomask as shown in FIG. 25 instead of the semi-transmissive film. The present invention can also be applied to the intersection between the common electrode and the video signal wiring.

Embodiment 33 FIG. 96 shows a thirty-third embodiment of the present invention.
It is a top view of an Example of. A portion connecting the common electrode that intersects with the scanning line and the common electrode that intersects with the video signal wiring exists outside the region of the locally deposited gate insulating film.

[0095]

According to the present invention, the number of photomask steps in all steps of the active element substrate can be greatly reduced from two to three. As a result, the area of the clean room can be reduced, and the number of exposure apparatuses, cleaning apparatuses, resist-related apparatuses, and clean storages can be significantly reduced. The amount of initial investment can be greatly reduced, and the running cost of the factory can also be significantly reduced. Further, since the process can be shortened, quality control can be easily performed, and the yield can be easily improved. Since the production efficiency is also greatly improved, the price of the liquid crystal display panel can be reduced. By locally depositing the thickest gate insulating film locally, the stress generated in the glass substrate is made uniform. Therefore, an abnormal dimensional change is less likely to occur after the glass substrate is cut, and an alignment error in joining the color filter substrate and the thin film transistor substrate is reduced.
By using the transistor structure of the present invention and the protection transistor for countermeasures against static electricity, it is possible to manufacture a liquid crystal panel resistant to static electricity, which does not cause display unevenness even if misalignment occurs between photomasks. The use of the common electrode structure of the present invention significantly reduces the rubbing treatment,
The disconnection of the video signal wiring is also drastically reduced. A 40-inch large-screen liquid crystal panel can be realized by using copper for the scanning wiring. By using a titanium-based metal or a high-melting-point metal silicide compound as a base of the video signal wiring, the film does not peel off. Even if the size becomes very large, the yield does not decrease.

[Brief description of the drawings]

FIG. 1 is a sectional view of a unit pixel of a conventional vertical electric field type thin film semiconductor substrate.

FIG. 2 is a sectional view of a unit pixel of a conventional in-plane switching thin film semiconductor substrate.

FIG. 3 is a sectional view of a unit pixel of a thin film semiconductor substrate of an in-plane switching type according to the present invention;

FIG. 4 is a cross-sectional view of a unit pixel of the in-plane switching semiconductor substrate according to the present invention.

FIG. 5 is a sectional view of a unit pixel of a thin film semiconductor substrate of an in-plane switching type according to the present invention;

FIG. 6 is a cross-sectional view of a unit pixel of the in-plane switching type thin film semiconductor substrate of the present invention.

FIG. 7 is a sectional view of a unit pixel of the vertical electric field type thin film semiconductor substrate of the present invention.

FIG. 8 is a sectional view of a unit pixel of a thin film semiconductor substrate of an in-plane switching type according to the present invention;

FIG. 9 is a cross-sectional view of a unit pixel of a lateral electric field type thin film semiconductor substrate of the present invention.

FIG. 10 is a sectional view of a unit pixel of a vertical electric field type thin film semiconductor substrate of the present invention.

FIG. 11 is a cross-sectional view of a unit pixel of a lateral electric field type thin film semiconductor substrate of the present invention.

FIG. 12 is a sectional view of a unit pixel of a thin film semiconductor substrate of an in-plane switching type according to the present invention;

FIG. 13 is a sectional view of a unit pixel of a thin film semiconductor substrate of an in-plane switching type according to the present invention;

FIG. 14 is a cross-sectional view of a unit pixel of a thin film semiconductor substrate of an in-plane switching type according to the present invention.

FIG. 15 is a sectional view of a unit pixel of the vertical electric field type thin film semiconductor substrate of the present invention.

FIG. 16 is a sectional view of a unit pixel of the in-plane switching semiconductor substrate according to the present invention;

FIG. 17 is a sectional view of a unit pixel of the in-plane switching semiconductor substrate according to the present invention;

FIG. 18 is a sectional view of a unit pixel of a thin film semiconductor substrate of an in-plane switching type according to the present invention;

FIG. 19 is a sectional view of a unit pixel of a thin film semiconductor substrate of an in-plane switching type according to the present invention;

FIG. 20 is a cross-sectional view of a unit pixel of the in-plane switching semiconductor substrate according to the present invention.

FIG. 21 is a cross-sectional view of a unit pixel of the in-plane switching semiconductor substrate according to the present invention.

FIG. 22 is a sectional view of a unit pixel of a thin film semiconductor substrate of an in-plane switching type according to the present invention;

FIG. 23 is a sectional view of a unit pixel of a thin film semiconductor substrate of an in-plane switching type according to the present invention;

FIG. 24 is a sectional view of a unit pixel of the vertical electric field type thin film semiconductor substrate of the present invention.

FIG. 25 is a sectional view of a transmitted light amount adjusting photomask of the present invention.

FIG. 26 is a sectional view of a transmitted light amount adjusting photomask of the present invention.

FIG. 27 is a plan view of a transmitted light amount adjusting photomask of the present invention.

FIG. 28 is a plan view of a transmitted light amount adjusting photomask of the present invention.

FIG. 29 is a cross-sectional view of a positive resist exposed and developed using the transmitted light amount adjusting photomask of the present invention.

FIG. 30 is a process flow of a thin film transistor device using the transmitted light amount adjusting photomask of the present invention.

FIG. 31 is a plan view of a thin film transistor element of the present invention.

FIG. 32 is a plan view of the thin film transistor element of the present invention.

FIG. 33 is a plan view of a thin film transistor element of the present invention.

FIG. 34 is a plan view of a thin film transistor element of the present invention.

FIG. 35 is a plan view of a scanning electrode and a common electrode according to the present invention.

FIG. 36 is a sectional view of a scanning electrode and a common electrode according to the present invention.

FIG. 37 is a sectional view of a scanning electrode and a common electrode according to the present invention.

FIG. 38 is a sectional view of a scanning electrode and a common electrode of the present invention.

FIG. 39 is a plan view of a video signal wiring and a drain electrode according to the present invention.

FIG. 40 is a sectional view of the video signal wiring of the present invention.

FIG. 41 is a sectional view of a video signal wiring of the present invention.

FIG. 42 is a sectional view of the video signal wiring of the present invention.

FIG. 43 is a plan view of a thin film semiconductor substrate of the present invention.

FIG. 44 is a plan view of the thin film semiconductor substrate of the present invention.

FIG. 45 is a plan view of the thin film semiconductor substrate of the present invention.

FIG. 46 is a plan view showing the arrangement of the seal line of the present invention.

FIG. 47 is a plan view of the arrangement of the seal line of the present invention.

FIG. 48 is a diagram of a protection circuit for preventing static electricity used in the present invention.

FIG. 49 is a protection circuit diagram for preventing static electricity used in the present invention.

FIG. 50 is a plan view of a lateral electric field type thin film semiconductor device of the present invention.

FIG. 51 is a plan view of a lateral electric field type thin film semiconductor device of the present invention.

FIG. 52 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 53 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 54 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 55 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 56 is a plan view of a lateral electric field type thin film semiconductor device of the present invention.

FIG. 57 is a plan view of a lateral electric field type thin film semiconductor device of the present invention.

FIG. 58 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 59 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 60 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 61 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 62 is a plan view of a vertical electric field type thin film semiconductor device of the present invention.

FIG. 63 is a plan view of a vertical electric field type thin film semiconductor device of the present invention.

FIG. 64 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 65 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 66 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 67 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 68 is a plan view of a lateral electric field type thin film semiconductor device of the present invention.

FIG. 69 is a plan view of a lateral electric field type thin film semiconductor device of the present invention.

FIG. 70 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 71 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 72 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 73 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 74 is a plan view of a vertical electric field type thin film semiconductor device of the present invention.

FIG. 75 is a plan view of a vertical electric field type thin film semiconductor device of the present invention.

FIG. 76 is a plan view of a protective transistor element for preventing static electricity according to the present invention.

FIG. 77 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 78 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 79 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 80 is a plan view of a lateral electric field thin film semiconductor device of the present invention.

FIG. 81 is a plan view of a lateral electric field type thin film semiconductor device of the present invention.

FIG. 82 is a plan view of a protection transistor element for preventing static electricity of the present invention.

FIG. 83 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 84 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 85 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

86 is a plan view of an in-plane switching semiconductor device according to the present invention. FIG.

FIG. 87 is a plan view of a lateral electric field thin film semiconductor device of the present invention.

FIG. 88 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 89 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 90 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 91 is a plan view of a protection transistor element for preventing static electricity according to the present invention.

FIG. 92 is a plan view of a gate insulating film local deposition region of the present invention.

FIG. 93 is a plan view of a gate insulating film local deposition region of the present invention.

FIG. 94 is a plan view of a transmitted light amount adjusting photomask of the present invention.

FIG. 95 is a plan view of a transmitted light amount adjusting photomask of the present invention.

FIG. 96 is a plan view of a thin film semiconductor substrate of an in-plane switching type according to the present invention;

FIG. 97 is a cross-sectional view of a unit pixel of a thin film semiconductor substrate of an in-plane switching type according to the present invention;

FIG. 98 is a sectional view of a unit pixel of the in-plane switching semiconductor substrate according to the present invention;

FIG. 99 is a cross-sectional view of a unit pixel of the in-plane switching semiconductor substrate of the present invention.

FIG. 100 is a plan view of a lateral electric field type thin film semiconductor device of the present invention.

FIG. 101 is a plan view of a lateral electric field thin film semiconductor device of the present invention.

FIG. 102 is a sectional view of a unit pixel of the in-plane switching semiconductor substrate according to the present invention;

FIG. 103 is a cross-sectional view of a unit pixel of a thin film semiconductor substrate of an in-plane switching type according to the present invention;

FIG. 104 is a cross-sectional view of a unit pixel of a lateral electric field type thin film semiconductor substrate of the present invention.

FIG. 105 is a cross-sectional view of a unit pixel of the in-plane switching method thin film semiconductor substrate according to the present invention;

FIG. 106 is a plan view of a lateral electric field thin film semiconductor device of the present invention.

FIG. 107 is a plan view of an in-plane switching mode thin-film semiconductor device of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Glass substrate 2 ... Scanning line (gate electrode) 3 ... Scanning line terminal part 4 ... Gate insulating film 5 ... Thin film semiconductor layer (non-doped layer) 6 ... Phosphorus doped n ⁺ semiconductor layer 7 ... ... video signal wiring 8 ... drain electrode 9 ... video signal wiring terminal part 10 ... pixel electrode contact hole 11 ... scanning line terminal part contact hole 12 ... video signal wiring contact hole 13 ... scanning line terminal part driving IC Junction electrode (transparent electrode) 14 ... Pixel electrode (transparent electrode) 15 ... Video signal wiring terminal drive IC junction electrode (transparent electrode) 16 ... Passivation film 17 ... Horizontal electric field type liquid crystal drive electrode (pixel electrode) 18 ... Transverse electric field common electrode 19... Scanning line terminal drive IC bonding electrode (metal electrode) 20... Scanning line base insulating film 21... Etching stopper insulating film 22. Quartz glass substrate for mask 23 ... Semi-transparent photomask region 24 ... Semi-transmissive film region 25 ... Photomask metal (Cr or Mo) 26 ... Video signal wiring photomask complete cutoff region 27 ... Drain electrode photomask complete cutoff region 28 ... ... Transistor / channel semi-transmissive region 29 ... Transistor / channel semi-transmissive film 30 ... Positive resist UV exposure completely blocked region after development 31 ... Positive resist UV exposed semi-transmissive region after development 32 Positive resist 33 First layer scanning line (aluminum or aluminum alloy) 34 Second layer scanning line (cap electrode) 35 First layer common electrode (aluminum or aluminum alloy) 36 second Layer common electrode (pixel common electrode) 37 Second layer lower scanning line 38 Second layer upper scanning line 39 Second Lower common electrode (pixel common electrode) 40 Second layer upper common electrode (pixel common electrode) 41 Base scan line 42 Copper or copper alloy scan line 43 Cap gate electrode 44 Copper or copper alloy Common electrode 45: Base common electrode 46: Cap common electrode (pixel common electrode) 47: Cutting position of scanning line and common electrode 48: Cutting position of video wiring 49: Base video signal wiring 50: Low resistance Video signal wiring 51 Cap video signal wiring 52 Etching stopper Video signal wiring 53 Local deposition area of gate insulating film 54 Local deposition area of passivation film 55 Protective active element for countermeasures against static electricity 56 Effective pixel area Peripheral common electrode 57 Liquid crystal cell seal line 58 Thin film transistor channel portion etching region 59 Peripheral half of effective pixel region Body layer A: Distance from gate insulating film deposition boundary to scanning line terminal end B: Distance from passivation film deposition boundary to scanning line terminal end C: Protection active element for static electricity protection from gate insulating film deposition boundary Distance to the end of the junction terminal of the common electrode terminal 60

Continued on the front page F-term (reference) 2H092 GA12 GA17 JA24 JA28 JA36 KA04 KA10 KB24 MA08 MA13 MA27 MA30 MA41 NA14 NA27 NA29 QA07 QA13 QA14 QA18 5C094 AA03 AA12 AA14 AA43 AA44 BA03 BA43 CA19 DA15 EA04 GB01 A01A02 DD GG02 GG15 HK02 HK09 HK16 HK33 HL03 HL04 HL05 HM19 NN02

Claims (41)

[Claims] 1. A pair of substrates, at least one of which is transparent, a liquid crystal composition layer sandwiched between the substrates, and a plurality of substrates arranged in a matrix on opposing surfaces of one of the substrates. A liquid crystal display device comprising: a scan line and a video signal line; a pixel electrode paired with a common electrode; and an active element connected to the pixel electrode, the scan line, and the video signal line. When the insulating film is deposited on the substrate, the insulating film is partially deposited only on a local portion including the effective pixel region, and the semiconductor layer of the active element and the passivation protective film layer are deposited on the entire surface of the substrate. 2. A pair of substrates, at least one of which is transparent, a liquid crystal composition layer sandwiched between said substrates, and a plurality of substrates arranged in a matrix on opposing surfaces of one of said substrates. A liquid crystal display device comprising: a scan line and a video signal line; a pixel electrode paired with a common electrode; and an active element connected to the pixel electrode, the scan line, and the video signal line. When the insulating film and the semiconductor layer are deposited on the substrate, the insulating film and the semiconductor layer are partially deposited only on a local area including the effective pixel region, and the passivation protective film layer is deposited on the entire surface of the substrate. 3. A pair of substrates, at least one of which is transparent, a liquid crystal composition layer sandwiched between the substrates, and a matrix arranged on the facing surface of one of the substrates. In a liquid crystal display device including a plurality of scanning lines and a video signal wiring, a pixel electrode paired with a common electrode, and an active element connected to the pixel electrode, the scanning line and the video signal wiring, When depositing a gate insulating film and a passivation protective film layer on a substrate, the gate insulating film and the passivation protective film layer are partially deposited only on a local area including an effective pixel region, and the semiconductor layer of the active element is deposited on the entire surface of the substrate. . 4. A method for manufacturing a liquid crystal display device having an active element according to claim 3, wherein the passivation film region is wider than the gate insulating film partially deposited only in a local area including the effective pixel region. A manufacturing method characterized by depositing. 5. A pair of substrates, at least one of which is transparent, a liquid crystal composition layer sandwiched between said substrates, and a plurality of substrates arranged in a matrix on opposing surfaces of one of said substrates. A liquid crystal display device comprising: a scan line and a video signal line; a pixel electrode paired with a common electrode; and an active element connected to the pixel electrode, the scan line, and the video signal line. A method for manufacturing a semiconductor device, comprising: depositing an insulating film, a semiconductor layer, and a passivation protective film layer on a substrate only partially in a local area including an effective pixel region. 6. A method for manufacturing a liquid crystal display device having an active element according to claim 5, wherein the passivation film region is made to have a larger thickness than a gate insulating film partially deposited only in a local area including an effective pixel region. A manufacturing method characterized by being widely deposited. 7. A liquid crystal display device manufactured by the manufacturing method according to claim 1, further comprising: a protection active element for preventing static electricity connecting the common electrode and the scanning line;
A liquid crystal display device, wherein a protection active element for preventing static electricity connecting the common electrode and the video signal wiring is completely covered with a passivation film layer. 8. A liquid crystal display device manufactured by the manufacturing method according to claim 1, further comprising: a protection active element for preventing static electricity connecting the common electrode and the scanning line;
A liquid crystal display device, wherein a protection active element for preventing static electricity, which connects the common electrode and the video signal wiring, is disposed on two or more sides around a boundary of a locally deposited gate insulating film. 9. A liquid crystal display device manufactured by the manufacturing method according to claim 1, wherein a connection portion of a protection active element for preventing static electricity connecting the common electrode and the scanning line, and the common electrode. A liquid crystal display device, wherein a connection portion of a protection active element for preventing static electricity, which connects the video signal wiring and the video signal wiring, is outside a region of a locally deposited gate insulating film. 10. A liquid crystal display device manufactured by the manufacturing method according to claim 1, wherein a seal region for forming a liquid crystal cell by bonding two substrates together is locally deposited. A liquid crystal display device which is located on a peripheral boundary of the semiconductor device or outside the gate insulating film region and in the passivation film deposition region. 11. A method for manufacturing a liquid crystal display device, comprising: changing the amount of light transmitted through a photomask in three or more steps, and changing the photoresist film thickness in three or more steps after positive photoresist development. 12. A photomask of a step portion of a portion where a semiconductor region of a scanning line or an active element, an electrode constituting a liquid crystal display element such as a video signal wiring or a pixel electrode crosses and overlaps with each other. Wherein the amount of transmitted light is changed in three or more steps, and the photoresist film thickness is changed in three or more steps after photoresist development. 13. The thin film transistor according to claim 11, wherein the amount of light transmitted through the photomask in the channel portion of the thin film transistor element connecting the video signal wiring and the pixel electrode is increased, and the thickness of the photoresist film in the channel portion of the thin film transistor element after the photoresist development is reduced. Manufacturing method of a liquid crystal display device. 14. The first aspect of the present invention relates to the third, fourth, fifth and sixth aspects.
3. The method of increasing the amount of light transmitted through the photomask in the channel portion of the thin film transistor element connecting the video signal wiring and the pixel electrode described in 3 and reducing the thickness of the photoresist in the channel portion of the thin film transistor element after photoresist development is used. The wiring and the pixel electrode are formed separately at the same time, and the n ⁺ layer in the channel portion is removed. This method and a photomask process for forming a scanning line are included, and the entire process is completed in two photomask processes. 15. With respect to claim 1 or 2, claim 13
Using a manufacturing method that increases the amount of photomask transmission light in the channel portion of the thin film transistor element that connects the video signal wiring and the pixel electrode described in the above, and reduces the thickness of the photoresist film in the channel portion of the thin film transistor after photoresist development. Pixel electrodes are formed simultaneously. After that, passivation is deposited on the entire surface of the substrate, and then drive I
A method for manufacturing a liquid crystal display device, comprising: opening a contact hole in a terminal portion for connecting to a C circuit. 16. A drive IC circuit and a contact hole for connecting a transparent pixel electrode and a drain electrode after forming a video signal wiring and a drain electrode at the same time and then forming a passivation on the entire surface of the substrate. Forming a contact hole of a terminal portion for connection to the substrate, and then forming a pixel electrode and a terminal portion electrode by arranging a transparent conductive film. 17. A video signal wiring and a pixel electrode are simultaneously formed after depositing a metal film for forming a video signal wiring and a pixel electrode. Thereafter, after removing the metal film and the n ⁺ layer in the channel portion of the thin film transistor, a passivation film is partially deposited only on a local portion including the effective pixel region. 18. The method according to claim 3, wherein after forming the video signal wiring and the drain electrode at the same time, depositing a transparent pixel electrode and patterning the video signal wiring and the pixel electrode, the channel of the thin film transistor portion. The metal film and the n ⁺ layer are partially removed. Thereafter, a manufacturing method in which a passivation film is partially deposited only in a local area including an effective pixel region. 19. The image signal wiring and the pixel electrode are formed at the same time after the gate insulating film and the semiconductor layer are partially deposited only in the local area including the effective pixel area. Then, after removing the n ⁺ layer exposed on the surface, a passivation film is partially deposited on the entire surface of the substrate or only a local portion including the effective pixel region. Thereafter, an excess passivation film and a semiconductor layer are removed to form a channel portion of the thin film transistor, a video signal wiring, and a pixel electrode. 20. A semiconductor device according to claim 1, wherein the gate insulating film is partially deposited only on a local portion including the effective pixel region, and then the semiconductor layer is deposited on the entire surface of the substrate. Then, after simultaneously forming the video signal wiring and the pixel electrode, the n ⁺ exposed on the surface is formed.
Remove the layer. Next, a passivation film is partially deposited on the entire surface of the substrate or only on a local portion including the effective pixel region. Thereafter, an extra passivation film and a semiconductor layer are removed to form a channel portion of the thin film transistor, a video signal wiring, and a pixel electrode. 21. The method according to claim 19, wherein after simultaneously forming the video signal wiring and the drain electrode, the n ⁺ layer exposed on the surface is removed. Next, a passivation film is partially deposited on the entire surface of the substrate or only on a local portion including the effective pixel region. A method for manufacturing a liquid crystal display device, further comprising removing a surplus passivation film and a semiconductor layer for forming a channel portion of a thin film transistor, a video signal wiring, and a drain electrode, and then forming a transparent pixel electrode. 22. The method according to claim 5, wherein after depositing the gate insulating film and the semiconductor layer only in a local area including the effective pixel area,
The channel portion of the thin film transistor is patterned. After that, the video signal wiring and the pixel electrode are simultaneously formed, and then the n ⁺ layer in the channel portion of the thin film transistor is removed. Then, a method of manufacturing a liquid crystal display device, wherein a passivation film is deposited only on a local area including an effective pixel area. 23. The method according to claim 3, wherein the gate insulating film is partially deposited only on a local portion including the effective pixel region,
A semiconductor layer is deposited over the entire surface of the substrate. After that, the channel portion of the thin film transistor is patterned, and then the video signal wiring and the pixel electrode are simultaneously formed. And removing the n ⁺ layer in the channel portion of the thin film transistor and depositing a passivation film only in a local area including the effective pixel region. 24. The semiconductor device according to claim 1, wherein the gate insulating film is partially deposited only on the local portion including the effective pixel region, and then the semiconductor layer is partially deposited on the entire surface of the substrate or only on the local portion including the effective pixel region. . Then, after patterning the channel portion of the thin film transistor, the video signal wiring and the pixel electrode are simultaneously formed. Next, after removing the n ⁺ layer in the channel portion of the thin film transistor, a passivation film is deposited on the entire surface of the substrate. A method for manufacturing a liquid crystal display device, further comprising: forming a contact hole in a terminal portion for connection with a driving IC. 25. The method according to claim 5, wherein the gate insulating film and the semiconductor layer are partially deposited only on a local portion including the effective pixel region, and then the channel portion of the thin film transistor is patterned. Next, after forming the video signal wiring and the pixel electrode at the same time, the n ⁺ layer in the channel portion of the thin film transistor is removed, and then the passivation film is partially deposited only on the local portion including the effective pixel region. Thereafter, a common electrode is formed on the passivation film. 26. A pair of substrates, at least one of which is transparent;
A liquid crystal composition layer sandwiched between the substrates, and a plurality of scanning lines and video signal wirings arranged in a matrix on opposite surfaces of one of the substrates to form a pair with a common electrode. In a liquid crystal display device including a pixel electrode and an active element connected to the pixel electrode, the scanning line, and the video signal wiring, a gate insulating film of the active element is partially deposited only on a local portion including an effective pixel region. The post-semiconductor layer and the etching stopper layer are partially deposited on the entire surface of the substrate or only on a local portion including the effective pixel region, and an n ⁺ layer for making ohmic contact is formed on a local portion including the effective pixel region when ion implantation is performed. Only partially injected. When the n ⁺ layer is deposited by the plasma CVD method, the n ⁺ layer is partially deposited only on the entire surface of the substrate or only a local area including the effective pixel region. 27. The method according to claim 26, wherein after simultaneously patterning the video signal wiring and the pixel electrode, both the n ⁺ layer exposed on the surface and the semiconductor layer below the n ⁺ layer are removed. A method for manufacturing a liquid crystal display device, wherein a channel portion of a thin film transistor element, a video signal wiring and a pixel electrode are independently and simultaneously formed. 28. The method according to claim 26, wherein after simultaneously forming the video signal wiring and the pixel electrode, passivation is partially deposited on the entire surface of the substrate or only on a local portion including the effective pixel region. Next, a method for manufacturing a liquid crystal display device, characterized by removing an excess passivation film, an n ⁺ layer, and a semiconductor layer on a connection terminal portion in order to connect to a drive circuit IC. 29. A pair of substrates at least one of which is transparent;
A pair of a liquid crystal composition layer sandwiched between the substrates, a plurality of scanning lines and video signal wirings arranged in a matrix on the facing surface of one of the substrates, and a common electrode. In a liquid crystal display device including a pixel electrode and an active element connected to the pixel electrode, the scanning line, and the video signal wiring, two or more thin film transistor gate electrodes are arranged in parallel for each display pixel. Wherein two or more channel regions are formed in parallel, and each of two or more drain electrodes is connected to one pixel electrode. 30. An in-plane switching mode liquid crystal display device manufactured by the manufacturing method according to claim 1. 31. A twisted nematic liquid crystal display device, a ferroelectric liquid crystal display device, or a vertically aligned liquid crystal display device manufactured by the manufacturing method according to claim 16. 32. A scanning line according to claim 1, wherein the scanning line is a two-layer structure of aluminum (or aluminum alloy) and titanium (or titanium alloy), or aluminum (or aluminum alloy) and titanium (or aluminum alloy). Or a three-layer structure of titanium alloy) and molybdenum (or molybdenum alloy), or a three-layer structure of aluminum (or aluminum alloy) and chromium (or chromium alloy) and molybdenum (or molybdenum alloy), facing the pixel electrode The common electrode has a single-layer structure of titanium (or titanium alloy), a two-layer structure of titanium (or titanium alloy) and molybdenum (or molybdenum alloy), or a two-layer structure of chromium (or chromium alloy) and molybdenum (or molybdenum alloy). A liquid crystal display device having a layer structure. 33. The scanning line according to claim 1, wherein the scanning line has a three-layer structure of titanium (or titanium alloy), copper (or copper alloy) and titanium (or titanium alloy), or chromium (or chromium alloy). ) And copper (or copper alloy)
And molybdenum (or molybdenum alloy) three-layer structure, or titanium (or titanium alloy) and copper (or copper alloy)
And a three-layer structure of molybdenum (or molybdenum alloy), the common electrode facing the pixel electrode is a single layer structure of titanium (or titanium alloy), or a titanium (or titanium alloy) and molybdenum (or molybdenum alloy) A liquid crystal display device having a two-layer structure or a two-layer structure of chromium (or a chromium alloy) and molybdenum (or a molybdenum alloy). 34. The image signal wiring according to claim 1, wherein the video signal wiring has a two-layer structure of titanium (or a titanium alloy) and aluminum (or an aluminum alloy), or titanium (or a titanium alloy) and molybdenum (or a molybdenum alloy).
Or a two-layer structure of chromium (or chromium alloy) and molybdenum (or molybdenum alloy). 35. The image signal wiring according to claim 1, wherein titanium (or a titanium alloy), aluminum (or an aluminum alloy), and titanium (or a titanium alloy) are provided for the video signal wiring.
Or a three-layer structure of titanium (or titanium alloy) and aluminum (or aluminum alloy) and molybdenum (or molybdenum alloy), or a titanium (or titanium alloy) and aluminum (or aluminum alloy) and chromium ( Or chromium alloy)
Alternatively, a three-layer structure of titanium (or a titanium alloy) and molybdenum (or a molybdenum alloy) and titanium (or a titanium alloy), or a three-layer structure of titanium (or a titanium alloy), chromium (or a chromium alloy), and molybdenum (or a molybdenum alloy) A liquid crystal display device having a layer structure. 36. In the liquid crystal display device manufactured by the manufacturing method according to claim 1, the region where the gate insulating film is deposited is an effective pixel region, a terminal region of a video signal wiring, and a protection active element region for countermeasures against static electricity. A liquid crystal display device characterized in that the liquid crystal display device is locally limited to: 37. In a liquid crystal display device manufactured by the manufacturing method according to any one of claims 1 to 9, the distance from the deposition boundary of the gate insulating film to the terminal of the scanning line terminal, and the protection against static electricity from the deposition boundary of the gate insulating film. A liquid crystal display device wherein the distances to the ends of the joining terminals of the active elements are each 2 mm or more. 38. A liquid crystal display device manufactured by the manufacturing method according to any one of claims 1 to 6, wherein a portion connecting a common electrode crossing a scanning line and a common electrode crossing a video signal wiring is provided. A liquid crystal display device outside the region of a locally deposited gate insulating film. 39. A two-layer structure of titanium silicide and aluminum (or aluminum alloy) or a two-layer structure of molybdenum silicide and aluminum (or aluminum alloy) for the video signal wiring,
Or a two-layer structure of chromium silicide and aluminum (or an aluminum alloy), a two-layer structure of titanium silicide and molybdenum (or a molybdenum alloy), or a two-layer structure of molybdenum silicide and molybdenum (or a molybdenum alloy), or chrome silicide And a molybdenum (or molybdenum alloy) two-layer structure. 40. A pair of substrates at least one of which is transparent;
A pair of a liquid crystal composition layer sandwiched between the substrates, a plurality of scanning lines and video signal wirings arranged in a matrix on the facing surface of one of the substrates, and a common electrode. In a liquid crystal display device including a pixel electrode and an active element connected to the pixel electrode, the scanning line, and the video signal wiring, the thickness of the scanning line is more than
A liquid crystal display device characterized in that a pixel common electrode paired with a liquid crystal drive electrode has a small thickness. 41. A liquid crystal display device in which an in-plane switching mode active matrix liquid crystal display device is characterized in that a film thickness of a pixel common electrode paired with a liquid crystal drive electrode is smaller than a film thickness of a video signal wiring.